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Commit | Line | Data |
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1da177e4 | 1 | /* |
1f729e06 | 2 | * (c) 2003-2006 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
065b807c | 7 | * Support : mark.langsdorf@amd.com |
1da177e4 LT |
8 | * |
9 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 10 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 LT |
11 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
12 | * (C) 2004 Pavel Machek <pavel@suse.cz> | |
13 | * Licensed under the terms of the GNU GPL License version 2. | |
14 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
15 | * | |
16 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 17 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 18 | * Originally developed by Paul Devriendt. |
1da177e4 LT |
19 | * Processor information obtained from Chapter 9 (Power and Thermal Management) |
20 | * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD | |
21 | * Opteron Processors" available for download from www.amd.com | |
22 | * | |
2e3f8faa | 23 | * Tables for specific CPUs can be inferred from |
065b807c | 24 | * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf |
1da177e4 LT |
25 | */ |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/cpufreq.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/string.h> | |
065b807c | 34 | #include <linux/cpumask.h> |
4e57b681 | 35 | #include <linux/sched.h> /* for current / set_cpus_allowed() */ |
0e64a0c9 DJ |
36 | #include <linux/io.h> |
37 | #include <linux/delay.h> | |
1da177e4 LT |
38 | |
39 | #include <asm/msr.h> | |
1da177e4 | 40 | |
1da177e4 | 41 | #include <linux/acpi.h> |
14cc3e2b | 42 | #include <linux/mutex.h> |
1da177e4 | 43 | #include <acpi/processor.h> |
1da177e4 LT |
44 | |
45 | #define PFX "powernow-k8: " | |
c5829cd0 | 46 | #define VERSION "version 2.20.00" |
1da177e4 LT |
47 | #include "powernow-k8.h" |
48 | ||
49 | /* serialize freq changes */ | |
14cc3e2b | 50 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 51 | |
2c6b8c03 | 52 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 53 | |
1f729e06 DJ |
54 | static int cpu_family = CPU_OPTERON; |
55 | ||
065b807c | 56 | #ifndef CONFIG_SMP |
08357611 | 57 | DEFINE_PER_CPU(cpumask_t, cpu_core_map); |
065b807c DJ |
58 | #endif |
59 | ||
1da177e4 LT |
60 | /* Return a frequency in MHz, given an input fid */ |
61 | static u32 find_freq_from_fid(u32 fid) | |
62 | { | |
63 | return 800 + (fid * 100); | |
64 | } | |
65 | ||
66 | /* Return a frequency in KHz, given an input fid */ | |
67 | static u32 find_khz_freq_from_fid(u32 fid) | |
68 | { | |
69 | return 1000 * find_freq_from_fid(fid); | |
70 | } | |
71 | ||
0e64a0c9 DJ |
72 | static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, |
73 | u32 pstate) | |
1f729e06 | 74 | { |
c5829cd0 | 75 | return data[pstate].frequency; |
1f729e06 DJ |
76 | } |
77 | ||
1da177e4 LT |
78 | /* Return the vco fid for an input fid |
79 | * | |
80 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
81 | * only from corresponding high fids. This returns "high" fid corresponding to | |
82 | * "low" one. | |
83 | */ | |
84 | static u32 convert_fid_to_vco_fid(u32 fid) | |
85 | { | |
32ee8c3e | 86 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 87 | return 8 + (2 * fid); |
32ee8c3e | 88 | else |
1da177e4 | 89 | return fid; |
1da177e4 LT |
90 | } |
91 | ||
92 | /* | |
93 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
94 | * to transition to a new state, seeing this bit set is really bad news. | |
95 | */ | |
96 | static int pending_bit_stuck(void) | |
97 | { | |
98 | u32 lo, hi; | |
99 | ||
e7bdd7a5 | 100 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
101 | return 0; |
102 | ||
1da177e4 LT |
103 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
104 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
105 | } | |
106 | ||
107 | /* | |
108 | * Update the global current fid / vid values from the status msr. | |
109 | * Returns 1 on error. | |
110 | */ | |
111 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
112 | { | |
113 | u32 lo, hi; | |
114 | u32 i = 0; | |
115 | ||
e7bdd7a5 | 116 | if (cpu_family == CPU_HW_PSTATE) { |
a266d9f1 AH |
117 | if (data->currpstate == HW_PSTATE_INVALID) { |
118 | /* read (initial) hw pstate if not yet set */ | |
119 | rdmsr(MSR_PSTATE_STATUS, lo, hi); | |
120 | i = lo & HW_PSTATE_MASK; | |
121 | ||
122 | /* | |
123 | * a workaround for family 11h erratum 311 might cause | |
124 | * an "out-of-range Pstate if the core is in Pstate-0 | |
125 | */ | |
126 | if (i >= data->numps) | |
127 | data->currpstate = HW_PSTATE_0; | |
128 | else | |
129 | data->currpstate = i; | |
130 | } | |
1f729e06 DJ |
131 | return 0; |
132 | } | |
7153d961 | 133 | do { |
0213df74 DJ |
134 | if (i++ > 10000) { |
135 | dprintk("detected change pending stuck\n"); | |
1da177e4 LT |
136 | return 1; |
137 | } | |
138 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 139 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
140 | |
141 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
142 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
147 | /* the isochronous relief time */ | |
148 | static void count_off_irt(struct powernow_k8_data *data) | |
149 | { | |
150 | udelay((1 << data->irt) * 10); | |
151 | return; | |
152 | } | |
153 | ||
27b46d76 | 154 | /* the voltage stabilization time */ |
1da177e4 LT |
155 | static void count_off_vst(struct powernow_k8_data *data) |
156 | { | |
157 | udelay(data->vstable * VST_UNITS_20US); | |
158 | return; | |
159 | } | |
160 | ||
161 | /* need to init the control msr to a safe value (for each cpu) */ | |
162 | static void fidvid_msr_init(void) | |
163 | { | |
164 | u32 lo, hi; | |
165 | u8 fid, vid; | |
166 | ||
167 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
168 | vid = hi & MSR_S_HI_CURRENT_VID; | |
169 | fid = lo & MSR_S_LO_CURRENT_FID; | |
170 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
171 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
172 | dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); | |
173 | wrmsr(MSR_FIDVID_CTL, lo, hi); | |
174 | } | |
175 | ||
1da177e4 LT |
176 | /* write the new fid value along with the other control fields to the msr */ |
177 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
178 | { | |
179 | u32 lo; | |
180 | u32 savevid = data->currvid; | |
0213df74 | 181 | u32 i = 0; |
1da177e4 LT |
182 | |
183 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
184 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); | |
185 | return 1; | |
186 | } | |
187 | ||
0e64a0c9 DJ |
188 | lo = fid; |
189 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
190 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 LT |
191 | |
192 | dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", | |
193 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); | |
194 | ||
0213df74 DJ |
195 | do { |
196 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
197 | if (i++ > 100) { | |
0e64a0c9 DJ |
198 | printk(KERN_ERR PFX |
199 | "Hardware error - pending bit very stuck - " | |
200 | "no further pstate changes possible\n"); | |
63172cb3 | 201 | return 1; |
32ee8c3e | 202 | } |
0213df74 | 203 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
204 | |
205 | count_off_irt(data); | |
206 | ||
207 | if (savevid != data->currvid) { | |
0e64a0c9 DJ |
208 | printk(KERN_ERR PFX |
209 | "vid change on fid trans, old 0x%x, new 0x%x\n", | |
210 | savevid, data->currvid); | |
1da177e4 LT |
211 | return 1; |
212 | } | |
213 | ||
214 | if (fid != data->currfid) { | |
0e64a0c9 DJ |
215 | printk(KERN_ERR PFX |
216 | "fid trans failed, fid 0x%x, curr 0x%x\n", fid, | |
217 | data->currfid); | |
1da177e4 LT |
218 | return 1; |
219 | } | |
220 | ||
221 | return 0; | |
222 | } | |
223 | ||
224 | /* Write a new vid to the hardware */ | |
225 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
226 | { | |
227 | u32 lo; | |
228 | u32 savefid = data->currfid; | |
0213df74 | 229 | int i = 0; |
1da177e4 LT |
230 | |
231 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
232 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); | |
233 | return 1; | |
234 | } | |
235 | ||
0e64a0c9 DJ |
236 | lo = data->currfid; |
237 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
238 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 LT |
239 | |
240 | dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", | |
241 | vid, lo, STOP_GRANT_5NS); | |
242 | ||
0213df74 DJ |
243 | do { |
244 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 245 | if (i++ > 100) { |
0e64a0c9 DJ |
246 | printk(KERN_ERR PFX "internal error - pending bit " |
247 | "very stuck - no further pstate " | |
248 | "changes possible\n"); | |
6df89006 DJ |
249 | return 1; |
250 | } | |
0213df74 | 251 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
252 | |
253 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
254 | printk(KERN_ERR PFX "fid changed on vid trans, old " |
255 | "0x%x new 0x%x\n", | |
1da177e4 LT |
256 | savefid, data->currfid); |
257 | return 1; | |
258 | } | |
259 | ||
260 | if (vid != data->currvid) { | |
0e64a0c9 DJ |
261 | printk(KERN_ERR PFX "vid trans failed, vid 0x%x, " |
262 | "curr 0x%x\n", | |
263 | vid, data->currvid); | |
1da177e4 LT |
264 | return 1; |
265 | } | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
270 | /* | |
271 | * Reduce the vid by the max of step or reqvid. | |
272 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 273 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 274 | */ |
0e64a0c9 DJ |
275 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
276 | u32 reqvid, u32 step) | |
1da177e4 LT |
277 | { |
278 | if ((data->currvid - reqvid) > step) | |
279 | reqvid = data->currvid - step; | |
280 | ||
281 | if (write_new_vid(data, reqvid)) | |
282 | return 1; | |
283 | ||
284 | count_off_vst(data); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
1f729e06 DJ |
289 | /* Change hardware pstate by single MSR write */ |
290 | static int transition_pstate(struct powernow_k8_data *data, u32 pstate) | |
291 | { | |
292 | wrmsr(MSR_PSTATE_CTRL, pstate, 0); | |
c5829cd0 | 293 | data->currpstate = pstate; |
1f729e06 DJ |
294 | return 0; |
295 | } | |
296 | ||
297 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ | |
0e64a0c9 DJ |
298 | static int transition_fid_vid(struct powernow_k8_data *data, |
299 | u32 reqfid, u32 reqvid) | |
1da177e4 LT |
300 | { |
301 | if (core_voltage_pre_transition(data, reqvid)) | |
302 | return 1; | |
303 | ||
304 | if (core_frequency_transition(data, reqfid)) | |
305 | return 1; | |
306 | ||
307 | if (core_voltage_post_transition(data, reqvid)) | |
308 | return 1; | |
309 | ||
310 | if (query_current_values_with_pending_wait(data)) | |
311 | return 1; | |
312 | ||
313 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
0e64a0c9 DJ |
314 | printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, " |
315 | "curr 0x%x 0x%x\n", | |
1da177e4 LT |
316 | smp_processor_id(), |
317 | reqfid, reqvid, data->currfid, data->currvid); | |
318 | return 1; | |
319 | } | |
320 | ||
321 | dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", | |
322 | smp_processor_id(), data->currfid, data->currvid); | |
323 | ||
324 | return 0; | |
325 | } | |
326 | ||
327 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 DJ |
328 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
329 | u32 reqvid) | |
1da177e4 LT |
330 | { |
331 | u32 rvosteps = data->rvo; | |
332 | u32 savefid = data->currfid; | |
065b807c | 333 | u32 maxvid, lo; |
1da177e4 | 334 | |
0e64a0c9 DJ |
335 | dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, " |
336 | "reqvid 0x%x, rvo 0x%x\n", | |
1da177e4 LT |
337 | smp_processor_id(), |
338 | data->currfid, data->currvid, reqvid, data->rvo); | |
339 | ||
065b807c DJ |
340 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
341 | maxvid = 0x1f & (maxvid >> 16); | |
342 | dprintk("ph1 maxvid=0x%x\n", maxvid); | |
343 | if (reqvid < maxvid) /* lower numbers are higher voltages */ | |
344 | reqvid = maxvid; | |
345 | ||
1da177e4 LT |
346 | while (data->currvid > reqvid) { |
347 | dprintk("ph1: curr 0x%x, req vid 0x%x\n", | |
348 | data->currvid, reqvid); | |
349 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
350 | return 1; | |
351 | } | |
352 | ||
065b807c DJ |
353 | while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { |
354 | if (data->currvid == maxvid) { | |
1da177e4 LT |
355 | rvosteps = 0; |
356 | } else { | |
357 | dprintk("ph1: changing vid for rvo, req 0x%x\n", | |
358 | data->currvid - 1); | |
0e64a0c9 | 359 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
360 | return 1; |
361 | rvosteps--; | |
362 | } | |
363 | } | |
364 | ||
365 | if (query_current_values_with_pending_wait(data)) | |
366 | return 1; | |
367 | ||
368 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
369 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", |
370 | data->currfid); | |
1da177e4 LT |
371 | return 1; |
372 | } | |
373 | ||
374 | dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", | |
375 | data->currfid, data->currvid); | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
380 | /* Phase 2 - core frequency transition */ | |
381 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
382 | { | |
0e64a0c9 DJ |
383 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
384 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 385 | |
0e64a0c9 DJ |
386 | if ((reqfid < HI_FID_TABLE_BOTTOM) && |
387 | (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
388 | printk(KERN_ERR PFX "ph2: illegal lo-lo transition " | |
389 | "0x%x 0x%x\n", reqfid, data->currfid); | |
1da177e4 LT |
390 | return 1; |
391 | } | |
392 | ||
393 | if (data->currfid == reqfid) { | |
0e64a0c9 DJ |
394 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", |
395 | data->currfid); | |
1da177e4 LT |
396 | return 0; |
397 | } | |
398 | ||
0e64a0c9 DJ |
399 | dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, " |
400 | "reqfid 0x%x\n", | |
1da177e4 LT |
401 | smp_processor_id(), |
402 | data->currfid, data->currvid, reqfid); | |
403 | ||
404 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
405 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
406 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
407 | : vcoreqfid - vcocurrfid; | |
408 | ||
409 | while (vcofiddiff > 2) { | |
019a61b9 LM |
410 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
411 | ||
1da177e4 LT |
412 | if (reqfid > data->currfid) { |
413 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
414 | if (write_new_fid(data, |
415 | data->currfid + fid_interval)) | |
1da177e4 | 416 | return 1; |
1da177e4 LT |
417 | } else { |
418 | if (write_new_fid | |
0e64a0c9 DJ |
419 | (data, |
420 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 421 | return 1; |
1da177e4 LT |
422 | } |
423 | } else { | |
019a61b9 | 424 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
425 | return 1; |
426 | } | |
427 | ||
428 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
429 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
430 | : vcoreqfid - vcocurrfid; | |
431 | } | |
432 | ||
433 | if (write_new_fid(data, reqfid)) | |
434 | return 1; | |
435 | ||
436 | if (query_current_values_with_pending_wait(data)) | |
437 | return 1; | |
438 | ||
439 | if (data->currfid != reqfid) { | |
440 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
441 | "ph2: mismatch, failed fid transition, " |
442 | "curr 0x%x, req 0x%x\n", | |
1da177e4 LT |
443 | data->currfid, reqfid); |
444 | return 1; | |
445 | } | |
446 | ||
447 | if (savevid != data->currvid) { | |
448 | printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", | |
449 | savevid, data->currvid); | |
450 | return 1; | |
451 | } | |
452 | ||
453 | dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", | |
454 | data->currfid, data->currvid); | |
455 | ||
456 | return 0; | |
457 | } | |
458 | ||
459 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
460 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
461 | u32 reqvid) | |
1da177e4 LT |
462 | { |
463 | u32 savefid = data->currfid; | |
464 | u32 savereqvid = reqvid; | |
465 | ||
466 | dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", | |
467 | smp_processor_id(), | |
468 | data->currfid, data->currvid); | |
469 | ||
470 | if (reqvid != data->currvid) { | |
471 | if (write_new_vid(data, reqvid)) | |
472 | return 1; | |
473 | ||
474 | if (savefid != data->currfid) { | |
475 | printk(KERN_ERR PFX | |
476 | "ph3: bad fid change, save 0x%x, curr 0x%x\n", | |
477 | savefid, data->currfid); | |
478 | return 1; | |
479 | } | |
480 | ||
481 | if (data->currvid != reqvid) { | |
482 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
483 | "ph3: failed vid transition\n, " |
484 | "req 0x%x, curr 0x%x", | |
1da177e4 LT |
485 | reqvid, data->currvid); |
486 | return 1; | |
487 | } | |
488 | } | |
489 | ||
490 | if (query_current_values_with_pending_wait(data)) | |
491 | return 1; | |
492 | ||
493 | if (savereqvid != data->currvid) { | |
494 | dprintk("ph3 failed, currvid 0x%x\n", data->currvid); | |
495 | return 1; | |
496 | } | |
497 | ||
498 | if (savefid != data->currfid) { | |
499 | dprintk("ph3 failed, currfid changed 0x%x\n", | |
500 | data->currfid); | |
501 | return 1; | |
502 | } | |
503 | ||
504 | dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", | |
505 | data->currfid, data->currvid); | |
506 | ||
507 | return 0; | |
508 | } | |
509 | ||
510 | static int check_supported_cpu(unsigned int cpu) | |
511 | { | |
fc0e4748 | 512 | cpumask_t oldmask; |
1da177e4 LT |
513 | u32 eax, ebx, ecx, edx; |
514 | unsigned int rc = 0; | |
515 | ||
516 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 517 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 LT |
518 | |
519 | if (smp_processor_id() != cpu) { | |
8aae8284 | 520 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu); |
1da177e4 LT |
521 | goto out; |
522 | } | |
523 | ||
524 | if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) | |
525 | goto out; | |
526 | ||
527 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
1f729e06 DJ |
528 | if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) && |
529 | ((eax & CPUID_XFAM) < CPUID_XFAM_10H)) | |
2c906ae6 DJ |
530 | goto out; |
531 | ||
1f729e06 DJ |
532 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
533 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 534 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
0e64a0c9 DJ |
535 | printk(KERN_INFO PFX |
536 | "Processor cpuid %x not supported\n", eax); | |
1f729e06 DJ |
537 | goto out; |
538 | } | |
1da177e4 | 539 | |
1f729e06 DJ |
540 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
541 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
542 | printk(KERN_INFO PFX | |
543 | "No frequency change capabilities detected\n"); | |
544 | goto out; | |
545 | } | |
1da177e4 | 546 | |
1f729e06 | 547 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
548 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
549 | != P_STATE_TRANSITION_CAPABLE) { | |
550 | printk(KERN_INFO PFX | |
551 | "Power state transitions not supported\n"); | |
1f729e06 DJ |
552 | goto out; |
553 | } | |
554 | } else { /* must be a HW Pstate capable processor */ | |
555 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); | |
556 | if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE) | |
557 | cpu_family = CPU_HW_PSTATE; | |
558 | else | |
559 | goto out; | |
1da177e4 LT |
560 | } |
561 | ||
562 | rc = 1; | |
563 | ||
564 | out: | |
fc0e4748 | 565 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 566 | return rc; |
1da177e4 LT |
567 | } |
568 | ||
0e64a0c9 DJ |
569 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
570 | u8 maxvid) | |
1da177e4 LT |
571 | { |
572 | unsigned int j; | |
573 | u8 lastfid = 0xff; | |
574 | ||
575 | for (j = 0; j < data->numps; j++) { | |
576 | if (pst[j].vid > LEAST_VID) { | |
2fd47094 TR |
577 | printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n", |
578 | j, pst[j].vid); | |
1da177e4 LT |
579 | return -EINVAL; |
580 | } | |
0e64a0c9 DJ |
581 | if (pst[j].vid < data->rvo) { |
582 | /* vid + rvo >= 0 */ | |
2fd47094 TR |
583 | printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate" |
584 | " %d\n", j); | |
1da177e4 LT |
585 | return -ENODEV; |
586 | } | |
0e64a0c9 DJ |
587 | if (pst[j].vid < maxvid + data->rvo) { |
588 | /* vid + rvo >= maxvid */ | |
2fd47094 TR |
589 | printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate" |
590 | " %d\n", j); | |
1da177e4 LT |
591 | return -ENODEV; |
592 | } | |
8aae8284 | 593 | if (pst[j].fid > MAX_FID) { |
2fd47094 TR |
594 | printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate" |
595 | " %d\n", j); | |
8aae8284 JS |
596 | return -ENODEV; |
597 | } | |
8aae8284 | 598 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 599 | /* Only first fid is allowed to be in "low" range */ |
2fd47094 TR |
600 | printk(KERN_ERR FW_BUG PFX "two low fids - %d : " |
601 | "0x%x\n", j, pst[j].fid); | |
1da177e4 LT |
602 | return -EINVAL; |
603 | } | |
604 | if (pst[j].fid < lastfid) | |
605 | lastfid = pst[j].fid; | |
606 | } | |
607 | if (lastfid & 1) { | |
2fd47094 | 608 | printk(KERN_ERR FW_BUG PFX "lastfid invalid\n"); |
1da177e4 LT |
609 | return -EINVAL; |
610 | } | |
611 | if (lastfid > LO_FID_TABLE_TOP) | |
0e64a0c9 DJ |
612 | printk(KERN_INFO FW_BUG PFX |
613 | "first fid not from lo freq table\n"); | |
1da177e4 LT |
614 | |
615 | return 0; | |
616 | } | |
617 | ||
0e64a0c9 DJ |
618 | static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry) |
619 | { | |
620 | data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; | |
621 | } | |
622 | ||
1da177e4 LT |
623 | static void print_basics(struct powernow_k8_data *data) |
624 | { | |
625 | int j; | |
626 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
627 | if (data->powernow_table[j].frequency != |
628 | CPUFREQ_ENTRY_INVALID) { | |
e7bdd7a5 | 629 | if (cpu_family == CPU_HW_PSTATE) { |
0e64a0c9 DJ |
630 | printk(KERN_INFO PFX |
631 | " %d : pstate %d (%d MHz)\n", j, | |
4ae5c49f | 632 | data->powernow_table[j].index, |
9a60ddbc | 633 | data->powernow_table[j].frequency/1000); |
1f729e06 | 634 | } else { |
0e64a0c9 DJ |
635 | printk(KERN_INFO PFX |
636 | " %d : fid 0x%x (%d MHz), vid 0x%x\n", | |
9a60ddbc DJ |
637 | j, |
638 | data->powernow_table[j].index & 0xff, | |
639 | data->powernow_table[j].frequency/1000, | |
640 | data->powernow_table[j].index >> 8); | |
1f729e06 DJ |
641 | } |
642 | } | |
1da177e4 LT |
643 | } |
644 | if (data->batps) | |
0e64a0c9 DJ |
645 | printk(KERN_INFO PFX "Only %d pstates on battery\n", |
646 | data->batps); | |
1da177e4 LT |
647 | } |
648 | ||
0e64a0c9 DJ |
649 | static int fill_powernow_table(struct powernow_k8_data *data, |
650 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
651 | { |
652 | struct cpufreq_frequency_table *powernow_table; | |
653 | unsigned int j; | |
654 | ||
0e64a0c9 DJ |
655 | if (data->batps) { |
656 | /* use ACPI support to get full speed on mains power */ | |
657 | printk(KERN_WARNING PFX | |
658 | "Only %d pstates usable (use ACPI driver for full " | |
659 | "range\n", data->batps); | |
1da177e4 LT |
660 | data->numps = data->batps; |
661 | } | |
662 | ||
0e64a0c9 | 663 | for (j = 1; j < data->numps; j++) { |
1da177e4 LT |
664 | if (pst[j-1].fid >= pst[j].fid) { |
665 | printk(KERN_ERR PFX "PST out of sequence\n"); | |
666 | return -EINVAL; | |
667 | } | |
668 | } | |
669 | ||
670 | if (data->numps < 2) { | |
671 | printk(KERN_ERR PFX "no p states to transition\n"); | |
672 | return -ENODEV; | |
673 | } | |
674 | ||
675 | if (check_pst_table(data, pst, maxvid)) | |
676 | return -EINVAL; | |
677 | ||
678 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
679 | * (data->numps + 1)), GFP_KERNEL); | |
680 | if (!powernow_table) { | |
681 | printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); | |
682 | return -ENOMEM; | |
683 | } | |
684 | ||
685 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 686 | int freq; |
1da177e4 LT |
687 | powernow_table[j].index = pst[j].fid; /* lower 8 bits */ |
688 | powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
689 | freq = find_khz_freq_from_fid(pst[j].fid); |
690 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
691 | } |
692 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
693 | powernow_table[data->numps].index = 0; | |
694 | ||
695 | if (query_current_values_with_pending_wait(data)) { | |
696 | kfree(powernow_table); | |
697 | return -EIO; | |
698 | } | |
699 | ||
700 | dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); | |
701 | data->powernow_table = powernow_table; | |
08357611 | 702 | if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu) |
2e497620 | 703 | print_basics(data); |
1da177e4 LT |
704 | |
705 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
706 | if ((pst[j].fid == data->currfid) && |
707 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
708 | return 0; |
709 | ||
710 | dprintk("currfid/vid do not match PST, ignoring\n"); | |
711 | return 0; | |
712 | } | |
713 | ||
714 | /* Find and validate the PSB/PST table in BIOS. */ | |
715 | static int find_psb_table(struct powernow_k8_data *data) | |
716 | { | |
717 | struct psb_s *psb; | |
718 | unsigned int i; | |
719 | u32 mvs; | |
720 | u8 maxvid; | |
721 | u32 cpst = 0; | |
722 | u32 thiscpuid; | |
723 | ||
724 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
725 | /* Scan BIOS looking for the signature. */ | |
726 | /* It can not be at ffff0 - it is too big. */ | |
727 | ||
728 | psb = phys_to_virt(i); | |
729 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
730 | continue; | |
731 | ||
732 | dprintk("found PSB header at 0x%p\n", psb); | |
733 | ||
734 | dprintk("table vers: 0x%x\n", psb->tableversion); | |
735 | if (psb->tableversion != PSB_VERSION_1_4) { | |
2fd47094 | 736 | printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n"); |
1da177e4 LT |
737 | return -ENODEV; |
738 | } | |
739 | ||
740 | dprintk("flags: 0x%x\n", psb->flags1); | |
741 | if (psb->flags1) { | |
2fd47094 | 742 | printk(KERN_ERR FW_BUG PFX "unknown flags\n"); |
1da177e4 LT |
743 | return -ENODEV; |
744 | } | |
745 | ||
746 | data->vstable = psb->vstable; | |
0e64a0c9 DJ |
747 | dprintk("voltage stabilization time: %d(*20us)\n", |
748 | data->vstable); | |
1da177e4 LT |
749 | |
750 | dprintk("flags2: 0x%x\n", psb->flags2); | |
751 | data->rvo = psb->flags2 & 3; | |
752 | data->irt = ((psb->flags2) >> 2) & 3; | |
753 | mvs = ((psb->flags2) >> 4) & 3; | |
754 | data->vidmvs = 1 << mvs; | |
755 | data->batps = ((psb->flags2) >> 6) & 3; | |
756 | ||
757 | dprintk("ramp voltage offset: %d\n", data->rvo); | |
758 | dprintk("isochronous relief time: %d\n", data->irt); | |
759 | dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
760 | ||
761 | dprintk("numpst: 0x%x\n", psb->num_tables); | |
762 | cpst = psb->num_tables; | |
0e64a0c9 DJ |
763 | if ((psb->cpuid == 0x00000fc0) || |
764 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 765 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
766 | if ((thiscpuid == 0x00000fc0) || |
767 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 768 | cpst = 1; |
1da177e4 LT |
769 | } |
770 | if (cpst != 1) { | |
2fd47094 | 771 | printk(KERN_ERR FW_BUG PFX "numpst must be 1\n"); |
1da177e4 LT |
772 | return -ENODEV; |
773 | } | |
774 | ||
775 | data->plllock = psb->plllocktime; | |
776 | dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); | |
777 | dprintk("maxfid: 0x%x\n", psb->maxfid); | |
778 | dprintk("maxvid: 0x%x\n", psb->maxvid); | |
779 | maxvid = psb->maxvid; | |
780 | ||
781 | data->numps = psb->numps; | |
782 | dprintk("numpstates: 0x%x\n", data->numps); | |
0e64a0c9 DJ |
783 | return fill_powernow_table(data, |
784 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
785 | } |
786 | /* | |
787 | * If you see this message, complain to BIOS manufacturer. If | |
788 | * he tells you "we do not support Linux" or some similar | |
789 | * nonsense, remember that Windows 2000 uses the same legacy | |
790 | * mechanism that the old Linux PSB driver uses. Tell them it | |
791 | * is broken with Windows 2000. | |
792 | * | |
793 | * The reference to the AMD documentation is chapter 9 in the | |
794 | * BIOS and Kernel Developer's Guide, which is available on | |
795 | * www.amd.com | |
796 | */ | |
79cc56af | 797 | printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n"); |
1da177e4 LT |
798 | return -ENODEV; |
799 | } | |
800 | ||
0e64a0c9 DJ |
801 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
802 | unsigned int index) | |
1da177e4 | 803 | { |
0e64a0c9 DJ |
804 | acpi_integer control; |
805 | ||
f607e3a0 | 806 | if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE)) |
1da177e4 LT |
807 | return; |
808 | ||
0e64a0c9 DJ |
809 | control = data->acpi_data.states[index].control; data->irt = (control |
810 | >> IRT_SHIFT) & IRT_MASK; data->rvo = (control >> | |
811 | RVO_SHIFT) & RVO_MASK; data->exttype = (control | |
812 | >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
813 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; data->vidmvs = 1 | |
814 | << ((control >> MVS_SHIFT) & MVS_MASK); data->vstable = | |
815 | (control >> VST_SHIFT) & VST_MASK; } | |
1da177e4 LT |
816 | |
817 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
818 | { | |
1da177e4 | 819 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 820 | int ret_val = -ENODEV; |
0e64a0c9 | 821 | acpi_integer space_id; |
1da177e4 | 822 | |
f607e3a0 | 823 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
065b807c | 824 | dprintk("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
825 | return -EIO; |
826 | } | |
827 | ||
828 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 829 | if (data->acpi_data.state_count <= 1) { |
1da177e4 LT |
830 | dprintk("No ACPI P-States\n"); |
831 | goto err_out; | |
832 | } | |
833 | ||
0e64a0c9 DJ |
834 | space_id = data->acpi_data.control_register.space_id; |
835 | if ((space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
836 | (space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
1da177e4 | 837 | dprintk("Invalid control/status registers (%x - %x)\n", |
f607e3a0 | 838 | data->acpi_data.control_register.space_id, |
0e64a0c9 | 839 | space_id); |
1da177e4 LT |
840 | goto err_out; |
841 | } | |
842 | ||
843 | /* fill in data->powernow_table */ | |
844 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
f607e3a0 | 845 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 LT |
846 | if (!powernow_table) { |
847 | dprintk("powernow_table memory alloc failure\n"); | |
848 | goto err_out; | |
849 | } | |
850 | ||
e7bdd7a5 | 851 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
852 | ret_val = fill_powernow_table_pstate(data, powernow_table); |
853 | else | |
854 | ret_val = fill_powernow_table_fidvid(data, powernow_table); | |
855 | if (ret_val) | |
856 | goto err_out_mem; | |
857 | ||
0e64a0c9 DJ |
858 | powernow_table[data->acpi_data.state_count].frequency = |
859 | CPUFREQ_TABLE_END; | |
f607e3a0 | 860 | powernow_table[data->acpi_data.state_count].index = 0; |
1f729e06 DJ |
861 | data->powernow_table = powernow_table; |
862 | ||
863 | /* fill in data */ | |
f607e3a0 | 864 | data->numps = data->acpi_data.state_count; |
08357611 | 865 | if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu) |
2e497620 | 866 | print_basics(data); |
1f729e06 DJ |
867 | powernow_k8_acpi_pst_values(data, 0); |
868 | ||
869 | /* notify BIOS that we exist */ | |
870 | acpi_processor_notify_smm(THIS_MODULE); | |
871 | ||
2fdf66b4 RR |
872 | if (!alloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
873 | printk(KERN_ERR PFX | |
874 | "unable to alloc powernow_k8_data cpumask\n"); | |
875 | ret_val = -ENOMEM; | |
876 | goto err_out_mem; | |
877 | } | |
878 | ||
1f729e06 DJ |
879 | return 0; |
880 | ||
881 | err_out_mem: | |
882 | kfree(powernow_table); | |
883 | ||
884 | err_out: | |
f607e3a0 | 885 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
1f729e06 | 886 | |
0e64a0c9 DJ |
887 | /* data->acpi_data.state_count informs us at ->exit() |
888 | * whether ACPI was used */ | |
f607e3a0 | 889 | data->acpi_data.state_count = 0; |
1f729e06 | 890 | |
2fdf66b4 | 891 | return ret_val; |
1f729e06 DJ |
892 | } |
893 | ||
0e64a0c9 DJ |
894 | static int fill_powernow_table_pstate(struct powernow_k8_data *data, |
895 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
896 | { |
897 | int i; | |
c5829cd0 ML |
898 | u32 hi = 0, lo = 0; |
899 | rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo); | |
900 | data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT; | |
1f729e06 | 901 | |
f607e3a0 | 902 | for (i = 0; i < data->acpi_data.state_count; i++) { |
1f729e06 | 903 | u32 index; |
1f729e06 | 904 | |
f607e3a0 | 905 | index = data->acpi_data.states[i].control & HW_PSTATE_MASK; |
c5829cd0 | 906 | if (index > data->max_hw_pstate) { |
0e64a0c9 DJ |
907 | printk(KERN_ERR PFX "invalid pstate %d - " |
908 | "bad value %d.\n", i, index); | |
909 | printk(KERN_ERR PFX "Please report to BIOS " | |
910 | "manufacturer\n"); | |
911 | invalidate_entry(data, i); | |
c5829cd0 | 912 | continue; |
1f729e06 DJ |
913 | } |
914 | rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); | |
915 | if (!(hi & HW_PSTATE_VALID_MASK)) { | |
916 | dprintk("invalid pstate %d, ignoring\n", index); | |
0e64a0c9 | 917 | invalidate_entry(data, i); |
1f729e06 DJ |
918 | continue; |
919 | } | |
920 | ||
c5829cd0 | 921 | powernow_table[i].index = index; |
1f729e06 | 922 | |
0e64a0c9 DJ |
923 | powernow_table[i].frequency = |
924 | data->acpi_data.states[i].core_frequency * 1000; | |
1f729e06 DJ |
925 | } |
926 | return 0; | |
927 | } | |
928 | ||
0e64a0c9 DJ |
929 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
930 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
931 | { |
932 | int i; | |
933 | int cntlofreq = 0; | |
0e64a0c9 | 934 | |
f607e3a0 | 935 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
936 | u32 fid; |
937 | u32 vid; | |
0e64a0c9 DJ |
938 | u32 freq, index; |
939 | acpi_integer status, control; | |
094ce7fd DJ |
940 | |
941 | if (data->exttype) { | |
0e64a0c9 DJ |
942 | status = data->acpi_data.states[i].status; |
943 | fid = status & EXT_FID_MASK; | |
944 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 945 | } else { |
0e64a0c9 DJ |
946 | control = data->acpi_data.states[i].control; |
947 | fid = control & FID_MASK; | |
948 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 949 | } |
1da177e4 LT |
950 | |
951 | dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); | |
952 | ||
0e64a0c9 DJ |
953 | index = fid | (vid<<8); |
954 | powernow_table[i].index = index; | |
955 | ||
956 | freq = find_khz_freq_from_fid(fid); | |
957 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
958 | |
959 | /* verify frequency is OK */ | |
0e64a0c9 DJ |
960 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
961 | dprintk("invalid freq %u kHz, ignoring\n", freq); | |
962 | invalidate_entry(data, i); | |
1da177e4 LT |
963 | continue; |
964 | } | |
965 | ||
0e64a0c9 DJ |
966 | /* verify voltage is OK - |
967 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 968 | if (vid == VID_OFF) { |
1da177e4 | 969 | dprintk("invalid vid %u, ignoring\n", vid); |
0e64a0c9 | 970 | invalidate_entry(data, i); |
1da177e4 LT |
971 | continue; |
972 | } | |
973 | ||
065b807c DJ |
974 | /* verify only 1 entry from the lo frequency table */ |
975 | if (fid < HI_FID_TABLE_BOTTOM) { | |
976 | if (cntlofreq) { | |
0e64a0c9 DJ |
977 | /* if both entries are the same, |
978 | * ignore this one ... */ | |
979 | if ((freq != powernow_table[cntlofreq].frequency) || | |
980 | (index != powernow_table[cntlofreq].index)) { | |
981 | printk(KERN_ERR PFX | |
982 | "Too many lo freq table " | |
983 | "entries\n"); | |
1f729e06 | 984 | return 1; |
065b807c DJ |
985 | } |
986 | ||
0e64a0c9 DJ |
987 | dprintk("double low frequency table entry, " |
988 | "ignoring it.\n"); | |
989 | invalidate_entry(data, i); | |
065b807c DJ |
990 | continue; |
991 | } else | |
992 | cntlofreq = i; | |
1da177e4 LT |
993 | } |
994 | ||
0e64a0c9 DJ |
995 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
996 | printk(KERN_INFO PFX "invalid freq entries " | |
997 | "%u kHz vs. %u kHz\n", freq, | |
998 | (unsigned int) | |
999 | (data->acpi_data.states[i].core_frequency | |
1000 | * 1000)); | |
1001 | invalidate_entry(data, i); | |
1da177e4 LT |
1002 | continue; |
1003 | } | |
1004 | } | |
1da177e4 | 1005 | return 0; |
1da177e4 LT |
1006 | } |
1007 | ||
1008 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
1009 | { | |
f607e3a0 | 1010 | if (data->acpi_data.state_count) |
0e64a0c9 DJ |
1011 | acpi_processor_unregister_performance(&data->acpi_data, |
1012 | data->cpu); | |
2fdf66b4 | 1013 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
1014 | } |
1015 | ||
732553e5 ML |
1016 | static int get_transition_latency(struct powernow_k8_data *data) |
1017 | { | |
1018 | int max_latency = 0; | |
1019 | int i; | |
1020 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
1021 | int cur_latency = data->acpi_data.states[i].transition_latency | |
1022 | + data->acpi_data.states[i].bus_master_latency; | |
1023 | if (cur_latency > max_latency) | |
1024 | max_latency = cur_latency; | |
1025 | } | |
1026 | /* value in usecs, needs to be in nanoseconds */ | |
1027 | return 1000 * max_latency; | |
1028 | } | |
1029 | ||
1da177e4 | 1030 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 DJ |
1031 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
1032 | unsigned int index) | |
1da177e4 | 1033 | { |
1f729e06 DJ |
1034 | u32 fid = 0; |
1035 | u32 vid = 0; | |
065b807c | 1036 | int res, i; |
1da177e4 LT |
1037 | struct cpufreq_freqs freqs; |
1038 | ||
1039 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
1040 | ||
1f729e06 | 1041 | /* fid/vid correctness check for k8 */ |
1da177e4 | 1042 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
1043 | * the cpufreq frequency table in find_psb_table, vid |
1044 | * are the upper 8 bits. | |
1da177e4 | 1045 | */ |
1da177e4 LT |
1046 | fid = data->powernow_table[index].index & 0xFF; |
1047 | vid = (data->powernow_table[index].index & 0xFF00) >> 8; | |
1048 | ||
1049 | dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); | |
1050 | ||
1051 | if (query_current_values_with_pending_wait(data)) | |
1052 | return 1; | |
1053 | ||
1054 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
1055 | dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", | |
1056 | fid, vid); | |
1057 | return 0; | |
1058 | } | |
1059 | ||
0e64a0c9 DJ |
1060 | if ((fid < HI_FID_TABLE_BOTTOM) && |
1061 | (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
065b807c DJ |
1062 | printk(KERN_ERR PFX |
1063 | "ignoring illegal change in lo freq table-%x to 0x%x\n", | |
1da177e4 LT |
1064 | data->currfid, fid); |
1065 | return 1; | |
1066 | } | |
1067 | ||
1068 | dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", | |
1069 | smp_processor_id(), fid, vid); | |
1da177e4 LT |
1070 | freqs.old = find_khz_freq_from_fid(data->currfid); |
1071 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 1072 | |
334ef7a7 | 1073 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
1074 | freqs.cpu = i; |
1075 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
1076 | } | |
1da177e4 | 1077 | |
1da177e4 | 1078 | res = transition_fid_vid(data, fid, vid); |
1da177e4 | 1079 | freqs.new = find_khz_freq_from_fid(data->currfid); |
1f729e06 | 1080 | |
334ef7a7 | 1081 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
1082 | freqs.cpu = i; |
1083 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
1084 | } | |
1085 | return res; | |
1086 | } | |
1087 | ||
1088 | /* Take a frequency, and issue the hardware pstate transition command */ | |
0e64a0c9 DJ |
1089 | static int transition_frequency_pstate(struct powernow_k8_data *data, |
1090 | unsigned int index) | |
1f729e06 | 1091 | { |
1f729e06 DJ |
1092 | u32 pstate = 0; |
1093 | int res, i; | |
1094 | struct cpufreq_freqs freqs; | |
1095 | ||
1096 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
1097 | ||
c5829cd0 | 1098 | /* get MSR index for hardware pstate transition */ |
1f729e06 | 1099 | pstate = index & HW_PSTATE_MASK; |
c5829cd0 | 1100 | if (pstate > data->max_hw_pstate) |
1f729e06 | 1101 | return 0; |
0e64a0c9 DJ |
1102 | freqs.old = find_khz_freq_from_pstate(data->powernow_table, |
1103 | data->currpstate); | |
c5829cd0 | 1104 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); |
1f729e06 | 1105 | |
334ef7a7 | 1106 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
1107 | freqs.cpu = i; |
1108 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
1109 | } | |
1110 | ||
1111 | res = transition_pstate(data, pstate); | |
c5829cd0 | 1112 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); |
1f729e06 | 1113 | |
334ef7a7 | 1114 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
1115 | freqs.cpu = i; |
1116 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
2e3f8faa | 1117 | } |
1da177e4 LT |
1118 | return res; |
1119 | } | |
1120 | ||
1121 | /* Driver entry point to switch to the target frequency */ | |
0e64a0c9 DJ |
1122 | static int powernowk8_target(struct cpufreq_policy *pol, |
1123 | unsigned targfreq, unsigned relation) | |
1da177e4 | 1124 | { |
fc0e4748 | 1125 | cpumask_t oldmask; |
2c6b8c03 | 1126 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
1127 | u32 checkfid; |
1128 | u32 checkvid; | |
1da177e4 LT |
1129 | unsigned int newstate; |
1130 | int ret = -EIO; | |
1131 | ||
4211a303 JS |
1132 | if (!data) |
1133 | return -EINVAL; | |
1134 | ||
9180053c AB |
1135 | checkfid = data->currfid; |
1136 | checkvid = data->currvid; | |
1137 | ||
1da177e4 LT |
1138 | /* only run on specific CPU from here on */ |
1139 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1140 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1141 | |
1142 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1143 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1144 | goto err_out; |
1145 | } | |
1146 | ||
1147 | if (pending_bit_stuck()) { | |
1148 | printk(KERN_ERR PFX "failing targ, change pending bit set\n"); | |
1149 | goto err_out; | |
1150 | } | |
1151 | ||
1152 | dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", | |
1153 | pol->cpu, targfreq, pol->min, pol->max, relation); | |
1154 | ||
83844510 | 1155 | if (query_current_values_with_pending_wait(data)) |
1da177e4 | 1156 | goto err_out; |
1da177e4 | 1157 | |
c5829cd0 | 1158 | if (cpu_family != CPU_HW_PSTATE) { |
1f729e06 | 1159 | dprintk("targ: curr fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
1160 | data->currfid, data->currvid); |
1161 | ||
0e64a0c9 DJ |
1162 | if ((checkvid != data->currvid) || |
1163 | (checkfid != data->currfid)) { | |
1f729e06 | 1164 | printk(KERN_INFO PFX |
0e64a0c9 DJ |
1165 | "error - out of sync, fix 0x%x 0x%x, " |
1166 | "vid 0x%x 0x%x\n", | |
1167 | checkfid, data->currfid, | |
1168 | checkvid, data->currvid); | |
1f729e06 | 1169 | } |
1da177e4 LT |
1170 | } |
1171 | ||
0e64a0c9 DJ |
1172 | if (cpufreq_frequency_table_target(pol, data->powernow_table, |
1173 | targfreq, relation, &newstate)) | |
1da177e4 LT |
1174 | goto err_out; |
1175 | ||
14cc3e2b | 1176 | mutex_lock(&fidvid_mutex); |
065b807c | 1177 | |
1da177e4 LT |
1178 | powernow_k8_acpi_pst_values(data, newstate); |
1179 | ||
e7bdd7a5 | 1180 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
1181 | ret = transition_frequency_pstate(data, newstate); |
1182 | else | |
1183 | ret = transition_frequency_fidvid(data, newstate); | |
1184 | if (ret) { | |
1da177e4 LT |
1185 | printk(KERN_ERR PFX "transition frequency failed\n"); |
1186 | ret = 1; | |
14cc3e2b | 1187 | mutex_unlock(&fidvid_mutex); |
1da177e4 LT |
1188 | goto err_out; |
1189 | } | |
14cc3e2b | 1190 | mutex_unlock(&fidvid_mutex); |
065b807c | 1191 | |
e7bdd7a5 | 1192 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1193 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, |
1194 | newstate); | |
1f729e06 DJ |
1195 | else |
1196 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1197 | ret = 0; |
1198 | ||
1199 | err_out: | |
fc0e4748 | 1200 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1201 | return ret; |
1202 | } | |
1203 | ||
1204 | /* Driver entry point to verify the policy and range of frequencies */ | |
1205 | static int powernowk8_verify(struct cpufreq_policy *pol) | |
1206 | { | |
2c6b8c03 | 1207 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 | 1208 | |
4211a303 JS |
1209 | if (!data) |
1210 | return -EINVAL; | |
1211 | ||
1da177e4 LT |
1212 | return cpufreq_frequency_table_verify(pol, data->powernow_table); |
1213 | } | |
1214 | ||
1215 | /* per CPU init entry point to the driver */ | |
aa41eb99 | 1216 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1217 | { |
1218 | struct powernow_k8_data *data; | |
f607e3a0 | 1219 | cpumask_t oldmask; |
d7fa706c | 1220 | int rc; |
79cc56af | 1221 | static int print_once; |
1da177e4 | 1222 | |
8aae8284 JS |
1223 | if (!cpu_online(pol->cpu)) |
1224 | return -ENODEV; | |
1225 | ||
1da177e4 LT |
1226 | if (!check_supported_cpu(pol->cpu)) |
1227 | return -ENODEV; | |
1228 | ||
bfdc708d | 1229 | data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); |
1da177e4 LT |
1230 | if (!data) { |
1231 | printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); | |
1232 | return -ENOMEM; | |
1233 | } | |
1da177e4 LT |
1234 | |
1235 | data->cpu = pol->cpu; | |
a266d9f1 | 1236 | data->currpstate = HW_PSTATE_INVALID; |
1da177e4 | 1237 | |
a0abd520 | 1238 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 LT |
1239 | /* |
1240 | * Use the PSB BIOS structure. This is only availabe on | |
1241 | * an UP version, and is deprecated by AMD. | |
1242 | */ | |
9ed059e1 | 1243 | if (num_online_cpus() != 1) { |
79cc56af TR |
1244 | /* |
1245 | * Replace this one with print_once as soon as such a | |
1246 | * thing gets introduced | |
1247 | */ | |
1248 | if (!print_once) { | |
1249 | WARN_ONCE(1, KERN_ERR FW_BUG PFX "Your BIOS " | |
1250 | "does not provide ACPI _PSS objects " | |
1251 | "in a way that Linux understands. " | |
1252 | "Please report this to the Linux ACPI" | |
1253 | " maintainers and complain to your " | |
1254 | "BIOS vendor.\n"); | |
1255 | print_once++; | |
1256 | } | |
a0abd520 RR |
1257 | kfree(data); |
1258 | return -ENODEV; | |
1da177e4 LT |
1259 | } |
1260 | if (pol->cpu != 0) { | |
2fd47094 TR |
1261 | printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " |
1262 | "CPU other than CPU0. Complain to your BIOS " | |
1263 | "vendor.\n"); | |
a0abd520 RR |
1264 | kfree(data); |
1265 | return -ENODEV; | |
1da177e4 LT |
1266 | } |
1267 | rc = find_psb_table(data); | |
1268 | if (rc) { | |
a0abd520 RR |
1269 | kfree(data); |
1270 | return -ENODEV; | |
1da177e4 | 1271 | } |
732553e5 ML |
1272 | /* Take a crude guess here. |
1273 | * That guess was in microseconds, so multiply with 1000 */ | |
1274 | pol->cpuinfo.transition_latency = ( | |
1275 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1276 | ((1 << data->irt) * 30)) * 1000; | |
1277 | } else /* ACPI _PSS objects available */ | |
1278 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1279 | |
1280 | /* only run on specific CPU from here on */ | |
1281 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1282 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1283 | |
1284 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1285 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1286 | goto err_out; |
1287 | } | |
1288 | ||
1289 | if (pending_bit_stuck()) { | |
1290 | printk(KERN_ERR PFX "failing init, change pending bit set\n"); | |
1291 | goto err_out; | |
1292 | } | |
1293 | ||
1294 | if (query_current_values_with_pending_wait(data)) | |
1295 | goto err_out; | |
1296 | ||
e7bdd7a5 | 1297 | if (cpu_family == CPU_OPTERON) |
1f729e06 | 1298 | fidvid_msr_init(); |
1da177e4 LT |
1299 | |
1300 | /* run on any CPU again */ | |
fc0e4748 | 1301 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 1302 | |
f607e3a0 | 1303 | if (cpu_family == CPU_HW_PSTATE) |
835481d9 | 1304 | cpumask_copy(pol->cpus, cpumask_of(pol->cpu)); |
f607e3a0 | 1305 | else |
835481d9 RR |
1306 | cpumask_copy(pol->cpus, &per_cpu(cpu_core_map, pol->cpu)); |
1307 | data->available_cores = pol->cpus; | |
1da177e4 | 1308 | |
e7bdd7a5 | 1309 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1310 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, |
1311 | data->currpstate); | |
1f729e06 DJ |
1312 | else |
1313 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1314 | dprintk("policy current frequency %d kHz\n", pol->cur); |
1315 | ||
1316 | /* min/max the cpu is capable of */ | |
1317 | if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { | |
2fd47094 | 1318 | printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n"); |
1da177e4 LT |
1319 | powernow_k8_cpu_exit_acpi(data); |
1320 | kfree(data->powernow_table); | |
1321 | kfree(data); | |
1322 | return -EINVAL; | |
1323 | } | |
1324 | ||
1325 | cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); | |
1326 | ||
e7bdd7a5 | 1327 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1328 | dprintk("cpu_init done, current pstate 0x%x\n", |
1329 | data->currpstate); | |
1f729e06 DJ |
1330 | else |
1331 | dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n", | |
1332 | data->currfid, data->currvid); | |
1da177e4 | 1333 | |
2c6b8c03 | 1334 | per_cpu(powernow_data, pol->cpu) = data; |
1da177e4 LT |
1335 | |
1336 | return 0; | |
1337 | ||
1338 | err_out: | |
fc0e4748 | 1339 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1340 | powernow_k8_cpu_exit_acpi(data); |
1341 | ||
1342 | kfree(data); | |
1343 | return -ENODEV; | |
1344 | } | |
1345 | ||
0e64a0c9 | 1346 | static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1347 | { |
2c6b8c03 | 1348 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 LT |
1349 | |
1350 | if (!data) | |
1351 | return -EINVAL; | |
1352 | ||
1353 | powernow_k8_cpu_exit_acpi(data); | |
1354 | ||
1355 | cpufreq_frequency_table_put_attr(pol->cpu); | |
1356 | ||
1357 | kfree(data->powernow_table); | |
1358 | kfree(data); | |
1359 | ||
1360 | return 0; | |
1361 | } | |
1362 | ||
0e64a0c9 | 1363 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1364 | { |
eef5167e | 1365 | struct powernow_k8_data *data; |
1da177e4 LT |
1366 | cpumask_t oldmask = current->cpus_allowed; |
1367 | unsigned int khz = 0; | |
89c04849 | 1368 | unsigned int first; |
1da177e4 | 1369 | |
89c04849 DJ |
1370 | first = first_cpu(per_cpu(cpu_core_map, cpu)); |
1371 | data = per_cpu(powernow_data, first); | |
eef5167e JS |
1372 | |
1373 | if (!data) | |
1374 | return -EINVAL; | |
1375 | ||
0bc3cc03 | 1376 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 | 1377 | if (smp_processor_id() != cpu) { |
fc0e4748 MT |
1378 | printk(KERN_ERR PFX |
1379 | "limiting to CPU %d failed in powernowk8_get\n", cpu); | |
1380 | set_cpus_allowed_ptr(current, &oldmask); | |
1da177e4 LT |
1381 | return 0; |
1382 | } | |
b9111b7b | 1383 | |
1da177e4 LT |
1384 | if (query_current_values_with_pending_wait(data)) |
1385 | goto out; | |
1386 | ||
58389a86 | 1387 | if (cpu_family == CPU_HW_PSTATE) |
fc0e4748 MT |
1388 | khz = find_khz_freq_from_pstate(data->powernow_table, |
1389 | data->currpstate); | |
58389a86 JD |
1390 | else |
1391 | khz = find_khz_freq_from_fid(data->currfid); | |
1392 | ||
1da177e4 | 1393 | |
b9111b7b | 1394 | out: |
fc0e4748 | 1395 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1396 | return khz; |
1397 | } | |
1398 | ||
0e64a0c9 | 1399 | static struct freq_attr *powernow_k8_attr[] = { |
1da177e4 LT |
1400 | &cpufreq_freq_attr_scaling_available_freqs, |
1401 | NULL, | |
1402 | }; | |
1403 | ||
221dee28 | 1404 | static struct cpufreq_driver cpufreq_amd64_driver = { |
1da177e4 LT |
1405 | .verify = powernowk8_verify, |
1406 | .target = powernowk8_target, | |
1407 | .init = powernowk8_cpu_init, | |
1408 | .exit = __devexit_p(powernowk8_cpu_exit), | |
1409 | .get = powernowk8_get, | |
1410 | .name = "powernow-k8", | |
1411 | .owner = THIS_MODULE, | |
1412 | .attr = powernow_k8_attr, | |
1413 | }; | |
1414 | ||
1415 | /* driver entry point for init */ | |
aa41eb99 | 1416 | static int __cpuinit powernowk8_init(void) |
1da177e4 LT |
1417 | { |
1418 | unsigned int i, supported_cpus = 0; | |
1419 | ||
a7201156 | 1420 | for_each_online_cpu(i) { |
1da177e4 LT |
1421 | if (check_supported_cpu(i)) |
1422 | supported_cpus++; | |
1423 | } | |
1424 | ||
1425 | if (supported_cpus == num_online_cpus()) { | |
1f729e06 | 1426 | printk(KERN_INFO PFX "Found %d %s " |
904f7a3f | 1427 | "processors (%d cpu cores) (" VERSION ")\n", |
c925401b | 1428 | num_online_nodes(), |
904f7a3f | 1429 | boot_cpu_data.x86_model_id, supported_cpus); |
1da177e4 LT |
1430 | return cpufreq_register_driver(&cpufreq_amd64_driver); |
1431 | } | |
1432 | ||
1433 | return -ENODEV; | |
1434 | } | |
1435 | ||
1436 | /* driver entry point for term */ | |
1437 | static void __exit powernowk8_exit(void) | |
1438 | { | |
1439 | dprintk("exit\n"); | |
1440 | ||
1441 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1442 | } | |
1443 | ||
0e64a0c9 DJ |
1444 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and " |
1445 | "Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1446 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1447 | MODULE_LICENSE("GPL"); | |
1448 | ||
1449 | late_initcall(powernowk8_init); | |
1450 | module_exit(powernowk8_exit); |