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Commit | Line | Data |
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21335d02 | 1 | |
1da177e4 | 2 | /* |
1f729e06 | 3 | * (c) 2003-2006 Advanced Micro Devices, Inc. |
1da177e4 LT |
4 | * Your use of this code is subject to the terms and conditions of the |
5 | * GNU general public license version 2. See "COPYING" or | |
6 | * http://www.gnu.org/licenses/gpl.html | |
7 | * | |
065b807c | 8 | * Support : mark.langsdorf@amd.com |
1da177e4 LT |
9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 LT |
12 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
13 | * (C) 2004 Pavel Machek <pavel@suse.cz> | |
14 | * Licensed under the terms of the GNU GPL License version 2. | |
15 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
16 | * | |
17 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 18 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 19 | * Originally developed by Paul Devriendt. |
1da177e4 LT |
20 | * Processor information obtained from Chapter 9 (Power and Thermal Management) |
21 | * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD | |
22 | * Opteron Processors" available for download from www.amd.com | |
23 | * | |
2e3f8faa | 24 | * Tables for specific CPUs can be inferred from |
065b807c | 25 | * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf |
1da177e4 LT |
26 | */ |
27 | ||
28 | #include <linux/kernel.h> | |
29 | #include <linux/smp.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/cpufreq.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/string.h> | |
065b807c | 35 | #include <linux/cpumask.h> |
4e57b681 | 36 | #include <linux/sched.h> /* for current / set_cpus_allowed() */ |
0e64a0c9 DJ |
37 | #include <linux/io.h> |
38 | #include <linux/delay.h> | |
1da177e4 LT |
39 | |
40 | #include <asm/msr.h> | |
1da177e4 | 41 | |
1da177e4 | 42 | #include <linux/acpi.h> |
14cc3e2b | 43 | #include <linux/mutex.h> |
1da177e4 | 44 | #include <acpi/processor.h> |
1da177e4 LT |
45 | |
46 | #define PFX "powernow-k8: " | |
c5829cd0 | 47 | #define VERSION "version 2.20.00" |
1da177e4 LT |
48 | #include "powernow-k8.h" |
49 | ||
50 | /* serialize freq changes */ | |
14cc3e2b | 51 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 52 | |
2c6b8c03 | 53 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 54 | |
1f729e06 DJ |
55 | static int cpu_family = CPU_OPTERON; |
56 | ||
065b807c | 57 | #ifndef CONFIG_SMP |
7ad728f9 RR |
58 | static inline const struct cpumask *cpu_core_mask(int cpu) |
59 | { | |
60 | return cpumask_of(0); | |
61 | } | |
065b807c DJ |
62 | #endif |
63 | ||
1da177e4 LT |
64 | /* Return a frequency in MHz, given an input fid */ |
65 | static u32 find_freq_from_fid(u32 fid) | |
66 | { | |
67 | return 800 + (fid * 100); | |
68 | } | |
69 | ||
70 | /* Return a frequency in KHz, given an input fid */ | |
71 | static u32 find_khz_freq_from_fid(u32 fid) | |
72 | { | |
73 | return 1000 * find_freq_from_fid(fid); | |
74 | } | |
75 | ||
0e64a0c9 DJ |
76 | static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, |
77 | u32 pstate) | |
1f729e06 | 78 | { |
c5829cd0 | 79 | return data[pstate].frequency; |
1f729e06 DJ |
80 | } |
81 | ||
1da177e4 LT |
82 | /* Return the vco fid for an input fid |
83 | * | |
84 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
85 | * only from corresponding high fids. This returns "high" fid corresponding to | |
86 | * "low" one. | |
87 | */ | |
88 | static u32 convert_fid_to_vco_fid(u32 fid) | |
89 | { | |
32ee8c3e | 90 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 91 | return 8 + (2 * fid); |
32ee8c3e | 92 | else |
1da177e4 | 93 | return fid; |
1da177e4 LT |
94 | } |
95 | ||
96 | /* | |
97 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
98 | * to transition to a new state, seeing this bit set is really bad news. | |
99 | */ | |
100 | static int pending_bit_stuck(void) | |
101 | { | |
102 | u32 lo, hi; | |
103 | ||
e7bdd7a5 | 104 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
105 | return 0; |
106 | ||
1da177e4 LT |
107 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
108 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
109 | } | |
110 | ||
111 | /* | |
112 | * Update the global current fid / vid values from the status msr. | |
113 | * Returns 1 on error. | |
114 | */ | |
115 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
116 | { | |
117 | u32 lo, hi; | |
118 | u32 i = 0; | |
119 | ||
e7bdd7a5 | 120 | if (cpu_family == CPU_HW_PSTATE) { |
532cfee6 NC |
121 | rdmsr(MSR_PSTATE_STATUS, lo, hi); |
122 | i = lo & HW_PSTATE_MASK; | |
123 | data->currpstate = i; | |
124 | ||
125 | /* | |
126 | * a workaround for family 11h erratum 311 might cause | |
127 | * an "out-of-range Pstate if the core is in Pstate-0 | |
128 | */ | |
129 | if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps)) | |
130 | data->currpstate = HW_PSTATE_0; | |
131 | ||
1f729e06 DJ |
132 | return 0; |
133 | } | |
7153d961 | 134 | do { |
0213df74 DJ |
135 | if (i++ > 10000) { |
136 | dprintk("detected change pending stuck\n"); | |
1da177e4 LT |
137 | return 1; |
138 | } | |
139 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 140 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
141 | |
142 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
143 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | /* the isochronous relief time */ | |
149 | static void count_off_irt(struct powernow_k8_data *data) | |
150 | { | |
151 | udelay((1 << data->irt) * 10); | |
152 | return; | |
153 | } | |
154 | ||
27b46d76 | 155 | /* the voltage stabilization time */ |
1da177e4 LT |
156 | static void count_off_vst(struct powernow_k8_data *data) |
157 | { | |
158 | udelay(data->vstable * VST_UNITS_20US); | |
159 | return; | |
160 | } | |
161 | ||
162 | /* need to init the control msr to a safe value (for each cpu) */ | |
163 | static void fidvid_msr_init(void) | |
164 | { | |
165 | u32 lo, hi; | |
166 | u8 fid, vid; | |
167 | ||
168 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
169 | vid = hi & MSR_S_HI_CURRENT_VID; | |
170 | fid = lo & MSR_S_LO_CURRENT_FID; | |
171 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
172 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
173 | dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); | |
174 | wrmsr(MSR_FIDVID_CTL, lo, hi); | |
175 | } | |
176 | ||
1da177e4 LT |
177 | /* write the new fid value along with the other control fields to the msr */ |
178 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
179 | { | |
180 | u32 lo; | |
181 | u32 savevid = data->currvid; | |
0213df74 | 182 | u32 i = 0; |
1da177e4 LT |
183 | |
184 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
185 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); | |
186 | return 1; | |
187 | } | |
188 | ||
0e64a0c9 DJ |
189 | lo = fid; |
190 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
191 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 LT |
192 | |
193 | dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", | |
194 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); | |
195 | ||
0213df74 DJ |
196 | do { |
197 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
198 | if (i++ > 100) { | |
0e64a0c9 DJ |
199 | printk(KERN_ERR PFX |
200 | "Hardware error - pending bit very stuck - " | |
201 | "no further pstate changes possible\n"); | |
63172cb3 | 202 | return 1; |
32ee8c3e | 203 | } |
0213df74 | 204 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
205 | |
206 | count_off_irt(data); | |
207 | ||
208 | if (savevid != data->currvid) { | |
0e64a0c9 DJ |
209 | printk(KERN_ERR PFX |
210 | "vid change on fid trans, old 0x%x, new 0x%x\n", | |
211 | savevid, data->currvid); | |
1da177e4 LT |
212 | return 1; |
213 | } | |
214 | ||
215 | if (fid != data->currfid) { | |
0e64a0c9 DJ |
216 | printk(KERN_ERR PFX |
217 | "fid trans failed, fid 0x%x, curr 0x%x\n", fid, | |
218 | data->currfid); | |
1da177e4 LT |
219 | return 1; |
220 | } | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
225 | /* Write a new vid to the hardware */ | |
226 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
227 | { | |
228 | u32 lo; | |
229 | u32 savefid = data->currfid; | |
0213df74 | 230 | int i = 0; |
1da177e4 LT |
231 | |
232 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
233 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); | |
234 | return 1; | |
235 | } | |
236 | ||
0e64a0c9 DJ |
237 | lo = data->currfid; |
238 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
239 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 LT |
240 | |
241 | dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", | |
242 | vid, lo, STOP_GRANT_5NS); | |
243 | ||
0213df74 DJ |
244 | do { |
245 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 246 | if (i++ > 100) { |
0e64a0c9 DJ |
247 | printk(KERN_ERR PFX "internal error - pending bit " |
248 | "very stuck - no further pstate " | |
249 | "changes possible\n"); | |
6df89006 DJ |
250 | return 1; |
251 | } | |
0213df74 | 252 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
253 | |
254 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
255 | printk(KERN_ERR PFX "fid changed on vid trans, old " |
256 | "0x%x new 0x%x\n", | |
1da177e4 LT |
257 | savefid, data->currfid); |
258 | return 1; | |
259 | } | |
260 | ||
261 | if (vid != data->currvid) { | |
0e64a0c9 DJ |
262 | printk(KERN_ERR PFX "vid trans failed, vid 0x%x, " |
263 | "curr 0x%x\n", | |
264 | vid, data->currvid); | |
1da177e4 LT |
265 | return 1; |
266 | } | |
267 | ||
268 | return 0; | |
269 | } | |
270 | ||
271 | /* | |
272 | * Reduce the vid by the max of step or reqvid. | |
273 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 274 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 275 | */ |
0e64a0c9 DJ |
276 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
277 | u32 reqvid, u32 step) | |
1da177e4 LT |
278 | { |
279 | if ((data->currvid - reqvid) > step) | |
280 | reqvid = data->currvid - step; | |
281 | ||
282 | if (write_new_vid(data, reqvid)) | |
283 | return 1; | |
284 | ||
285 | count_off_vst(data); | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
1f729e06 DJ |
290 | /* Change hardware pstate by single MSR write */ |
291 | static int transition_pstate(struct powernow_k8_data *data, u32 pstate) | |
292 | { | |
293 | wrmsr(MSR_PSTATE_CTRL, pstate, 0); | |
c5829cd0 | 294 | data->currpstate = pstate; |
1f729e06 DJ |
295 | return 0; |
296 | } | |
297 | ||
298 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ | |
0e64a0c9 DJ |
299 | static int transition_fid_vid(struct powernow_k8_data *data, |
300 | u32 reqfid, u32 reqvid) | |
1da177e4 LT |
301 | { |
302 | if (core_voltage_pre_transition(data, reqvid)) | |
303 | return 1; | |
304 | ||
305 | if (core_frequency_transition(data, reqfid)) | |
306 | return 1; | |
307 | ||
308 | if (core_voltage_post_transition(data, reqvid)) | |
309 | return 1; | |
310 | ||
311 | if (query_current_values_with_pending_wait(data)) | |
312 | return 1; | |
313 | ||
314 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
0e64a0c9 DJ |
315 | printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, " |
316 | "curr 0x%x 0x%x\n", | |
1da177e4 LT |
317 | smp_processor_id(), |
318 | reqfid, reqvid, data->currfid, data->currvid); | |
319 | return 1; | |
320 | } | |
321 | ||
322 | dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", | |
323 | smp_processor_id(), data->currfid, data->currvid); | |
324 | ||
325 | return 0; | |
326 | } | |
327 | ||
328 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 DJ |
329 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
330 | u32 reqvid) | |
1da177e4 LT |
331 | { |
332 | u32 rvosteps = data->rvo; | |
333 | u32 savefid = data->currfid; | |
065b807c | 334 | u32 maxvid, lo; |
1da177e4 | 335 | |
0e64a0c9 DJ |
336 | dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, " |
337 | "reqvid 0x%x, rvo 0x%x\n", | |
1da177e4 LT |
338 | smp_processor_id(), |
339 | data->currfid, data->currvid, reqvid, data->rvo); | |
340 | ||
065b807c DJ |
341 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
342 | maxvid = 0x1f & (maxvid >> 16); | |
343 | dprintk("ph1 maxvid=0x%x\n", maxvid); | |
344 | if (reqvid < maxvid) /* lower numbers are higher voltages */ | |
345 | reqvid = maxvid; | |
346 | ||
1da177e4 LT |
347 | while (data->currvid > reqvid) { |
348 | dprintk("ph1: curr 0x%x, req vid 0x%x\n", | |
349 | data->currvid, reqvid); | |
350 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
351 | return 1; | |
352 | } | |
353 | ||
065b807c DJ |
354 | while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { |
355 | if (data->currvid == maxvid) { | |
1da177e4 LT |
356 | rvosteps = 0; |
357 | } else { | |
358 | dprintk("ph1: changing vid for rvo, req 0x%x\n", | |
359 | data->currvid - 1); | |
0e64a0c9 | 360 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
361 | return 1; |
362 | rvosteps--; | |
363 | } | |
364 | } | |
365 | ||
366 | if (query_current_values_with_pending_wait(data)) | |
367 | return 1; | |
368 | ||
369 | if (savefid != data->currfid) { | |
0e64a0c9 DJ |
370 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", |
371 | data->currfid); | |
1da177e4 LT |
372 | return 1; |
373 | } | |
374 | ||
375 | dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", | |
376 | data->currfid, data->currvid); | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | /* Phase 2 - core frequency transition */ | |
382 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
383 | { | |
0e64a0c9 DJ |
384 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
385 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 386 | |
0e64a0c9 DJ |
387 | if ((reqfid < HI_FID_TABLE_BOTTOM) && |
388 | (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
389 | printk(KERN_ERR PFX "ph2: illegal lo-lo transition " | |
390 | "0x%x 0x%x\n", reqfid, data->currfid); | |
1da177e4 LT |
391 | return 1; |
392 | } | |
393 | ||
394 | if (data->currfid == reqfid) { | |
0e64a0c9 DJ |
395 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", |
396 | data->currfid); | |
1da177e4 LT |
397 | return 0; |
398 | } | |
399 | ||
0e64a0c9 DJ |
400 | dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, " |
401 | "reqfid 0x%x\n", | |
1da177e4 LT |
402 | smp_processor_id(), |
403 | data->currfid, data->currvid, reqfid); | |
404 | ||
405 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
406 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
407 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
408 | : vcoreqfid - vcocurrfid; | |
409 | ||
410 | while (vcofiddiff > 2) { | |
019a61b9 LM |
411 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
412 | ||
1da177e4 LT |
413 | if (reqfid > data->currfid) { |
414 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
415 | if (write_new_fid(data, |
416 | data->currfid + fid_interval)) | |
1da177e4 | 417 | return 1; |
1da177e4 LT |
418 | } else { |
419 | if (write_new_fid | |
0e64a0c9 DJ |
420 | (data, |
421 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 422 | return 1; |
1da177e4 LT |
423 | } |
424 | } else { | |
019a61b9 | 425 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
426 | return 1; |
427 | } | |
428 | ||
429 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
430 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
431 | : vcoreqfid - vcocurrfid; | |
432 | } | |
433 | ||
434 | if (write_new_fid(data, reqfid)) | |
435 | return 1; | |
436 | ||
437 | if (query_current_values_with_pending_wait(data)) | |
438 | return 1; | |
439 | ||
440 | if (data->currfid != reqfid) { | |
441 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
442 | "ph2: mismatch, failed fid transition, " |
443 | "curr 0x%x, req 0x%x\n", | |
1da177e4 LT |
444 | data->currfid, reqfid); |
445 | return 1; | |
446 | } | |
447 | ||
448 | if (savevid != data->currvid) { | |
449 | printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", | |
450 | savevid, data->currvid); | |
451 | return 1; | |
452 | } | |
453 | ||
454 | dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", | |
455 | data->currfid, data->currvid); | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
460 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
461 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
462 | u32 reqvid) | |
1da177e4 LT |
463 | { |
464 | u32 savefid = data->currfid; | |
465 | u32 savereqvid = reqvid; | |
466 | ||
467 | dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", | |
468 | smp_processor_id(), | |
469 | data->currfid, data->currvid); | |
470 | ||
471 | if (reqvid != data->currvid) { | |
472 | if (write_new_vid(data, reqvid)) | |
473 | return 1; | |
474 | ||
475 | if (savefid != data->currfid) { | |
476 | printk(KERN_ERR PFX | |
477 | "ph3: bad fid change, save 0x%x, curr 0x%x\n", | |
478 | savefid, data->currfid); | |
479 | return 1; | |
480 | } | |
481 | ||
482 | if (data->currvid != reqvid) { | |
483 | printk(KERN_ERR PFX | |
0e64a0c9 DJ |
484 | "ph3: failed vid transition\n, " |
485 | "req 0x%x, curr 0x%x", | |
1da177e4 LT |
486 | reqvid, data->currvid); |
487 | return 1; | |
488 | } | |
489 | } | |
490 | ||
491 | if (query_current_values_with_pending_wait(data)) | |
492 | return 1; | |
493 | ||
494 | if (savereqvid != data->currvid) { | |
495 | dprintk("ph3 failed, currvid 0x%x\n", data->currvid); | |
496 | return 1; | |
497 | } | |
498 | ||
499 | if (savefid != data->currfid) { | |
500 | dprintk("ph3 failed, currfid changed 0x%x\n", | |
501 | data->currfid); | |
502 | return 1; | |
503 | } | |
504 | ||
505 | dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", | |
506 | data->currfid, data->currvid); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
511 | static int check_supported_cpu(unsigned int cpu) | |
512 | { | |
fc0e4748 | 513 | cpumask_t oldmask; |
1da177e4 LT |
514 | u32 eax, ebx, ecx, edx; |
515 | unsigned int rc = 0; | |
516 | ||
517 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 518 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 LT |
519 | |
520 | if (smp_processor_id() != cpu) { | |
8aae8284 | 521 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu); |
1da177e4 LT |
522 | goto out; |
523 | } | |
524 | ||
525 | if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) | |
526 | goto out; | |
527 | ||
528 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
1f729e06 DJ |
529 | if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) && |
530 | ((eax & CPUID_XFAM) < CPUID_XFAM_10H)) | |
2c906ae6 DJ |
531 | goto out; |
532 | ||
1f729e06 DJ |
533 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
534 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 535 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
0e64a0c9 DJ |
536 | printk(KERN_INFO PFX |
537 | "Processor cpuid %x not supported\n", eax); | |
1f729e06 DJ |
538 | goto out; |
539 | } | |
1da177e4 | 540 | |
1f729e06 DJ |
541 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
542 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
543 | printk(KERN_INFO PFX | |
544 | "No frequency change capabilities detected\n"); | |
545 | goto out; | |
546 | } | |
1da177e4 | 547 | |
1f729e06 | 548 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
549 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
550 | != P_STATE_TRANSITION_CAPABLE) { | |
551 | printk(KERN_INFO PFX | |
552 | "Power state transitions not supported\n"); | |
1f729e06 DJ |
553 | goto out; |
554 | } | |
555 | } else { /* must be a HW Pstate capable processor */ | |
556 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); | |
557 | if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE) | |
558 | cpu_family = CPU_HW_PSTATE; | |
559 | else | |
560 | goto out; | |
1da177e4 LT |
561 | } |
562 | ||
563 | rc = 1; | |
564 | ||
565 | out: | |
fc0e4748 | 566 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 567 | return rc; |
1da177e4 LT |
568 | } |
569 | ||
0e64a0c9 DJ |
570 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
571 | u8 maxvid) | |
1da177e4 LT |
572 | { |
573 | unsigned int j; | |
574 | u8 lastfid = 0xff; | |
575 | ||
576 | for (j = 0; j < data->numps; j++) { | |
577 | if (pst[j].vid > LEAST_VID) { | |
2fd47094 TR |
578 | printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n", |
579 | j, pst[j].vid); | |
1da177e4 LT |
580 | return -EINVAL; |
581 | } | |
0e64a0c9 DJ |
582 | if (pst[j].vid < data->rvo) { |
583 | /* vid + rvo >= 0 */ | |
2fd47094 TR |
584 | printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate" |
585 | " %d\n", j); | |
1da177e4 LT |
586 | return -ENODEV; |
587 | } | |
0e64a0c9 DJ |
588 | if (pst[j].vid < maxvid + data->rvo) { |
589 | /* vid + rvo >= maxvid */ | |
2fd47094 TR |
590 | printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate" |
591 | " %d\n", j); | |
1da177e4 LT |
592 | return -ENODEV; |
593 | } | |
8aae8284 | 594 | if (pst[j].fid > MAX_FID) { |
2fd47094 TR |
595 | printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate" |
596 | " %d\n", j); | |
8aae8284 JS |
597 | return -ENODEV; |
598 | } | |
8aae8284 | 599 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 600 | /* Only first fid is allowed to be in "low" range */ |
2fd47094 TR |
601 | printk(KERN_ERR FW_BUG PFX "two low fids - %d : " |
602 | "0x%x\n", j, pst[j].fid); | |
1da177e4 LT |
603 | return -EINVAL; |
604 | } | |
605 | if (pst[j].fid < lastfid) | |
606 | lastfid = pst[j].fid; | |
607 | } | |
608 | if (lastfid & 1) { | |
2fd47094 | 609 | printk(KERN_ERR FW_BUG PFX "lastfid invalid\n"); |
1da177e4 LT |
610 | return -EINVAL; |
611 | } | |
612 | if (lastfid > LO_FID_TABLE_TOP) | |
0e64a0c9 DJ |
613 | printk(KERN_INFO FW_BUG PFX |
614 | "first fid not from lo freq table\n"); | |
1da177e4 LT |
615 | |
616 | return 0; | |
617 | } | |
618 | ||
0e64a0c9 DJ |
619 | static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry) |
620 | { | |
621 | data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; | |
622 | } | |
623 | ||
1da177e4 LT |
624 | static void print_basics(struct powernow_k8_data *data) |
625 | { | |
626 | int j; | |
627 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
628 | if (data->powernow_table[j].frequency != |
629 | CPUFREQ_ENTRY_INVALID) { | |
e7bdd7a5 | 630 | if (cpu_family == CPU_HW_PSTATE) { |
0e64a0c9 DJ |
631 | printk(KERN_INFO PFX |
632 | " %d : pstate %d (%d MHz)\n", j, | |
4ae5c49f | 633 | data->powernow_table[j].index, |
9a60ddbc | 634 | data->powernow_table[j].frequency/1000); |
1f729e06 | 635 | } else { |
0e64a0c9 DJ |
636 | printk(KERN_INFO PFX |
637 | " %d : fid 0x%x (%d MHz), vid 0x%x\n", | |
9a60ddbc DJ |
638 | j, |
639 | data->powernow_table[j].index & 0xff, | |
640 | data->powernow_table[j].frequency/1000, | |
641 | data->powernow_table[j].index >> 8); | |
1f729e06 DJ |
642 | } |
643 | } | |
1da177e4 LT |
644 | } |
645 | if (data->batps) | |
0e64a0c9 DJ |
646 | printk(KERN_INFO PFX "Only %d pstates on battery\n", |
647 | data->batps); | |
1da177e4 LT |
648 | } |
649 | ||
ca446d06 AH |
650 | static u32 freq_from_fid_did(u32 fid, u32 did) |
651 | { | |
652 | u32 mhz = 0; | |
653 | ||
654 | if (boot_cpu_data.x86 == 0x10) | |
655 | mhz = (100 * (fid + 0x10)) >> did; | |
656 | else if (boot_cpu_data.x86 == 0x11) | |
657 | mhz = (100 * (fid + 8)) >> did; | |
658 | else | |
659 | BUG(); | |
660 | ||
661 | return mhz * 1000; | |
662 | } | |
663 | ||
0e64a0c9 DJ |
664 | static int fill_powernow_table(struct powernow_k8_data *data, |
665 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
666 | { |
667 | struct cpufreq_frequency_table *powernow_table; | |
668 | unsigned int j; | |
669 | ||
0e64a0c9 DJ |
670 | if (data->batps) { |
671 | /* use ACPI support to get full speed on mains power */ | |
672 | printk(KERN_WARNING PFX | |
673 | "Only %d pstates usable (use ACPI driver for full " | |
674 | "range\n", data->batps); | |
1da177e4 LT |
675 | data->numps = data->batps; |
676 | } | |
677 | ||
0e64a0c9 | 678 | for (j = 1; j < data->numps; j++) { |
1da177e4 LT |
679 | if (pst[j-1].fid >= pst[j].fid) { |
680 | printk(KERN_ERR PFX "PST out of sequence\n"); | |
681 | return -EINVAL; | |
682 | } | |
683 | } | |
684 | ||
685 | if (data->numps < 2) { | |
686 | printk(KERN_ERR PFX "no p states to transition\n"); | |
687 | return -ENODEV; | |
688 | } | |
689 | ||
690 | if (check_pst_table(data, pst, maxvid)) | |
691 | return -EINVAL; | |
692 | ||
693 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
694 | * (data->numps + 1)), GFP_KERNEL); | |
695 | if (!powernow_table) { | |
696 | printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); | |
697 | return -ENOMEM; | |
698 | } | |
699 | ||
700 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 701 | int freq; |
1da177e4 LT |
702 | powernow_table[j].index = pst[j].fid; /* lower 8 bits */ |
703 | powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
704 | freq = find_khz_freq_from_fid(pst[j].fid); |
705 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
706 | } |
707 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
708 | powernow_table[data->numps].index = 0; | |
709 | ||
710 | if (query_current_values_with_pending_wait(data)) { | |
711 | kfree(powernow_table); | |
712 | return -EIO; | |
713 | } | |
714 | ||
715 | dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); | |
716 | data->powernow_table = powernow_table; | |
7ad728f9 | 717 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 718 | print_basics(data); |
1da177e4 LT |
719 | |
720 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
721 | if ((pst[j].fid == data->currfid) && |
722 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
723 | return 0; |
724 | ||
725 | dprintk("currfid/vid do not match PST, ignoring\n"); | |
726 | return 0; | |
727 | } | |
728 | ||
729 | /* Find and validate the PSB/PST table in BIOS. */ | |
730 | static int find_psb_table(struct powernow_k8_data *data) | |
731 | { | |
732 | struct psb_s *psb; | |
733 | unsigned int i; | |
734 | u32 mvs; | |
735 | u8 maxvid; | |
736 | u32 cpst = 0; | |
737 | u32 thiscpuid; | |
738 | ||
739 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
740 | /* Scan BIOS looking for the signature. */ | |
741 | /* It can not be at ffff0 - it is too big. */ | |
742 | ||
743 | psb = phys_to_virt(i); | |
744 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
745 | continue; | |
746 | ||
747 | dprintk("found PSB header at 0x%p\n", psb); | |
748 | ||
749 | dprintk("table vers: 0x%x\n", psb->tableversion); | |
750 | if (psb->tableversion != PSB_VERSION_1_4) { | |
2fd47094 | 751 | printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n"); |
1da177e4 LT |
752 | return -ENODEV; |
753 | } | |
754 | ||
755 | dprintk("flags: 0x%x\n", psb->flags1); | |
756 | if (psb->flags1) { | |
2fd47094 | 757 | printk(KERN_ERR FW_BUG PFX "unknown flags\n"); |
1da177e4 LT |
758 | return -ENODEV; |
759 | } | |
760 | ||
761 | data->vstable = psb->vstable; | |
0e64a0c9 DJ |
762 | dprintk("voltage stabilization time: %d(*20us)\n", |
763 | data->vstable); | |
1da177e4 LT |
764 | |
765 | dprintk("flags2: 0x%x\n", psb->flags2); | |
766 | data->rvo = psb->flags2 & 3; | |
767 | data->irt = ((psb->flags2) >> 2) & 3; | |
768 | mvs = ((psb->flags2) >> 4) & 3; | |
769 | data->vidmvs = 1 << mvs; | |
770 | data->batps = ((psb->flags2) >> 6) & 3; | |
771 | ||
772 | dprintk("ramp voltage offset: %d\n", data->rvo); | |
773 | dprintk("isochronous relief time: %d\n", data->irt); | |
774 | dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
775 | ||
776 | dprintk("numpst: 0x%x\n", psb->num_tables); | |
777 | cpst = psb->num_tables; | |
0e64a0c9 DJ |
778 | if ((psb->cpuid == 0x00000fc0) || |
779 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 780 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
781 | if ((thiscpuid == 0x00000fc0) || |
782 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 783 | cpst = 1; |
1da177e4 LT |
784 | } |
785 | if (cpst != 1) { | |
2fd47094 | 786 | printk(KERN_ERR FW_BUG PFX "numpst must be 1\n"); |
1da177e4 LT |
787 | return -ENODEV; |
788 | } | |
789 | ||
790 | data->plllock = psb->plllocktime; | |
791 | dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); | |
792 | dprintk("maxfid: 0x%x\n", psb->maxfid); | |
793 | dprintk("maxvid: 0x%x\n", psb->maxvid); | |
794 | maxvid = psb->maxvid; | |
795 | ||
796 | data->numps = psb->numps; | |
797 | dprintk("numpstates: 0x%x\n", data->numps); | |
0e64a0c9 DJ |
798 | return fill_powernow_table(data, |
799 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
800 | } |
801 | /* | |
802 | * If you see this message, complain to BIOS manufacturer. If | |
803 | * he tells you "we do not support Linux" or some similar | |
804 | * nonsense, remember that Windows 2000 uses the same legacy | |
805 | * mechanism that the old Linux PSB driver uses. Tell them it | |
806 | * is broken with Windows 2000. | |
807 | * | |
808 | * The reference to the AMD documentation is chapter 9 in the | |
809 | * BIOS and Kernel Developer's Guide, which is available on | |
810 | * www.amd.com | |
811 | */ | |
79cc56af | 812 | printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n"); |
1da177e4 LT |
813 | return -ENODEV; |
814 | } | |
815 | ||
0e64a0c9 DJ |
816 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
817 | unsigned int index) | |
1da177e4 | 818 | { |
0e64a0c9 DJ |
819 | acpi_integer control; |
820 | ||
f607e3a0 | 821 | if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE)) |
1da177e4 LT |
822 | return; |
823 | ||
21335d02 LH |
824 | control = data->acpi_data.states[index].control; |
825 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; | |
826 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; | |
827 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
828 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; | |
829 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); | |
830 | data->vstable = (control >> VST_SHIFT) & VST_MASK; | |
831 | } | |
1da177e4 LT |
832 | |
833 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
834 | { | |
1da177e4 | 835 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 836 | int ret_val = -ENODEV; |
2c701b10 | 837 | acpi_integer control, status; |
1da177e4 | 838 | |
f607e3a0 | 839 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
065b807c | 840 | dprintk("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
841 | return -EIO; |
842 | } | |
843 | ||
844 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 845 | if (data->acpi_data.state_count <= 1) { |
1da177e4 LT |
846 | dprintk("No ACPI P-States\n"); |
847 | goto err_out; | |
848 | } | |
849 | ||
2c701b10 DJ |
850 | control = data->acpi_data.control_register.space_id; |
851 | status = data->acpi_data.status_register.space_id; | |
852 | ||
853 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
854 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
1da177e4 | 855 | dprintk("Invalid control/status registers (%x - %x)\n", |
2c701b10 | 856 | control, status); |
1da177e4 LT |
857 | goto err_out; |
858 | } | |
859 | ||
860 | /* fill in data->powernow_table */ | |
861 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
f607e3a0 | 862 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 LT |
863 | if (!powernow_table) { |
864 | dprintk("powernow_table memory alloc failure\n"); | |
865 | goto err_out; | |
866 | } | |
867 | ||
e7bdd7a5 | 868 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
869 | ret_val = fill_powernow_table_pstate(data, powernow_table); |
870 | else | |
871 | ret_val = fill_powernow_table_fidvid(data, powernow_table); | |
872 | if (ret_val) | |
873 | goto err_out_mem; | |
874 | ||
0e64a0c9 DJ |
875 | powernow_table[data->acpi_data.state_count].frequency = |
876 | CPUFREQ_TABLE_END; | |
f607e3a0 | 877 | powernow_table[data->acpi_data.state_count].index = 0; |
1f729e06 DJ |
878 | data->powernow_table = powernow_table; |
879 | ||
880 | /* fill in data */ | |
f607e3a0 | 881 | data->numps = data->acpi_data.state_count; |
7ad728f9 | 882 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 883 | print_basics(data); |
1f729e06 DJ |
884 | powernow_k8_acpi_pst_values(data, 0); |
885 | ||
886 | /* notify BIOS that we exist */ | |
887 | acpi_processor_notify_smm(THIS_MODULE); | |
888 | ||
eaa95840 | 889 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
2fdf66b4 RR |
890 | printk(KERN_ERR PFX |
891 | "unable to alloc powernow_k8_data cpumask\n"); | |
892 | ret_val = -ENOMEM; | |
893 | goto err_out_mem; | |
894 | } | |
895 | ||
1f729e06 DJ |
896 | return 0; |
897 | ||
898 | err_out_mem: | |
899 | kfree(powernow_table); | |
900 | ||
901 | err_out: | |
f607e3a0 | 902 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
1f729e06 | 903 | |
0e64a0c9 DJ |
904 | /* data->acpi_data.state_count informs us at ->exit() |
905 | * whether ACPI was used */ | |
f607e3a0 | 906 | data->acpi_data.state_count = 0; |
1f729e06 | 907 | |
2fdf66b4 | 908 | return ret_val; |
1f729e06 DJ |
909 | } |
910 | ||
0e64a0c9 DJ |
911 | static int fill_powernow_table_pstate(struct powernow_k8_data *data, |
912 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
913 | { |
914 | int i; | |
c5829cd0 ML |
915 | u32 hi = 0, lo = 0; |
916 | rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo); | |
917 | data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT; | |
1f729e06 | 918 | |
f607e3a0 | 919 | for (i = 0; i < data->acpi_data.state_count; i++) { |
1f729e06 | 920 | u32 index; |
1f729e06 | 921 | |
f607e3a0 | 922 | index = data->acpi_data.states[i].control & HW_PSTATE_MASK; |
c5829cd0 | 923 | if (index > data->max_hw_pstate) { |
0e64a0c9 DJ |
924 | printk(KERN_ERR PFX "invalid pstate %d - " |
925 | "bad value %d.\n", i, index); | |
926 | printk(KERN_ERR PFX "Please report to BIOS " | |
927 | "manufacturer\n"); | |
928 | invalidate_entry(data, i); | |
c5829cd0 | 929 | continue; |
1f729e06 DJ |
930 | } |
931 | rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); | |
932 | if (!(hi & HW_PSTATE_VALID_MASK)) { | |
933 | dprintk("invalid pstate %d, ignoring\n", index); | |
0e64a0c9 | 934 | invalidate_entry(data, i); |
1f729e06 DJ |
935 | continue; |
936 | } | |
937 | ||
c5829cd0 | 938 | powernow_table[i].index = index; |
1f729e06 | 939 | |
ca446d06 AH |
940 | /* Frequency may be rounded for these */ |
941 | if (boot_cpu_data.x86 == 0x10 || boot_cpu_data.x86 == 0x11) { | |
942 | powernow_table[i].frequency = | |
943 | freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7); | |
944 | } else | |
945 | powernow_table[i].frequency = | |
946 | data->acpi_data.states[i].core_frequency * 1000; | |
1f729e06 DJ |
947 | } |
948 | return 0; | |
949 | } | |
950 | ||
0e64a0c9 DJ |
951 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
952 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
953 | { |
954 | int i; | |
955 | int cntlofreq = 0; | |
0e64a0c9 | 956 | |
f607e3a0 | 957 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
958 | u32 fid; |
959 | u32 vid; | |
0e64a0c9 DJ |
960 | u32 freq, index; |
961 | acpi_integer status, control; | |
094ce7fd DJ |
962 | |
963 | if (data->exttype) { | |
0e64a0c9 DJ |
964 | status = data->acpi_data.states[i].status; |
965 | fid = status & EXT_FID_MASK; | |
966 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 967 | } else { |
0e64a0c9 DJ |
968 | control = data->acpi_data.states[i].control; |
969 | fid = control & FID_MASK; | |
970 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 971 | } |
1da177e4 LT |
972 | |
973 | dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); | |
974 | ||
0e64a0c9 DJ |
975 | index = fid | (vid<<8); |
976 | powernow_table[i].index = index; | |
977 | ||
978 | freq = find_khz_freq_from_fid(fid); | |
979 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
980 | |
981 | /* verify frequency is OK */ | |
0e64a0c9 DJ |
982 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
983 | dprintk("invalid freq %u kHz, ignoring\n", freq); | |
984 | invalidate_entry(data, i); | |
1da177e4 LT |
985 | continue; |
986 | } | |
987 | ||
0e64a0c9 DJ |
988 | /* verify voltage is OK - |
989 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 990 | if (vid == VID_OFF) { |
1da177e4 | 991 | dprintk("invalid vid %u, ignoring\n", vid); |
0e64a0c9 | 992 | invalidate_entry(data, i); |
1da177e4 LT |
993 | continue; |
994 | } | |
995 | ||
065b807c DJ |
996 | /* verify only 1 entry from the lo frequency table */ |
997 | if (fid < HI_FID_TABLE_BOTTOM) { | |
998 | if (cntlofreq) { | |
0e64a0c9 DJ |
999 | /* if both entries are the same, |
1000 | * ignore this one ... */ | |
1001 | if ((freq != powernow_table[cntlofreq].frequency) || | |
1002 | (index != powernow_table[cntlofreq].index)) { | |
1003 | printk(KERN_ERR PFX | |
1004 | "Too many lo freq table " | |
1005 | "entries\n"); | |
1f729e06 | 1006 | return 1; |
065b807c DJ |
1007 | } |
1008 | ||
0e64a0c9 DJ |
1009 | dprintk("double low frequency table entry, " |
1010 | "ignoring it.\n"); | |
1011 | invalidate_entry(data, i); | |
065b807c DJ |
1012 | continue; |
1013 | } else | |
1014 | cntlofreq = i; | |
1da177e4 LT |
1015 | } |
1016 | ||
0e64a0c9 DJ |
1017 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
1018 | printk(KERN_INFO PFX "invalid freq entries " | |
1019 | "%u kHz vs. %u kHz\n", freq, | |
1020 | (unsigned int) | |
1021 | (data->acpi_data.states[i].core_frequency | |
1022 | * 1000)); | |
1023 | invalidate_entry(data, i); | |
1da177e4 LT |
1024 | continue; |
1025 | } | |
1026 | } | |
1da177e4 | 1027 | return 0; |
1da177e4 LT |
1028 | } |
1029 | ||
1030 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
1031 | { | |
f607e3a0 | 1032 | if (data->acpi_data.state_count) |
0e64a0c9 DJ |
1033 | acpi_processor_unregister_performance(&data->acpi_data, |
1034 | data->cpu); | |
2fdf66b4 | 1035 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
1036 | } |
1037 | ||
732553e5 ML |
1038 | static int get_transition_latency(struct powernow_k8_data *data) |
1039 | { | |
1040 | int max_latency = 0; | |
1041 | int i; | |
1042 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
1043 | int cur_latency = data->acpi_data.states[i].transition_latency | |
1044 | + data->acpi_data.states[i].bus_master_latency; | |
1045 | if (cur_latency > max_latency) | |
1046 | max_latency = cur_latency; | |
1047 | } | |
86e13684 TR |
1048 | if (max_latency == 0) { |
1049 | /* | |
1050 | * Fam 11h always returns 0 as transition latency. | |
1051 | * This is intended and means "very fast". While cpufreq core | |
1052 | * and governors currently can handle that gracefully, better | |
1053 | * set it to 1 to avoid problems in the future. | |
1054 | * For all others it's a BIOS bug. | |
1055 | */ | |
1056 | if (!boot_cpu_data.x86 == 0x11) | |
1057 | printk(KERN_ERR FW_WARN PFX "Invalid zero transition " | |
1058 | "latency\n"); | |
1059 | max_latency = 1; | |
1060 | } | |
732553e5 ML |
1061 | /* value in usecs, needs to be in nanoseconds */ |
1062 | return 1000 * max_latency; | |
1063 | } | |
1064 | ||
1da177e4 | 1065 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 DJ |
1066 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
1067 | unsigned int index) | |
1da177e4 | 1068 | { |
1f729e06 DJ |
1069 | u32 fid = 0; |
1070 | u32 vid = 0; | |
065b807c | 1071 | int res, i; |
1da177e4 LT |
1072 | struct cpufreq_freqs freqs; |
1073 | ||
1074 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
1075 | ||
1f729e06 | 1076 | /* fid/vid correctness check for k8 */ |
1da177e4 | 1077 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
1078 | * the cpufreq frequency table in find_psb_table, vid |
1079 | * are the upper 8 bits. | |
1da177e4 | 1080 | */ |
1da177e4 LT |
1081 | fid = data->powernow_table[index].index & 0xFF; |
1082 | vid = (data->powernow_table[index].index & 0xFF00) >> 8; | |
1083 | ||
1084 | dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); | |
1085 | ||
1086 | if (query_current_values_with_pending_wait(data)) | |
1087 | return 1; | |
1088 | ||
1089 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
1090 | dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", | |
1091 | fid, vid); | |
1092 | return 0; | |
1093 | } | |
1094 | ||
0e64a0c9 DJ |
1095 | if ((fid < HI_FID_TABLE_BOTTOM) && |
1096 | (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
065b807c DJ |
1097 | printk(KERN_ERR PFX |
1098 | "ignoring illegal change in lo freq table-%x to 0x%x\n", | |
1da177e4 LT |
1099 | data->currfid, fid); |
1100 | return 1; | |
1101 | } | |
1102 | ||
1103 | dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", | |
1104 | smp_processor_id(), fid, vid); | |
1da177e4 LT |
1105 | freqs.old = find_khz_freq_from_fid(data->currfid); |
1106 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 1107 | |
334ef7a7 | 1108 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
1109 | freqs.cpu = i; |
1110 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
1111 | } | |
1da177e4 | 1112 | |
1da177e4 | 1113 | res = transition_fid_vid(data, fid, vid); |
1da177e4 | 1114 | freqs.new = find_khz_freq_from_fid(data->currfid); |
1f729e06 | 1115 | |
334ef7a7 | 1116 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
1117 | freqs.cpu = i; |
1118 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
1119 | } | |
1120 | return res; | |
1121 | } | |
1122 | ||
1123 | /* Take a frequency, and issue the hardware pstate transition command */ | |
0e64a0c9 DJ |
1124 | static int transition_frequency_pstate(struct powernow_k8_data *data, |
1125 | unsigned int index) | |
1f729e06 | 1126 | { |
1f729e06 DJ |
1127 | u32 pstate = 0; |
1128 | int res, i; | |
1129 | struct cpufreq_freqs freqs; | |
1130 | ||
1131 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
1132 | ||
c5829cd0 | 1133 | /* get MSR index for hardware pstate transition */ |
1f729e06 | 1134 | pstate = index & HW_PSTATE_MASK; |
c5829cd0 | 1135 | if (pstate > data->max_hw_pstate) |
1f729e06 | 1136 | return 0; |
0e64a0c9 DJ |
1137 | freqs.old = find_khz_freq_from_pstate(data->powernow_table, |
1138 | data->currpstate); | |
c5829cd0 | 1139 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); |
1f729e06 | 1140 | |
334ef7a7 | 1141 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
1142 | freqs.cpu = i; |
1143 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
1144 | } | |
1145 | ||
1146 | res = transition_pstate(data, pstate); | |
c5829cd0 | 1147 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); |
1f729e06 | 1148 | |
334ef7a7 | 1149 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
1150 | freqs.cpu = i; |
1151 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
2e3f8faa | 1152 | } |
1da177e4 LT |
1153 | return res; |
1154 | } | |
1155 | ||
1156 | /* Driver entry point to switch to the target frequency */ | |
0e64a0c9 DJ |
1157 | static int powernowk8_target(struct cpufreq_policy *pol, |
1158 | unsigned targfreq, unsigned relation) | |
1da177e4 | 1159 | { |
fc0e4748 | 1160 | cpumask_t oldmask; |
2c6b8c03 | 1161 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
1162 | u32 checkfid; |
1163 | u32 checkvid; | |
1da177e4 LT |
1164 | unsigned int newstate; |
1165 | int ret = -EIO; | |
1166 | ||
4211a303 JS |
1167 | if (!data) |
1168 | return -EINVAL; | |
1169 | ||
9180053c AB |
1170 | checkfid = data->currfid; |
1171 | checkvid = data->currvid; | |
1172 | ||
1da177e4 LT |
1173 | /* only run on specific CPU from here on */ |
1174 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1175 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1176 | |
1177 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1178 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1179 | goto err_out; |
1180 | } | |
1181 | ||
1182 | if (pending_bit_stuck()) { | |
1183 | printk(KERN_ERR PFX "failing targ, change pending bit set\n"); | |
1184 | goto err_out; | |
1185 | } | |
1186 | ||
1187 | dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", | |
1188 | pol->cpu, targfreq, pol->min, pol->max, relation); | |
1189 | ||
83844510 | 1190 | if (query_current_values_with_pending_wait(data)) |
1da177e4 | 1191 | goto err_out; |
1da177e4 | 1192 | |
c5829cd0 | 1193 | if (cpu_family != CPU_HW_PSTATE) { |
1f729e06 | 1194 | dprintk("targ: curr fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
1195 | data->currfid, data->currvid); |
1196 | ||
0e64a0c9 DJ |
1197 | if ((checkvid != data->currvid) || |
1198 | (checkfid != data->currfid)) { | |
1f729e06 | 1199 | printk(KERN_INFO PFX |
0e64a0c9 DJ |
1200 | "error - out of sync, fix 0x%x 0x%x, " |
1201 | "vid 0x%x 0x%x\n", | |
1202 | checkfid, data->currfid, | |
1203 | checkvid, data->currvid); | |
1f729e06 | 1204 | } |
1da177e4 LT |
1205 | } |
1206 | ||
0e64a0c9 DJ |
1207 | if (cpufreq_frequency_table_target(pol, data->powernow_table, |
1208 | targfreq, relation, &newstate)) | |
1da177e4 LT |
1209 | goto err_out; |
1210 | ||
14cc3e2b | 1211 | mutex_lock(&fidvid_mutex); |
065b807c | 1212 | |
1da177e4 LT |
1213 | powernow_k8_acpi_pst_values(data, newstate); |
1214 | ||
e7bdd7a5 | 1215 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
1216 | ret = transition_frequency_pstate(data, newstate); |
1217 | else | |
1218 | ret = transition_frequency_fidvid(data, newstate); | |
1219 | if (ret) { | |
1da177e4 LT |
1220 | printk(KERN_ERR PFX "transition frequency failed\n"); |
1221 | ret = 1; | |
14cc3e2b | 1222 | mutex_unlock(&fidvid_mutex); |
1da177e4 LT |
1223 | goto err_out; |
1224 | } | |
14cc3e2b | 1225 | mutex_unlock(&fidvid_mutex); |
065b807c | 1226 | |
e7bdd7a5 | 1227 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1228 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, |
1229 | newstate); | |
1f729e06 DJ |
1230 | else |
1231 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1232 | ret = 0; |
1233 | ||
1234 | err_out: | |
fc0e4748 | 1235 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1236 | return ret; |
1237 | } | |
1238 | ||
1239 | /* Driver entry point to verify the policy and range of frequencies */ | |
1240 | static int powernowk8_verify(struct cpufreq_policy *pol) | |
1241 | { | |
2c6b8c03 | 1242 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 | 1243 | |
4211a303 JS |
1244 | if (!data) |
1245 | return -EINVAL; | |
1246 | ||
1da177e4 LT |
1247 | return cpufreq_frequency_table_verify(pol, data->powernow_table); |
1248 | } | |
1249 | ||
1250 | /* per CPU init entry point to the driver */ | |
aa41eb99 | 1251 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 | 1252 | { |
b394f1df AM |
1253 | static const char ACPI_PSS_BIOS_BUG_MSG[] = |
1254 | KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n" | |
1255 | KERN_ERR FW_BUG PFX "Try again with latest BIOS.\n"; | |
1da177e4 | 1256 | struct powernow_k8_data *data; |
f607e3a0 | 1257 | cpumask_t oldmask; |
d7fa706c | 1258 | int rc; |
1da177e4 | 1259 | |
8aae8284 JS |
1260 | if (!cpu_online(pol->cpu)) |
1261 | return -ENODEV; | |
1262 | ||
1da177e4 LT |
1263 | if (!check_supported_cpu(pol->cpu)) |
1264 | return -ENODEV; | |
1265 | ||
bfdc708d | 1266 | data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); |
1da177e4 LT |
1267 | if (!data) { |
1268 | printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); | |
1269 | return -ENOMEM; | |
1270 | } | |
1da177e4 LT |
1271 | |
1272 | data->cpu = pol->cpu; | |
a266d9f1 | 1273 | data->currpstate = HW_PSTATE_INVALID; |
1da177e4 | 1274 | |
a0abd520 | 1275 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 LT |
1276 | /* |
1277 | * Use the PSB BIOS structure. This is only availabe on | |
1278 | * an UP version, and is deprecated by AMD. | |
1279 | */ | |
9ed059e1 | 1280 | if (num_online_cpus() != 1) { |
df182977 | 1281 | printk_once(ACPI_PSS_BIOS_BUG_MSG); |
0cb8bc25 | 1282 | goto err_out; |
1da177e4 LT |
1283 | } |
1284 | if (pol->cpu != 0) { | |
2fd47094 TR |
1285 | printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " |
1286 | "CPU other than CPU0. Complain to your BIOS " | |
1287 | "vendor.\n"); | |
0cb8bc25 | 1288 | goto err_out; |
1da177e4 LT |
1289 | } |
1290 | rc = find_psb_table(data); | |
0cb8bc25 DJ |
1291 | if (rc) |
1292 | goto err_out; | |
1293 | ||
732553e5 ML |
1294 | /* Take a crude guess here. |
1295 | * That guess was in microseconds, so multiply with 1000 */ | |
1296 | pol->cpuinfo.transition_latency = ( | |
1297 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1298 | ((1 << data->irt) * 30)) * 1000; | |
1299 | } else /* ACPI _PSS objects available */ | |
1300 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1301 | |
1302 | /* only run on specific CPU from here on */ | |
1303 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1304 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1305 | |
1306 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1307 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
0cb8bc25 | 1308 | goto err_out_unmask; |
1da177e4 LT |
1309 | } |
1310 | ||
1311 | if (pending_bit_stuck()) { | |
1312 | printk(KERN_ERR PFX "failing init, change pending bit set\n"); | |
0cb8bc25 | 1313 | goto err_out_unmask; |
1da177e4 LT |
1314 | } |
1315 | ||
1316 | if (query_current_values_with_pending_wait(data)) | |
0cb8bc25 | 1317 | goto err_out_unmask; |
1da177e4 | 1318 | |
e7bdd7a5 | 1319 | if (cpu_family == CPU_OPTERON) |
1f729e06 | 1320 | fidvid_msr_init(); |
1da177e4 LT |
1321 | |
1322 | /* run on any CPU again */ | |
fc0e4748 | 1323 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 1324 | |
f607e3a0 | 1325 | if (cpu_family == CPU_HW_PSTATE) |
835481d9 | 1326 | cpumask_copy(pol->cpus, cpumask_of(pol->cpu)); |
f607e3a0 | 1327 | else |
7ad728f9 | 1328 | cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu)); |
835481d9 | 1329 | data->available_cores = pol->cpus; |
1da177e4 | 1330 | |
e7bdd7a5 | 1331 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1332 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, |
1333 | data->currpstate); | |
1f729e06 DJ |
1334 | else |
1335 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1336 | dprintk("policy current frequency %d kHz\n", pol->cur); |
1337 | ||
1338 | /* min/max the cpu is capable of */ | |
1339 | if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { | |
2fd47094 | 1340 | printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n"); |
1da177e4 LT |
1341 | powernow_k8_cpu_exit_acpi(data); |
1342 | kfree(data->powernow_table); | |
1343 | kfree(data); | |
1344 | return -EINVAL; | |
1345 | } | |
1346 | ||
1347 | cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); | |
1348 | ||
e7bdd7a5 | 1349 | if (cpu_family == CPU_HW_PSTATE) |
0e64a0c9 DJ |
1350 | dprintk("cpu_init done, current pstate 0x%x\n", |
1351 | data->currpstate); | |
1f729e06 DJ |
1352 | else |
1353 | dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n", | |
1354 | data->currfid, data->currvid); | |
1da177e4 | 1355 | |
2c6b8c03 | 1356 | per_cpu(powernow_data, pol->cpu) = data; |
1da177e4 LT |
1357 | |
1358 | return 0; | |
1359 | ||
0cb8bc25 | 1360 | err_out_unmask: |
fc0e4748 | 1361 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1362 | powernow_k8_cpu_exit_acpi(data); |
1363 | ||
0cb8bc25 | 1364 | err_out: |
1da177e4 LT |
1365 | kfree(data); |
1366 | return -ENODEV; | |
1367 | } | |
1368 | ||
0e64a0c9 | 1369 | static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1370 | { |
2c6b8c03 | 1371 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 LT |
1372 | |
1373 | if (!data) | |
1374 | return -EINVAL; | |
1375 | ||
1376 | powernow_k8_cpu_exit_acpi(data); | |
1377 | ||
1378 | cpufreq_frequency_table_put_attr(pol->cpu); | |
1379 | ||
1380 | kfree(data->powernow_table); | |
1381 | kfree(data); | |
1382 | ||
1383 | return 0; | |
1384 | } | |
1385 | ||
0e64a0c9 | 1386 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1387 | { |
e15bc455 | 1388 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1da177e4 LT |
1389 | cpumask_t oldmask = current->cpus_allowed; |
1390 | unsigned int khz = 0; | |
eef5167e JS |
1391 | |
1392 | if (!data) | |
1393 | return -EINVAL; | |
1394 | ||
0bc3cc03 | 1395 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 | 1396 | if (smp_processor_id() != cpu) { |
fc0e4748 MT |
1397 | printk(KERN_ERR PFX |
1398 | "limiting to CPU %d failed in powernowk8_get\n", cpu); | |
1399 | set_cpus_allowed_ptr(current, &oldmask); | |
1da177e4 LT |
1400 | return 0; |
1401 | } | |
b9111b7b | 1402 | |
1da177e4 LT |
1403 | if (query_current_values_with_pending_wait(data)) |
1404 | goto out; | |
1405 | ||
58389a86 | 1406 | if (cpu_family == CPU_HW_PSTATE) |
fc0e4748 MT |
1407 | khz = find_khz_freq_from_pstate(data->powernow_table, |
1408 | data->currpstate); | |
58389a86 JD |
1409 | else |
1410 | khz = find_khz_freq_from_fid(data->currfid); | |
1411 | ||
1da177e4 | 1412 | |
b9111b7b | 1413 | out: |
fc0e4748 | 1414 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1415 | return khz; |
1416 | } | |
1417 | ||
0e64a0c9 | 1418 | static struct freq_attr *powernow_k8_attr[] = { |
1da177e4 LT |
1419 | &cpufreq_freq_attr_scaling_available_freqs, |
1420 | NULL, | |
1421 | }; | |
1422 | ||
221dee28 | 1423 | static struct cpufreq_driver cpufreq_amd64_driver = { |
1da177e4 LT |
1424 | .verify = powernowk8_verify, |
1425 | .target = powernowk8_target, | |
1426 | .init = powernowk8_cpu_init, | |
1427 | .exit = __devexit_p(powernowk8_cpu_exit), | |
1428 | .get = powernowk8_get, | |
1429 | .name = "powernow-k8", | |
1430 | .owner = THIS_MODULE, | |
1431 | .attr = powernow_k8_attr, | |
1432 | }; | |
1433 | ||
1434 | /* driver entry point for init */ | |
aa41eb99 | 1435 | static int __cpuinit powernowk8_init(void) |
1da177e4 LT |
1436 | { |
1437 | unsigned int i, supported_cpus = 0; | |
1438 | ||
a7201156 | 1439 | for_each_online_cpu(i) { |
1da177e4 LT |
1440 | if (check_supported_cpu(i)) |
1441 | supported_cpus++; | |
1442 | } | |
1443 | ||
1444 | if (supported_cpus == num_online_cpus()) { | |
1f729e06 | 1445 | printk(KERN_INFO PFX "Found %d %s " |
904f7a3f | 1446 | "processors (%d cpu cores) (" VERSION ")\n", |
c925401b | 1447 | num_online_nodes(), |
904f7a3f | 1448 | boot_cpu_data.x86_model_id, supported_cpus); |
1da177e4 LT |
1449 | return cpufreq_register_driver(&cpufreq_amd64_driver); |
1450 | } | |
1451 | ||
1452 | return -ENODEV; | |
1453 | } | |
1454 | ||
1455 | /* driver entry point for term */ | |
1456 | static void __exit powernowk8_exit(void) | |
1457 | { | |
1458 | dprintk("exit\n"); | |
1459 | ||
1460 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1461 | } | |
1462 | ||
0e64a0c9 DJ |
1463 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and " |
1464 | "Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1465 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1466 | MODULE_LICENSE("GPL"); | |
1467 | ||
1468 | late_initcall(powernowk8_init); | |
1469 | module_exit(powernowk8_exit); |