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1da177e4 1/*
1f729e06 2 * (c) 2003-2006 Advanced Micro Devices, Inc.
1da177e4
LT
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
065b807c 7 * Support : mark.langsdorf@amd.com
1da177e4
LT
8 *
9 * Based on the powernow-k7.c module written by Dave Jones.
f4432c5c 10 * (C) 2003 Dave Jones on behalf of SuSE Labs
1da177e4
LT
11 * (C) 2004 Dominik Brodowski <linux@brodo.de>
12 * (C) 2004 Pavel Machek <pavel@suse.cz>
13 * Licensed under the terms of the GNU GPL License version 2.
14 * Based upon datasheets & sample CPUs kindly provided by AMD.
15 *
16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
1f729e06 17 * Dominik Brodowski, Jacob Shin, and others.
065b807c 18 * Originally developed by Paul Devriendt.
1da177e4
LT
19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
21 * Opteron Processors" available for download from www.amd.com
22 *
2e3f8faa 23 * Tables for specific CPUs can be inferred from
065b807c 24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
1da177e4
LT
25 */
26
27#include <linux/kernel.h>
28#include <linux/smp.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/cpufreq.h>
32#include <linux/slab.h>
33#include <linux/string.h>
065b807c 34#include <linux/cpumask.h>
4e57b681 35#include <linux/sched.h> /* for current / set_cpus_allowed() */
1da177e4
LT
36
37#include <asm/msr.h>
38#include <asm/io.h>
39#include <asm/delay.h>
40
41#ifdef CONFIG_X86_POWERNOW_K8_ACPI
42#include <linux/acpi.h>
14cc3e2b 43#include <linux/mutex.h>
1da177e4
LT
44#include <acpi/processor.h>
45#endif
46
47#define PFX "powernow-k8: "
c5829cd0 48#define VERSION "version 2.20.00"
1da177e4
LT
49#include "powernow-k8.h"
50
51/* serialize freq changes */
14cc3e2b 52static DEFINE_MUTEX(fidvid_mutex);
1da177e4 53
2c6b8c03 54static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
1da177e4 55
1f729e06
DJ
56static int cpu_family = CPU_OPTERON;
57
065b807c 58#ifndef CONFIG_SMP
08357611 59DEFINE_PER_CPU(cpumask_t, cpu_core_map);
065b807c
DJ
60#endif
61
1da177e4
LT
62/* Return a frequency in MHz, given an input fid */
63static u32 find_freq_from_fid(u32 fid)
64{
65 return 800 + (fid * 100);
66}
67
68/* Return a frequency in KHz, given an input fid */
69static u32 find_khz_freq_from_fid(u32 fid)
70{
71 return 1000 * find_freq_from_fid(fid);
72}
73
c5829cd0 74static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
1f729e06 75{
c5829cd0 76 return data[pstate].frequency;
1f729e06
DJ
77}
78
1da177e4
LT
79/* Return the vco fid for an input fid
80 *
81 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
82 * only from corresponding high fids. This returns "high" fid corresponding to
83 * "low" one.
84 */
85static u32 convert_fid_to_vco_fid(u32 fid)
86{
32ee8c3e 87 if (fid < HI_FID_TABLE_BOTTOM)
1da177e4 88 return 8 + (2 * fid);
32ee8c3e 89 else
1da177e4 90 return fid;
1da177e4
LT
91}
92
93/*
94 * Return 1 if the pending bit is set. Unless we just instructed the processor
95 * to transition to a new state, seeing this bit set is really bad news.
96 */
97static int pending_bit_stuck(void)
98{
99 u32 lo, hi;
100
e7bdd7a5 101 if (cpu_family == CPU_HW_PSTATE)
1f729e06
DJ
102 return 0;
103
1da177e4
LT
104 rdmsr(MSR_FIDVID_STATUS, lo, hi);
105 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
106}
107
108/*
109 * Update the global current fid / vid values from the status msr.
110 * Returns 1 on error.
111 */
112static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
113{
114 u32 lo, hi;
115 u32 i = 0;
116
e7bdd7a5 117 if (cpu_family == CPU_HW_PSTATE) {
a266d9f1
AH
118 if (data->currpstate == HW_PSTATE_INVALID) {
119 /* read (initial) hw pstate if not yet set */
120 rdmsr(MSR_PSTATE_STATUS, lo, hi);
121 i = lo & HW_PSTATE_MASK;
122
123 /*
124 * a workaround for family 11h erratum 311 might cause
125 * an "out-of-range Pstate if the core is in Pstate-0
126 */
127 if (i >= data->numps)
128 data->currpstate = HW_PSTATE_0;
129 else
130 data->currpstate = i;
131 }
1f729e06
DJ
132 return 0;
133 }
7153d961 134 do {
0213df74
DJ
135 if (i++ > 10000) {
136 dprintk("detected change pending stuck\n");
1da177e4
LT
137 return 1;
138 }
139 rdmsr(MSR_FIDVID_STATUS, lo, hi);
7153d961 140 } while (lo & MSR_S_LO_CHANGE_PENDING);
1da177e4
LT
141
142 data->currvid = hi & MSR_S_HI_CURRENT_VID;
143 data->currfid = lo & MSR_S_LO_CURRENT_FID;
144
145 return 0;
146}
147
148/* the isochronous relief time */
149static void count_off_irt(struct powernow_k8_data *data)
150{
151 udelay((1 << data->irt) * 10);
152 return;
153}
154
27b46d76 155/* the voltage stabilization time */
1da177e4
LT
156static void count_off_vst(struct powernow_k8_data *data)
157{
158 udelay(data->vstable * VST_UNITS_20US);
159 return;
160}
161
162/* need to init the control msr to a safe value (for each cpu) */
163static void fidvid_msr_init(void)
164{
165 u32 lo, hi;
166 u8 fid, vid;
167
168 rdmsr(MSR_FIDVID_STATUS, lo, hi);
169 vid = hi & MSR_S_HI_CURRENT_VID;
170 fid = lo & MSR_S_LO_CURRENT_FID;
171 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
172 hi = MSR_C_HI_STP_GNT_BENIGN;
173 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
174 wrmsr(MSR_FIDVID_CTL, lo, hi);
175}
176
1da177e4
LT
177/* write the new fid value along with the other control fields to the msr */
178static int write_new_fid(struct powernow_k8_data *data, u32 fid)
179{
180 u32 lo;
181 u32 savevid = data->currvid;
0213df74 182 u32 i = 0;
1da177e4
LT
183
184 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
185 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
186 return 1;
187 }
188
189 lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
190
191 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
192 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
193
0213df74
DJ
194 do {
195 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
196 if (i++ > 100) {
1f729e06 197 printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
63172cb3 198 return 1;
32ee8c3e 199 }
0213df74 200 } while (query_current_values_with_pending_wait(data));
1da177e4
LT
201
202 count_off_irt(data);
203
204 if (savevid != data->currvid) {
205 printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
206 savevid, data->currvid);
207 return 1;
208 }
209
210 if (fid != data->currfid) {
211 printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
212 data->currfid);
213 return 1;
214 }
215
216 return 0;
217}
218
219/* Write a new vid to the hardware */
220static int write_new_vid(struct powernow_k8_data *data, u32 vid)
221{
222 u32 lo;
223 u32 savefid = data->currfid;
0213df74 224 int i = 0;
1da177e4
LT
225
226 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
227 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
228 return 1;
229 }
230
231 lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
232
233 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
234 vid, lo, STOP_GRANT_5NS);
235
0213df74
DJ
236 do {
237 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
6df89006
DJ
238 if (i++ > 100) {
239 printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
240 return 1;
241 }
0213df74 242 } while (query_current_values_with_pending_wait(data));
1da177e4
LT
243
244 if (savefid != data->currfid) {
245 printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
246 savefid, data->currfid);
247 return 1;
248 }
249
250 if (vid != data->currvid) {
251 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
252 data->currvid);
253 return 1;
254 }
255
256 return 0;
257}
258
259/*
260 * Reduce the vid by the max of step or reqvid.
261 * Decreasing vid codes represent increasing voltages:
841e40b3 262 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
1da177e4
LT
263 */
264static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
265{
266 if ((data->currvid - reqvid) > step)
267 reqvid = data->currvid - step;
268
269 if (write_new_vid(data, reqvid))
270 return 1;
271
272 count_off_vst(data);
273
274 return 0;
275}
276
1f729e06
DJ
277/* Change hardware pstate by single MSR write */
278static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
279{
280 wrmsr(MSR_PSTATE_CTRL, pstate, 0);
c5829cd0 281 data->currpstate = pstate;
1f729e06
DJ
282 return 0;
283}
284
285/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
1da177e4
LT
286static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
287{
288 if (core_voltage_pre_transition(data, reqvid))
289 return 1;
290
291 if (core_frequency_transition(data, reqfid))
292 return 1;
293
294 if (core_voltage_post_transition(data, reqvid))
295 return 1;
296
297 if (query_current_values_with_pending_wait(data))
298 return 1;
299
300 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
301 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
302 smp_processor_id(),
303 reqfid, reqvid, data->currfid, data->currvid);
304 return 1;
305 }
306
307 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
308 smp_processor_id(), data->currfid, data->currvid);
309
310 return 0;
311}
312
313/* Phase 1 - core voltage transition ... setup voltage */
314static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
315{
316 u32 rvosteps = data->rvo;
317 u32 savefid = data->currfid;
065b807c 318 u32 maxvid, lo;
1da177e4
LT
319
320 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
321 smp_processor_id(),
322 data->currfid, data->currvid, reqvid, data->rvo);
323
065b807c
DJ
324 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
325 maxvid = 0x1f & (maxvid >> 16);
326 dprintk("ph1 maxvid=0x%x\n", maxvid);
327 if (reqvid < maxvid) /* lower numbers are higher voltages */
328 reqvid = maxvid;
329
1da177e4
LT
330 while (data->currvid > reqvid) {
331 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
332 data->currvid, reqvid);
333 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
334 return 1;
335 }
336
065b807c
DJ
337 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
338 if (data->currvid == maxvid) {
1da177e4
LT
339 rvosteps = 0;
340 } else {
341 dprintk("ph1: changing vid for rvo, req 0x%x\n",
342 data->currvid - 1);
343 if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
344 return 1;
345 rvosteps--;
346 }
347 }
348
349 if (query_current_values_with_pending_wait(data))
350 return 1;
351
352 if (savefid != data->currfid) {
353 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
354 return 1;
355 }
356
357 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
358 data->currfid, data->currvid);
359
360 return 0;
361}
362
363/* Phase 2 - core frequency transition */
364static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
365{
019a61b9 366 u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
1da177e4
LT
367
368 if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
369 printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
370 reqfid, data->currfid);
371 return 1;
372 }
373
374 if (data->currfid == reqfid) {
375 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
376 return 0;
377 }
378
379 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
380 smp_processor_id(),
381 data->currfid, data->currvid, reqfid);
382
383 vcoreqfid = convert_fid_to_vco_fid(reqfid);
384 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
385 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
386 : vcoreqfid - vcocurrfid;
387
388 while (vcofiddiff > 2) {
019a61b9
LM
389 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
390
1da177e4
LT
391 if (reqfid > data->currfid) {
392 if (data->currfid > LO_FID_TABLE_TOP) {
019a61b9 393 if (write_new_fid(data, data->currfid + fid_interval)) {
1da177e4
LT
394 return 1;
395 }
396 } else {
397 if (write_new_fid
398 (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
399 return 1;
400 }
401 }
402 } else {
019a61b9 403 if (write_new_fid(data, data->currfid - fid_interval))
1da177e4
LT
404 return 1;
405 }
406
407 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
408 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
409 : vcoreqfid - vcocurrfid;
410 }
411
412 if (write_new_fid(data, reqfid))
413 return 1;
414
415 if (query_current_values_with_pending_wait(data))
416 return 1;
417
418 if (data->currfid != reqfid) {
419 printk(KERN_ERR PFX
420 "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
421 data->currfid, reqfid);
422 return 1;
423 }
424
425 if (savevid != data->currvid) {
426 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
427 savevid, data->currvid);
428 return 1;
429 }
430
431 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
432 data->currfid, data->currvid);
433
434 return 0;
435}
436
437/* Phase 3 - core voltage transition flow ... jump to the final vid. */
438static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
439{
440 u32 savefid = data->currfid;
441 u32 savereqvid = reqvid;
442
443 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
444 smp_processor_id(),
445 data->currfid, data->currvid);
446
447 if (reqvid != data->currvid) {
448 if (write_new_vid(data, reqvid))
449 return 1;
450
451 if (savefid != data->currfid) {
452 printk(KERN_ERR PFX
453 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
454 savefid, data->currfid);
455 return 1;
456 }
457
458 if (data->currvid != reqvid) {
459 printk(KERN_ERR PFX
460 "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
461 reqvid, data->currvid);
462 return 1;
463 }
464 }
465
466 if (query_current_values_with_pending_wait(data))
467 return 1;
468
469 if (savereqvid != data->currvid) {
470 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
471 return 1;
472 }
473
474 if (savefid != data->currfid) {
475 dprintk("ph3 failed, currfid changed 0x%x\n",
476 data->currfid);
477 return 1;
478 }
479
480 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
481 data->currfid, data->currvid);
482
483 return 0;
484}
485
486static int check_supported_cpu(unsigned int cpu)
487{
fc0e4748 488 cpumask_t oldmask;
1da177e4
LT
489 u32 eax, ebx, ecx, edx;
490 unsigned int rc = 0;
491
492 oldmask = current->cpus_allowed;
0bc3cc03 493 set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
1da177e4
LT
494
495 if (smp_processor_id() != cpu) {
8aae8284 496 printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu);
1da177e4
LT
497 goto out;
498 }
499
500 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
501 goto out;
502
503 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
1f729e06
DJ
504 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
505 ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
2c906ae6
DJ
506 goto out;
507
1f729e06
DJ
508 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
509 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
99fbe1ac 510 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
1f729e06
DJ
511 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
512 goto out;
513 }
1da177e4 514
1f729e06
DJ
515 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
516 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
517 printk(KERN_INFO PFX
518 "No frequency change capabilities detected\n");
519 goto out;
520 }
1da177e4 521
1f729e06
DJ
522 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
523 if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
524 printk(KERN_INFO PFX "Power state transitions not supported\n");
525 goto out;
526 }
527 } else { /* must be a HW Pstate capable processor */
528 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
529 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
530 cpu_family = CPU_HW_PSTATE;
531 else
532 goto out;
1da177e4
LT
533 }
534
535 rc = 1;
536
537out:
fc0e4748 538 set_cpus_allowed_ptr(current, &oldmask);
1da177e4 539 return rc;
1da177e4
LT
540}
541
542static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
543{
544 unsigned int j;
545 u8 lastfid = 0xff;
546
547 for (j = 0; j < data->numps; j++) {
548 if (pst[j].vid > LEAST_VID) {
2fd47094
TR
549 printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
550 j, pst[j].vid);
1da177e4
LT
551 return -EINVAL;
552 }
553 if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
2fd47094
TR
554 printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
555 " %d\n", j);
1da177e4
LT
556 return -ENODEV;
557 }
558 if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
2fd47094
TR
559 printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
560 " %d\n", j);
1da177e4
LT
561 return -ENODEV;
562 }
8aae8284 563 if (pst[j].fid > MAX_FID) {
2fd47094
TR
564 printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
565 " %d\n", j);
8aae8284
JS
566 return -ENODEV;
567 }
8aae8284 568 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
1da177e4 569 /* Only first fid is allowed to be in "low" range */
2fd47094
TR
570 printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
571 "0x%x\n", j, pst[j].fid);
1da177e4
LT
572 return -EINVAL;
573 }
574 if (pst[j].fid < lastfid)
575 lastfid = pst[j].fid;
576 }
577 if (lastfid & 1) {
2fd47094 578 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
1da177e4
LT
579 return -EINVAL;
580 }
581 if (lastfid > LO_FID_TABLE_TOP)
2fd47094 582 printk(KERN_INFO FW_BUG PFX "first fid not from lo freq table\n");
1da177e4
LT
583
584 return 0;
585}
586
587static void print_basics(struct powernow_k8_data *data)
588{
589 int j;
590 for (j = 0; j < data->numps; j++) {
1f729e06 591 if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
e7bdd7a5 592 if (cpu_family == CPU_HW_PSTATE) {
4ae5c49f 593 printk(KERN_INFO PFX " %d : pstate %d (%d MHz)\n",
9a60ddbc 594 j,
4ae5c49f 595 data->powernow_table[j].index,
9a60ddbc 596 data->powernow_table[j].frequency/1000);
1f729e06 597 } else {
9a60ddbc
DJ
598 printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n",
599 j,
600 data->powernow_table[j].index & 0xff,
601 data->powernow_table[j].frequency/1000,
602 data->powernow_table[j].index >> 8);
1f729e06
DJ
603 }
604 }
1da177e4
LT
605 }
606 if (data->batps)
607 printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
608}
609
610static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
611{
612 struct cpufreq_frequency_table *powernow_table;
613 unsigned int j;
614
615 if (data->batps) { /* use ACPI support to get full speed on mains power */
616 printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
617 data->numps = data->batps;
618 }
619
620 for ( j=1; j<data->numps; j++ ) {
621 if (pst[j-1].fid >= pst[j].fid) {
622 printk(KERN_ERR PFX "PST out of sequence\n");
623 return -EINVAL;
624 }
625 }
626
627 if (data->numps < 2) {
628 printk(KERN_ERR PFX "no p states to transition\n");
629 return -ENODEV;
630 }
631
632 if (check_pst_table(data, pst, maxvid))
633 return -EINVAL;
634
635 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
636 * (data->numps + 1)), GFP_KERNEL);
637 if (!powernow_table) {
638 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
639 return -ENOMEM;
640 }
641
642 for (j = 0; j < data->numps; j++) {
643 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
644 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
645 powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
646 }
647 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
648 powernow_table[data->numps].index = 0;
649
650 if (query_current_values_with_pending_wait(data)) {
651 kfree(powernow_table);
652 return -EIO;
653 }
654
655 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
656 data->powernow_table = powernow_table;
08357611 657 if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu)
2e497620 658 print_basics(data);
1da177e4
LT
659
660 for (j = 0; j < data->numps; j++)
661 if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
662 return 0;
663
664 dprintk("currfid/vid do not match PST, ignoring\n");
665 return 0;
666}
667
668/* Find and validate the PSB/PST table in BIOS. */
669static int find_psb_table(struct powernow_k8_data *data)
670{
671 struct psb_s *psb;
672 unsigned int i;
673 u32 mvs;
674 u8 maxvid;
675 u32 cpst = 0;
676 u32 thiscpuid;
677
678 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
679 /* Scan BIOS looking for the signature. */
680 /* It can not be at ffff0 - it is too big. */
681
682 psb = phys_to_virt(i);
683 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
684 continue;
685
686 dprintk("found PSB header at 0x%p\n", psb);
687
688 dprintk("table vers: 0x%x\n", psb->tableversion);
689 if (psb->tableversion != PSB_VERSION_1_4) {
2fd47094 690 printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
1da177e4
LT
691 return -ENODEV;
692 }
693
694 dprintk("flags: 0x%x\n", psb->flags1);
695 if (psb->flags1) {
2fd47094 696 printk(KERN_ERR FW_BUG PFX "unknown flags\n");
1da177e4
LT
697 return -ENODEV;
698 }
699
700 data->vstable = psb->vstable;
701 dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
702
703 dprintk("flags2: 0x%x\n", psb->flags2);
704 data->rvo = psb->flags2 & 3;
705 data->irt = ((psb->flags2) >> 2) & 3;
706 mvs = ((psb->flags2) >> 4) & 3;
707 data->vidmvs = 1 << mvs;
708 data->batps = ((psb->flags2) >> 6) & 3;
709
710 dprintk("ramp voltage offset: %d\n", data->rvo);
711 dprintk("isochronous relief time: %d\n", data->irt);
712 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
713
714 dprintk("numpst: 0x%x\n", psb->num_tables);
715 cpst = psb->num_tables;
716 if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
717 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
718 if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
719 cpst = 1;
720 }
721 }
722 if (cpst != 1) {
2fd47094 723 printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
1da177e4
LT
724 return -ENODEV;
725 }
726
727 data->plllock = psb->plllocktime;
728 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
729 dprintk("maxfid: 0x%x\n", psb->maxfid);
730 dprintk("maxvid: 0x%x\n", psb->maxvid);
731 maxvid = psb->maxvid;
732
733 data->numps = psb->numps;
734 dprintk("numpstates: 0x%x\n", data->numps);
735 return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
736 }
737 /*
738 * If you see this message, complain to BIOS manufacturer. If
739 * he tells you "we do not support Linux" or some similar
740 * nonsense, remember that Windows 2000 uses the same legacy
741 * mechanism that the old Linux PSB driver uses. Tell them it
742 * is broken with Windows 2000.
743 *
744 * The reference to the AMD documentation is chapter 9 in the
745 * BIOS and Kernel Developer's Guide, which is available on
746 * www.amd.com
747 */
cc6e8de8 748 printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
1da177e4
LT
749 return -ENODEV;
750}
751
752#ifdef CONFIG_X86_POWERNOW_K8_ACPI
753static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
754{
f607e3a0 755 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
1da177e4
LT
756 return;
757
f607e3a0
LT
758 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
759 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
760 data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
761 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
762 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
763 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
1da177e4
LT
764}
765
766static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
767{
1da177e4 768 struct cpufreq_frequency_table *powernow_table;
1f729e06 769 int ret_val;
1da177e4 770
f607e3a0 771 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
065b807c 772 dprintk("register performance failed: bad ACPI data\n");
1da177e4
LT
773 return -EIO;
774 }
775
776 /* verify the data contained in the ACPI structures */
f607e3a0 777 if (data->acpi_data.state_count <= 1) {
1da177e4
LT
778 dprintk("No ACPI P-States\n");
779 goto err_out;
780 }
781
f607e3a0
LT
782 if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
783 (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
1da177e4 784 dprintk("Invalid control/status registers (%x - %x)\n",
f607e3a0
LT
785 data->acpi_data.control_register.space_id,
786 data->acpi_data.status_register.space_id);
1da177e4
LT
787 goto err_out;
788 }
789
790 /* fill in data->powernow_table */
791 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
f607e3a0 792 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
1da177e4
LT
793 if (!powernow_table) {
794 dprintk("powernow_table memory alloc failure\n");
795 goto err_out;
796 }
797
e7bdd7a5 798 if (cpu_family == CPU_HW_PSTATE)
1f729e06
DJ
799 ret_val = fill_powernow_table_pstate(data, powernow_table);
800 else
801 ret_val = fill_powernow_table_fidvid(data, powernow_table);
802 if (ret_val)
803 goto err_out_mem;
804
f607e3a0
LT
805 powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
806 powernow_table[data->acpi_data.state_count].index = 0;
1f729e06
DJ
807 data->powernow_table = powernow_table;
808
809 /* fill in data */
f607e3a0 810 data->numps = data->acpi_data.state_count;
08357611 811 if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu)
2e497620 812 print_basics(data);
1f729e06
DJ
813 powernow_k8_acpi_pst_values(data, 0);
814
815 /* notify BIOS that we exist */
816 acpi_processor_notify_smm(THIS_MODULE);
817
818 return 0;
819
820err_out_mem:
821 kfree(powernow_table);
822
823err_out:
f607e3a0 824 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
1f729e06
DJ
825
826 /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
f607e3a0 827 data->acpi_data.state_count = 0;
1f729e06
DJ
828
829 return -ENODEV;
830}
831
832static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
833{
834 int i;
c5829cd0
ML
835 u32 hi = 0, lo = 0;
836 rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
837 data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
1f729e06 838
f607e3a0 839 for (i = 0; i < data->acpi_data.state_count; i++) {
1f729e06 840 u32 index;
1f729e06 841
f607e3a0 842 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
c5829cd0 843 if (index > data->max_hw_pstate) {
1f729e06
DJ
844 printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
845 printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
c5829cd0
ML
846 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
847 continue;
1f729e06
DJ
848 }
849 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
850 if (!(hi & HW_PSTATE_VALID_MASK)) {
851 dprintk("invalid pstate %d, ignoring\n", index);
852 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
853 continue;
854 }
855
c5829cd0 856 powernow_table[i].index = index;
1f729e06 857
f607e3a0 858 powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
1f729e06
DJ
859 }
860 return 0;
861}
862
863static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
864{
865 int i;
866 int cntlofreq = 0;
f607e3a0 867 for (i = 0; i < data->acpi_data.state_count; i++) {
094ce7fd
DJ
868 u32 fid;
869 u32 vid;
870
871 if (data->exttype) {
f607e3a0
LT
872 fid = data->acpi_data.states[i].status & EXT_FID_MASK;
873 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
841e40b3 874 } else {
f607e3a0
LT
875 fid = data->acpi_data.states[i].control & FID_MASK;
876 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
841e40b3 877 }
1da177e4
LT
878
879 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
880
881 powernow_table[i].index = fid; /* lower 8 bits */
882 powernow_table[i].index |= (vid << 8); /* upper 8 bits */
883 powernow_table[i].frequency = find_khz_freq_from_fid(fid);
884
885 /* verify frequency is OK */
886 if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
887 (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
888 dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
889 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
890 continue;
891 }
892
893 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
841e40b3 894 if (vid == VID_OFF) {
1da177e4
LT
895 dprintk("invalid vid %u, ignoring\n", vid);
896 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
897 continue;
898 }
899
065b807c
DJ
900 /* verify only 1 entry from the lo frequency table */
901 if (fid < HI_FID_TABLE_BOTTOM) {
902 if (cntlofreq) {
32ee8c3e 903 /* if both entries are the same, ignore this one ... */
065b807c
DJ
904 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
905 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
906 printk(KERN_ERR PFX "Too many lo freq table entries\n");
1f729e06 907 return 1;
065b807c
DJ
908 }
909
910 dprintk("double low frequency table entry, ignoring it.\n");
911 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
912 continue;
913 } else
914 cntlofreq = i;
1da177e4
LT
915 }
916
f607e3a0 917 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
1da177e4
LT
918 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
919 powernow_table[i].frequency,
f607e3a0 920 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
1da177e4
LT
921 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
922 continue;
923 }
924 }
1da177e4 925 return 0;
1da177e4
LT
926}
927
928static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
929{
f607e3a0
LT
930 if (data->acpi_data.state_count)
931 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
1da177e4
LT
932}
933
934#else
935static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
936static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
937static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
938#endif /* CONFIG_X86_POWERNOW_K8_ACPI */
939
940/* Take a frequency, and issue the fid/vid transition command */
1f729e06 941static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
1da177e4 942{
1f729e06
DJ
943 u32 fid = 0;
944 u32 vid = 0;
065b807c 945 int res, i;
1da177e4
LT
946 struct cpufreq_freqs freqs;
947
948 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
949
1f729e06 950 /* fid/vid correctness check for k8 */
1da177e4 951 /* fid are the lower 8 bits of the index we stored into
1f729e06
DJ
952 * the cpufreq frequency table in find_psb_table, vid
953 * are the upper 8 bits.
1da177e4 954 */
1da177e4
LT
955 fid = data->powernow_table[index].index & 0xFF;
956 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
957
958 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
959
960 if (query_current_values_with_pending_wait(data))
961 return 1;
962
963 if ((data->currvid == vid) && (data->currfid == fid)) {
964 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
965 fid, vid);
966 return 0;
967 }
968
969 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
065b807c
DJ
970 printk(KERN_ERR PFX
971 "ignoring illegal change in lo freq table-%x to 0x%x\n",
1da177e4
LT
972 data->currfid, fid);
973 return 1;
974 }
975
976 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
977 smp_processor_id(), fid, vid);
1da177e4
LT
978 freqs.old = find_khz_freq_from_fid(data->currfid);
979 freqs.new = find_khz_freq_from_fid(fid);
1f729e06 980
334ef7a7 981 for_each_cpu_mask_nr(i, *(data->available_cores)) {
065b807c
DJ
982 freqs.cpu = i;
983 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
984 }
1da177e4 985
1da177e4 986 res = transition_fid_vid(data, fid, vid);
1da177e4 987 freqs.new = find_khz_freq_from_fid(data->currfid);
1f729e06 988
334ef7a7 989 for_each_cpu_mask_nr(i, *(data->available_cores)) {
1f729e06
DJ
990 freqs.cpu = i;
991 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
992 }
993 return res;
994}
995
996/* Take a frequency, and issue the hardware pstate transition command */
997static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
998{
1f729e06
DJ
999 u32 pstate = 0;
1000 int res, i;
1001 struct cpufreq_freqs freqs;
1002
1003 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
1004
c5829cd0 1005 /* get MSR index for hardware pstate transition */
1f729e06 1006 pstate = index & HW_PSTATE_MASK;
c5829cd0 1007 if (pstate > data->max_hw_pstate)
1f729e06 1008 return 0;
c5829cd0
ML
1009 freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
1010 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1f729e06 1011
334ef7a7 1012 for_each_cpu_mask_nr(i, *(data->available_cores)) {
1f729e06
DJ
1013 freqs.cpu = i;
1014 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1015 }
1016
1017 res = transition_pstate(data, pstate);
c5829cd0 1018 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1f729e06 1019
334ef7a7 1020 for_each_cpu_mask_nr(i, *(data->available_cores)) {
065b807c
DJ
1021 freqs.cpu = i;
1022 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
2e3f8faa 1023 }
1da177e4
LT
1024 return res;
1025}
1026
1027/* Driver entry point to switch to the target frequency */
1028static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
1029{
fc0e4748 1030 cpumask_t oldmask;
2c6b8c03 1031 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
9180053c
AB
1032 u32 checkfid;
1033 u32 checkvid;
1da177e4
LT
1034 unsigned int newstate;
1035 int ret = -EIO;
1036
4211a303
JS
1037 if (!data)
1038 return -EINVAL;
1039
9180053c
AB
1040 checkfid = data->currfid;
1041 checkvid = data->currvid;
1042
1da177e4
LT
1043 /* only run on specific CPU from here on */
1044 oldmask = current->cpus_allowed;
0bc3cc03 1045 set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu));
1da177e4
LT
1046
1047 if (smp_processor_id() != pol->cpu) {
8aae8284 1048 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1da177e4
LT
1049 goto err_out;
1050 }
1051
1052 if (pending_bit_stuck()) {
1053 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1054 goto err_out;
1055 }
1056
1057 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1058 pol->cpu, targfreq, pol->min, pol->max, relation);
1059
83844510 1060 if (query_current_values_with_pending_wait(data))
1da177e4 1061 goto err_out;
1da177e4 1062
c5829cd0 1063 if (cpu_family != CPU_HW_PSTATE) {
1f729e06 1064 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
1da177e4
LT
1065 data->currfid, data->currvid);
1066
1f729e06
DJ
1067 if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
1068 printk(KERN_INFO PFX
1069 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
1070 checkfid, data->currfid, checkvid, data->currvid);
1071 }
1da177e4
LT
1072 }
1073
1074 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
1075 goto err_out;
1076
14cc3e2b 1077 mutex_lock(&fidvid_mutex);
065b807c 1078
1da177e4
LT
1079 powernow_k8_acpi_pst_values(data, newstate);
1080
e7bdd7a5 1081 if (cpu_family == CPU_HW_PSTATE)
1f729e06
DJ
1082 ret = transition_frequency_pstate(data, newstate);
1083 else
1084 ret = transition_frequency_fidvid(data, newstate);
1085 if (ret) {
1da177e4
LT
1086 printk(KERN_ERR PFX "transition frequency failed\n");
1087 ret = 1;
14cc3e2b 1088 mutex_unlock(&fidvid_mutex);
1da177e4
LT
1089 goto err_out;
1090 }
14cc3e2b 1091 mutex_unlock(&fidvid_mutex);
065b807c 1092
e7bdd7a5 1093 if (cpu_family == CPU_HW_PSTATE)
c5829cd0 1094 pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
1f729e06
DJ
1095 else
1096 pol->cur = find_khz_freq_from_fid(data->currfid);
1da177e4
LT
1097 ret = 0;
1098
1099err_out:
fc0e4748 1100 set_cpus_allowed_ptr(current, &oldmask);
1da177e4
LT
1101 return ret;
1102}
1103
1104/* Driver entry point to verify the policy and range of frequencies */
1105static int powernowk8_verify(struct cpufreq_policy *pol)
1106{
2c6b8c03 1107 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1da177e4 1108
4211a303
JS
1109 if (!data)
1110 return -EINVAL;
1111
1da177e4
LT
1112 return cpufreq_frequency_table_verify(pol, data->powernow_table);
1113}
1114
1115/* per CPU init entry point to the driver */
aa41eb99 1116static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1da177e4
LT
1117{
1118 struct powernow_k8_data *data;
f607e3a0 1119 cpumask_t oldmask;
d7fa706c 1120 int rc;
1da177e4 1121
8aae8284
JS
1122 if (!cpu_online(pol->cpu))
1123 return -ENODEV;
1124
1da177e4
LT
1125 if (!check_supported_cpu(pol->cpu))
1126 return -ENODEV;
1127
bfdc708d 1128 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1da177e4
LT
1129 if (!data) {
1130 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1131 return -ENOMEM;
1132 }
1da177e4
LT
1133
1134 data->cpu = pol->cpu;
a266d9f1 1135 data->currpstate = HW_PSTATE_INVALID;
1da177e4
LT
1136
1137 if (powernow_k8_cpu_init_acpi(data)) {
1138 /*
1139 * Use the PSB BIOS structure. This is only availabe on
1140 * an UP version, and is deprecated by AMD.
1141 */
9ed059e1 1142 if (num_online_cpus() != 1) {
eba9fe93
ML
1143#ifndef CONFIG_ACPI_PROCESSOR
1144 printk(KERN_ERR PFX "ACPI Processor support is required "
1145 "for SMP systems but is absent. Please load the "
1146 "ACPI Processor module before starting this "
1147 "driver.\n");
1148#else
2fd47094
TR
1149 printk(KERN_ERR FW_BUG PFX "Your BIOS does not provide"
1150 " ACPI _PSS objects in a way that Linux "
1151 "understands. Please report this to the Linux "
1152 "ACPI maintainers and complain to your BIOS "
1153 "vendor.\n");
eba9fe93 1154#endif
1da177e4
LT
1155 kfree(data);
1156 return -ENODEV;
1157 }
1158 if (pol->cpu != 0) {
2fd47094
TR
1159 printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
1160 "CPU other than CPU0. Complain to your BIOS "
1161 "vendor.\n");
1da177e4
LT
1162 kfree(data);
1163 return -ENODEV;
1164 }
1165 rc = find_psb_table(data);
1166 if (rc) {
1167 kfree(data);
1168 return -ENODEV;
1169 }
1170 }
1171
1172 /* only run on specific CPU from here on */
1173 oldmask = current->cpus_allowed;
0bc3cc03 1174 set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu));
1da177e4
LT
1175
1176 if (smp_processor_id() != pol->cpu) {
8aae8284 1177 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1da177e4
LT
1178 goto err_out;
1179 }
1180
1181 if (pending_bit_stuck()) {
1182 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1183 goto err_out;
1184 }
1185
1186 if (query_current_values_with_pending_wait(data))
1187 goto err_out;
1188
e7bdd7a5 1189 if (cpu_family == CPU_OPTERON)
1f729e06 1190 fidvid_msr_init();
1da177e4
LT
1191
1192 /* run on any CPU again */
fc0e4748 1193 set_cpus_allowed_ptr(current, &oldmask);
1da177e4 1194
f607e3a0
LT
1195 if (cpu_family == CPU_HW_PSTATE)
1196 pol->cpus = cpumask_of_cpu(pol->cpu);
1197 else
1198 pol->cpus = per_cpu(cpu_core_map, pol->cpu);
1f729e06 1199 data->available_cores = &(pol->cpus);
1da177e4 1200
32ee8c3e 1201 /* Take a crude guess here.
1da177e4
LT
1202 * That guess was in microseconds, so multiply with 1000 */
1203 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
1204 + (3 * (1 << data->irt) * 10)) * 1000;
1205
e7bdd7a5 1206 if (cpu_family == CPU_HW_PSTATE)
c5829cd0 1207 pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
1f729e06
DJ
1208 else
1209 pol->cur = find_khz_freq_from_fid(data->currfid);
1da177e4
LT
1210 dprintk("policy current frequency %d kHz\n", pol->cur);
1211
1212 /* min/max the cpu is capable of */
1213 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
2fd47094 1214 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
1da177e4
LT
1215 powernow_k8_cpu_exit_acpi(data);
1216 kfree(data->powernow_table);
1217 kfree(data);
1218 return -EINVAL;
1219 }
1220
1221 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1222
e7bdd7a5 1223 if (cpu_family == CPU_HW_PSTATE)
c5829cd0 1224 dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
1f729e06
DJ
1225 else
1226 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1227 data->currfid, data->currvid);
1da177e4 1228
2c6b8c03 1229 per_cpu(powernow_data, pol->cpu) = data;
1da177e4
LT
1230
1231 return 0;
1232
1233err_out:
fc0e4748 1234 set_cpus_allowed_ptr(current, &oldmask);
1da177e4
LT
1235 powernow_k8_cpu_exit_acpi(data);
1236
1237 kfree(data);
1238 return -ENODEV;
1239}
1240
1241static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
1242{
2c6b8c03 1243 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1da177e4
LT
1244
1245 if (!data)
1246 return -EINVAL;
1247
1248 powernow_k8_cpu_exit_acpi(data);
1249
1250 cpufreq_frequency_table_put_attr(pol->cpu);
1251
1252 kfree(data->powernow_table);
1253 kfree(data);
1254
1255 return 0;
1256}
1257
1258static unsigned int powernowk8_get (unsigned int cpu)
1259{
eef5167e 1260 struct powernow_k8_data *data;
1da177e4
LT
1261 cpumask_t oldmask = current->cpus_allowed;
1262 unsigned int khz = 0;
89c04849 1263 unsigned int first;
1da177e4 1264
89c04849
DJ
1265 first = first_cpu(per_cpu(cpu_core_map, cpu));
1266 data = per_cpu(powernow_data, first);
eef5167e
JS
1267
1268 if (!data)
1269 return -EINVAL;
1270
0bc3cc03 1271 set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
1da177e4 1272 if (smp_processor_id() != cpu) {
fc0e4748
MT
1273 printk(KERN_ERR PFX
1274 "limiting to CPU %d failed in powernowk8_get\n", cpu);
1275 set_cpus_allowed_ptr(current, &oldmask);
1da177e4
LT
1276 return 0;
1277 }
b9111b7b 1278
1da177e4
LT
1279 if (query_current_values_with_pending_wait(data))
1280 goto out;
1281
58389a86 1282 if (cpu_family == CPU_HW_PSTATE)
fc0e4748
MT
1283 khz = find_khz_freq_from_pstate(data->powernow_table,
1284 data->currpstate);
58389a86
JD
1285 else
1286 khz = find_khz_freq_from_fid(data->currfid);
1287
1da177e4 1288
b9111b7b 1289out:
fc0e4748 1290 set_cpus_allowed_ptr(current, &oldmask);
1da177e4
LT
1291 return khz;
1292}
1293
1294static struct freq_attr* powernow_k8_attr[] = {
1295 &cpufreq_freq_attr_scaling_available_freqs,
1296 NULL,
1297};
1298
221dee28 1299static struct cpufreq_driver cpufreq_amd64_driver = {
1da177e4
LT
1300 .verify = powernowk8_verify,
1301 .target = powernowk8_target,
1302 .init = powernowk8_cpu_init,
1303 .exit = __devexit_p(powernowk8_cpu_exit),
1304 .get = powernowk8_get,
1305 .name = "powernow-k8",
1306 .owner = THIS_MODULE,
1307 .attr = powernow_k8_attr,
1308};
1309
1310/* driver entry point for init */
aa41eb99 1311static int __cpuinit powernowk8_init(void)
1da177e4
LT
1312{
1313 unsigned int i, supported_cpus = 0;
1314
a7201156 1315 for_each_online_cpu(i) {
1da177e4
LT
1316 if (check_supported_cpu(i))
1317 supported_cpus++;
1318 }
1319
1320 if (supported_cpus == num_online_cpus()) {
1f729e06 1321 printk(KERN_INFO PFX "Found %d %s "
904f7a3f 1322 "processors (%d cpu cores) (" VERSION ")\n",
c925401b 1323 num_online_nodes(),
904f7a3f 1324 boot_cpu_data.x86_model_id, supported_cpus);
1da177e4
LT
1325 return cpufreq_register_driver(&cpufreq_amd64_driver);
1326 }
1327
1328 return -ENODEV;
1329}
1330
1331/* driver entry point for term */
1332static void __exit powernowk8_exit(void)
1333{
1334 dprintk("exit\n");
1335
1336 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1337}
1338
8aae8284 1339MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
1da177e4
LT
1340MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1341MODULE_LICENSE("GPL");
1342
1343late_initcall(powernowk8_init);
1344module_exit(powernowk8_exit);