[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / cpu / cpufreq / speedstep-ich.c

/*
 * (C) 2001  Dave Jones, Arjan van de ven.
 * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
 *
 *  Licensed under the terms of the GNU GPL License version 2.
 *  Based upon reverse engineered information, and on Intel documentation
 *  for chipsets ICH2-M and ICH3-M.
 *
 *  Many thanks to Ducrot Bruno for finding and fixing the last
 *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
 *  for extensive testing.
 *
 *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
 */


/*********************************************************************
 *                        SPEEDSTEP - DEFINITIONS                    *
 *********************************************************************/

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/sched.h>

#include "speedstep-lib.h"


/* speedstep_chipset:
 *   It is necessary to know which chipset is used. As accesses to
 * this device occur at various places in this module, we need a
 * static struct pci_dev * pointing to that device.
 */
static struct pci_dev *speedstep_chipset_dev;


/* speedstep_processor
 */
static unsigned int speedstep_processor;

static u32 pmbase;

/*
 *   There are only two frequency states for each processor. Values
 * are in kHz for the time being.
 */
static struct cpufreq_frequency_table speedstep_freqs[] = {
	{SPEEDSTEP_HIGH,	0},
	{SPEEDSTEP_LOW,		0},
	{0,			CPUFREQ_TABLE_END},
};


#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
		"speedstep-ich", msg)


/**
 * speedstep_find_register - read the PMBASE address
 *
 * Returns: -ENODEV if no register could be found
 */
static int speedstep_find_register(void)
{
	if (!speedstep_chipset_dev)
		return -ENODEV;

	/* get PMBASE */
	pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
	if (!(pmbase & 0x01)) {
		printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
		return -ENODEV;
	}

	pmbase &= 0xFFFFFFFE;
	if (!pmbase) {
		printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
		return -ENODEV;
	}

	dprintk("pmbase is 0x%x\n", pmbase);
	return 0;
}

/**
 * speedstep_set_state - set the SpeedStep state
 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
 *
 *   Tries to change the SpeedStep state.
 */
static void speedstep_set_state(unsigned int state)
{
	u8 pm2_blk;
	u8 value;
	unsigned long flags;

	if (state > 0x1)
		return;

	/* Disable IRQs */
	local_irq_save(flags);

	/* read state */
	value = inb(pmbase + 0x50);

	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);

	/* write new state */
	value &= 0xFE;
	value |= state;

	dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);

	/* Disable bus master arbitration */
	pm2_blk = inb(pmbase + 0x20);
	pm2_blk |= 0x01;
	outb(pm2_blk, (pmbase + 0x20));

	/* Actual transition */
	outb(value, (pmbase + 0x50));

	/* Restore bus master arbitration */
	pm2_blk &= 0xfe;
	outb(pm2_blk, (pmbase + 0x20));

	/* check if transition was successful */
	value = inb(pmbase + 0x50);

	/* Enable IRQs */
	local_irq_restore(flags);

	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);

	if (state == (value & 0x1))
		dprintk("change to %u MHz succeeded\n",
			speedstep_get_frequency(speedstep_processor) / 1000);
	else
		printk(KERN_ERR "cpufreq: change failed - I/O error\n");

	return;
}


/**
 * speedstep_activate - activate SpeedStep control in the chipset
 *
 *   Tries to activate the SpeedStep status and control registers.
 * Returns -EINVAL on an unsupported chipset, and zero on success.
 */
static int speedstep_activate(void)
{
	u16 value = 0;

	if (!speedstep_chipset_dev)
		return -EINVAL;

	pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
	if (!(value & 0x08)) {
		value |= 0x08;
		dprintk("activating SpeedStep (TM) registers\n");
		pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
	}

	return 0;
}


/**
 * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 *
 *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 * the LPC bridge / PM module which contains all power-management
 * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 * chipset, or zero on failure.
 */
static unsigned int speedstep_detect_chipset(void)
{
	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801DB_12,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev)
		return 4; /* 4-M */

	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801CA_12,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev)
		return 3; /* 3-M */


	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82801BA_10,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);
	if (speedstep_chipset_dev) {
		/* speedstep.c causes lockups on Dell Inspirons 8000 and
		 * 8100 which use a pretty old revision of the 82815
		 * host brige. Abort on these systems.
		 */
		static struct pci_dev *hostbridge;

		hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
			      PCI_DEVICE_ID_INTEL_82815_MC,
			      PCI_ANY_ID, PCI_ANY_ID,
			      NULL);

		if (!hostbridge)
			return 2; /* 2-M */

		if (hostbridge->revision < 5) {
			dprintk("hostbridge does not support speedstep\n");
			speedstep_chipset_dev = NULL;
			pci_dev_put(hostbridge);
			return 0;
		}

		pci_dev_put(hostbridge);
		return 2; /* 2-M */
	}

	return 0;
}

static unsigned int _speedstep_get(const struct cpumask *cpus)
{
	unsigned int speed;
	cpumask_t cpus_allowed;

	cpus_allowed = current->cpus_allowed;
	set_cpus_allowed_ptr(current, cpus);
	speed = speedstep_get_frequency(speedstep_processor);
	set_cpus_allowed_ptr(current, &cpus_allowed);
	dprintk("detected %u kHz as current frequency\n", speed);
	return speed;
}

static unsigned int speedstep_get(unsigned int cpu)
{
	return _speedstep_get(cpumask_of(cpu));
}

/**
 * speedstep_target - set a new CPUFreq policy
 * @policy: new policy
 * @target_freq: the target frequency
 * @relation: how that frequency relates to achieved frequency
 *	(CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 *
 * Sets a new CPUFreq policy.
 */
static int speedstep_target(struct cpufreq_policy *policy,
			     unsigned int target_freq,
			     unsigned int relation)
{
	unsigned int newstate = 0;
	struct cpufreq_freqs freqs;
	cpumask_t cpus_allowed;
	int i;

	if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
				target_freq, relation, &newstate))
		return -EINVAL;

	freqs.old = _speedstep_get(policy->cpus);
	freqs.new = speedstep_freqs[newstate].frequency;
	freqs.cpu = policy->cpu;

	dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);

	/* no transition necessary */
	if (freqs.old == freqs.new)
		return 0;

	cpus_allowed = current->cpus_allowed;

	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	}

	/* switch to physical CPU where state is to be changed */
	set_cpus_allowed_ptr(current, policy->cpus);

	speedstep_set_state(newstate);

	/* allow to be run on all CPUs */
	set_cpus_allowed_ptr(current, &cpus_allowed);

	for_each_cpu(i, policy->cpus) {
		freqs.cpu = i;
		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	}

	return 0;
}


/**
 * speedstep_verify - verifies a new CPUFreq policy
 * @policy: new policy
 *
 * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 * at least one border included.
 */
static int speedstep_verify(struct cpufreq_policy *policy)
{
	return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
}


static int speedstep_cpu_init(struct cpufreq_policy *policy)
{
	int result = 0;
	unsigned int speed;
	cpumask_t cpus_allowed;

	/* only run on CPU to be set, or on its sibling */
#ifdef CONFIG_SMP
	cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
#endif

	cpus_allowed = current->cpus_allowed;
	set_cpus_allowed_ptr(current, policy->cpus);

	/* detect low and high frequency and transition latency */
	result = speedstep_get_freqs(speedstep_processor,
				     &speedstep_freqs[SPEEDSTEP_LOW].frequency,
				     &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
				     &policy->cpuinfo.transition_latency,
				     &speedstep_set_state);
	set_cpus_allowed_ptr(current, &cpus_allowed);
	if (result)
		return result;

	/* get current speed setting */
	speed = _speedstep_get(policy->cpus);
	if (!speed)
		return -EIO;

	dprintk("currently at %s speed setting - %i MHz\n",
		(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
		? "low" : "high",
		(speed / 1000));

	/* cpuinfo and default policy values */
	policy->cur = speed;

	result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
	if (result)
		return result;

	cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);

	return 0;
}


static int speedstep_cpu_exit(struct cpufreq_policy *policy)
{
	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}

static struct freq_attr *speedstep_attr[] = {
	&cpufreq_freq_attr_scaling_available_freqs,
	NULL,
};


static struct cpufreq_driver speedstep_driver = {
	.name	= "speedstep-ich",
	.verify	= speedstep_verify,
	.target	= speedstep_target,
	.init	= speedstep_cpu_init,
	.exit	= speedstep_cpu_exit,
	.get	= speedstep_get,
	.owner	= THIS_MODULE,
	.attr	= speedstep_attr,
};


/**
 * speedstep_init - initializes the SpeedStep CPUFreq driver
 *
 *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 * devices, -EINVAL on problems during initiatization, and zero on
 * success.
 */
static int __init speedstep_init(void)
{
	/* detect processor */
	speedstep_processor = speedstep_detect_processor();
	if (!speedstep_processor) {
		dprintk("Intel(R) SpeedStep(TM) capable processor "
				"not found\n");
		return -ENODEV;
	}

	/* detect chipset */
	if (!speedstep_detect_chipset()) {
		dprintk("Intel(R) SpeedStep(TM) for this chipset not "
				"(yet) available.\n");
		return -ENODEV;
	}

	/* activate speedstep support */
	if (speedstep_activate()) {
		pci_dev_put(speedstep_chipset_dev);
		return -EINVAL;
	}

	if (speedstep_find_register())
		return -ENODEV;

	return cpufreq_register_driver(&speedstep_driver);
}


/**
 * speedstep_exit - unregisters SpeedStep support
 *
 *   Unregisters SpeedStep support.
 */
static void __exit speedstep_exit(void)
{
	pci_dev_put(speedstep_chipset_dev);
	cpufreq_unregister_driver(&speedstep_driver);
}


MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
		"Dominik Brodowski <linux@brodo.de>");
MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
		"with ICH-M southbridges.");
MODULE_LICENSE("GPL");

module_init(speedstep_init);
module_exit(speedstep_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* (C) 2001 Dave Jones, Arjan van de ven.
	3	* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
	4	*
	5	* Licensed under the terms of the GNU GPL License version 2.
	6	* Based upon reverse engineered information, and on Intel documentation
	7	* for chipsets ICH2-M and ICH3-M.
	8	*
	9	* Many thanks to Ducrot Bruno for finding and fixing the last
	10	* "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
	11	* for extensive testing.
	12	*
	13	* BIG FAT DISCLAIMER: Work in progress code. Possibly dangerous
	14	*/
	15
	16
	17	/*********************************************************************
	18	* SPEEDSTEP - DEFINITIONS *
	19	*********************************************************************/
	20
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/init.h>
	24	#include <linux/cpufreq.h>
	25	#include <linux/pci.h>
	26	#include <linux/slab.h>
e8edc6e0	27	#include <linux/sched.h>
1da177e4 LT	28
	29	#include "speedstep-lib.h"
	30
	31
	32	/* speedstep_chipset:
	33	* It is necessary to know which chipset is used. As accesses to
	34	* this device occur at various places in this module, we need a
	35	* static struct pci_dev * pointing to that device.
	36	*/
	37	static struct pci_dev *speedstep_chipset_dev;
	38
	39
	40	/* speedstep_processor
	41	*/
bbfebd66	42	static unsigned int speedstep_processor;
1da177e4	43
9a7d82a8	44	static u32 pmbase;
1da177e4 LT	45
	46	/*
	47	* There are only two frequency states for each processor. Values
	48	* are in kHz for the time being.
	49	*/
	50	static struct cpufreq_frequency_table speedstep_freqs[] = {
	51	{SPEEDSTEP_HIGH, 0},
	52	{SPEEDSTEP_LOW, 0},
	53	{0, CPUFREQ_TABLE_END},
	54	};
	55
	56
bbfebd66 DJ	57	#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
bbfebd66 DJ	58	"speedstep-ich", msg)
1da177e4 LT	59
	60
	61	/**
9a7d82a8	62	* speedstep_find_register - read the PMBASE address
1da177e4	63	*
9a7d82a8	64	* Returns: -ENODEV if no register could be found
1da177e4	65	*/
bbfebd66	66	static int speedstep_find_register(void)
1da177e4	67	{
9a7d82a8 MD	68	if (!speedstep_chipset_dev)
9a7d82a8 MD	69	return -ENODEV;
1da177e4 LT	70
	71	/* get PMBASE */
	72	pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
	73	if (!(pmbase & 0x01)) {
	74	printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
9a7d82a8	75	return -ENODEV;
1da177e4 LT	76	}
	77
	78	pmbase &= 0xFFFFFFFE;
	79	if (!pmbase) {
	80	printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
9a7d82a8	81	return -ENODEV;
1da177e4 LT	82	}
1da177e4 LT	83
9a7d82a8 MD	84	dprintk("pmbase is 0x%x\n", pmbase);
	85	return 0;
	86	}
	87
	88	/**
	89	* speedstep_set_state - set the SpeedStep state
	90	* @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
	91	*
	92	* Tries to change the SpeedStep state.
	93	*/
bbfebd66	94	static void speedstep_set_state(unsigned int state)
9a7d82a8 MD	95	{
	96	u8 pm2_blk;
	97	u8 value;
	98	unsigned long flags;
	99
	100	if (state > 0x1)
	101	return;
	102
1da177e4 LT	103	/* Disable IRQs */
	104	local_irq_save(flags);
	105
	106	/* read state */
	107	value = inb(pmbase + 0x50);
	108
	109	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
	110
	111	/* write new state */
	112	value &= 0xFE;
	113	value \|= state;
	114
	115	dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
	116
	117	/* Disable bus master arbitration */
	118	pm2_blk = inb(pmbase + 0x20);
	119	pm2_blk \|= 0x01;
	120	outb(pm2_blk, (pmbase + 0x20));
	121
	122	/* Actual transition */
	123	outb(value, (pmbase + 0x50));
	124
	125	/* Restore bus master arbitration */
	126	pm2_blk &= 0xfe;
	127	outb(pm2_blk, (pmbase + 0x20));
	128
	129	/* check if transition was successful */
	130	value = inb(pmbase + 0x50);
	131
	132	/* Enable IRQs */
	133	local_irq_restore(flags);
	134
	135	dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
	136
bbfebd66 DJ	137	if (state == (value & 0x1))
	138	dprintk("change to %u MHz succeeded\n",
	139	speedstep_get_frequency(speedstep_processor) / 1000);
	140	else
	141	printk(KERN_ERR "cpufreq: change failed - I/O error\n");
1da177e4 LT	142
	143	return;
	144	}
	145
	146
	147	/**
	148	* speedstep_activate - activate SpeedStep control in the chipset
	149	*
	150	* Tries to activate the SpeedStep status and control registers.
	151	* Returns -EINVAL on an unsupported chipset, and zero on success.
	152	*/
bbfebd66	153	static int speedstep_activate(void)
1da177e4 LT	154	{
	155	u16 value = 0;
	156
	157	if (!speedstep_chipset_dev)
	158	return -EINVAL;
	159
	160	pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
	161	if (!(value & 0x08)) {
	162	value \|= 0x08;
	163	dprintk("activating SpeedStep (TM) registers\n");
	164	pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
	165	}
	166
	167	return 0;
	168	}
	169
	170
	171	/**
	172	* speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
	173	*
	174	* Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
	175	* the LPC bridge / PM module which contains all power-management
	176	* functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
	177	* chipset, or zero on failure.
	178	*/
bbfebd66	179	static unsigned int speedstep_detect_chipset(void)
1da177e4 LT	180	{
	181	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	182	PCI_DEVICE_ID_INTEL_82801DB_12,
bbfebd66	183	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	184	NULL);
	185	if (speedstep_chipset_dev)
	186	return 4; /* 4-M */
	187
	188	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	189	PCI_DEVICE_ID_INTEL_82801CA_12,
bbfebd66	190	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	191	NULL);
	192	if (speedstep_chipset_dev)
	193	return 3; /* 3-M */
	194
	195
	196	speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	197	PCI_DEVICE_ID_INTEL_82801BA_10,
bbfebd66	198	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	199	NULL);
	200	if (speedstep_chipset_dev) {
	201	/* speedstep.c causes lockups on Dell Inspirons 8000 and
	202	* 8100 which use a pretty old revision of the 82815
	203	* host brige. Abort on these systems.
	204	*/
	205	static struct pci_dev *hostbridge;
1da177e4 LT	206
	207	hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
	208	PCI_DEVICE_ID_INTEL_82815_MC,
bbfebd66	209	PCI_ANY_ID, PCI_ANY_ID,
1da177e4 LT	210	NULL);
	211
	212	if (!hostbridge)
	213	return 2; /* 2-M */
	214
44c10138	215	if (hostbridge->revision < 5) {
1da177e4 LT	216	dprintk("hostbridge does not support speedstep\n");
	217	speedstep_chipset_dev = NULL;
	218	pci_dev_put(hostbridge);
	219	return 0;
	220	}
	221
	222	pci_dev_put(hostbridge);
	223	return 2; /* 2-M */
	224	}
	225
	226	return 0;
	227	}
	228
835481d9	229	static unsigned int _speedstep_get(const struct cpumask *cpus)
1da177e4 LT	230	{
	231	unsigned int speed;
	232	cpumask_t cpus_allowed;
	233
	234	cpus_allowed = current->cpus_allowed;
fc0e4748	235	set_cpus_allowed_ptr(current, cpus);
bbfebd66	236	speed = speedstep_get_frequency(speedstep_processor);
fc0e4748	237	set_cpus_allowed_ptr(current, &cpus_allowed);
1da177e4 LT	238	dprintk("detected %u kHz as current frequency\n", speed);
	239	return speed;
	240	}
	241
	242	static unsigned int speedstep_get(unsigned int cpu)
	243	{
835481d9	244	return _speedstep_get(cpumask_of(cpu));
1da177e4 LT	245	}
	246
	247	/**
	248	* speedstep_target - set a new CPUFreq policy
	249	* @policy: new policy
	250	* @target_freq: the target frequency
bbfebd66 DJ	251	* @relation: how that frequency relates to achieved frequency
bbfebd66 DJ	252	* (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
1da177e4 LT	253	*
	254	* Sets a new CPUFreq policy.
	255	*/
bbfebd66	256	static int speedstep_target(struct cpufreq_policy *policy,
1da177e4 LT	257	unsigned int target_freq,
	258	unsigned int relation)
	259	{
	260	unsigned int newstate = 0;
	261	struct cpufreq_freqs freqs;
	262	cpumask_t cpus_allowed;
	263	int i;
	264
bbfebd66 DJ	265	if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
bbfebd66 DJ	266	target_freq, relation, &newstate))
1da177e4 LT	267	return -EINVAL;
1da177e4 LT	268
835481d9	269	freqs.old = _speedstep_get(policy->cpus);
1da177e4 LT	270	freqs.new = speedstep_freqs[newstate].frequency;
	271	freqs.cpu = policy->cpu;
	272
	273	dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
	274
	275	/* no transition necessary */
	276	if (freqs.old == freqs.new)
	277	return 0;
	278
	279	cpus_allowed = current->cpus_allowed;
	280
835481d9	281	for_each_cpu(i, policy->cpus) {
1da177e4 LT	282	freqs.cpu = i;
	283	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	284	}
	285
	286	/* switch to physical CPU where state is to be changed */
835481d9	287	set_cpus_allowed_ptr(current, policy->cpus);
1da177e4 LT	288
	289	speedstep_set_state(newstate);
	290
	291	/* allow to be run on all CPUs */
fc0e4748	292	set_cpus_allowed_ptr(current, &cpus_allowed);
1da177e4	293
835481d9	294	for_each_cpu(i, policy->cpus) {
1da177e4 LT	295	freqs.cpu = i;
	296	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	297	}
	298
	299	return 0;
	300	}
	301
	302
	303	/**
	304	* speedstep_verify - verifies a new CPUFreq policy
	305	* @policy: new policy
	306	*
	307	* Limit must be within speedstep_low_freq and speedstep_high_freq, with
	308	* at least one border included.
	309	*/
bbfebd66	310	static int speedstep_verify(struct cpufreq_policy *policy)
1da177e4 LT	311	{
	312	return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
	313	}
	314
	315
	316	static int speedstep_cpu_init(struct cpufreq_policy *policy)
	317	{
	318	int result = 0;
	319	unsigned int speed;
	320	cpumask_t cpus_allowed;
	321
	322	/* only run on CPU to be set, or on its sibling */
	323	#ifdef CONFIG_SMP
7ad728f9	324	cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
1da177e4 LT	325	#endif
	326
	327	cpus_allowed = current->cpus_allowed;
835481d9	328	set_cpus_allowed_ptr(current, policy->cpus);
1da177e4	329
1a10760c	330	/* detect low and high frequency and transition latency */
1da177e4 LT	331	result = speedstep_get_freqs(speedstep_processor,
	332	&speedstep_freqs[SPEEDSTEP_LOW].frequency,
	333	&speedstep_freqs[SPEEDSTEP_HIGH].frequency,
1a10760c	334	&policy->cpuinfo.transition_latency,
1da177e4	335	&speedstep_set_state);
fc0e4748	336	set_cpus_allowed_ptr(current, &cpus_allowed);
1da177e4 LT	337	if (result)
	338	return result;
	339
	340	/* get current speed setting */
835481d9	341	speed = _speedstep_get(policy->cpus);
1da177e4 LT	342	if (!speed)
	343	return -EIO;
	344
	345	dprintk("currently at %s speed setting - %i MHz\n",
bbfebd66 DJ	346	(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
bbfebd66 DJ	347	? "low" : "high",
1da177e4 LT	348	(speed / 1000));
	349
	350	/* cpuinfo and default policy values */
1da177e4 LT	351	policy->cur = speed;
	352
	353	result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
	354	if (result)
bbfebd66	355	return result;
1da177e4	356
bbfebd66	357	cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
1da177e4 LT	358
	359	return 0;
	360	}
	361
	362
	363	static int speedstep_cpu_exit(struct cpufreq_policy *policy)
	364	{
	365	cpufreq_frequency_table_put_attr(policy->cpu);
	366	return 0;
	367	}
	368
bbfebd66	369	static struct freq_attr *speedstep_attr[] = {
1da177e4 LT	370	&cpufreq_freq_attr_scaling_available_freqs,
	371	NULL,
	372	};
	373
	374
221dee28	375	static struct cpufreq_driver speedstep_driver = {
1da177e4 LT	376	.name = "speedstep-ich",
	377	.verify = speedstep_verify,
	378	.target = speedstep_target,
	379	.init = speedstep_cpu_init,
	380	.exit = speedstep_cpu_exit,
	381	.get = speedstep_get,
	382	.owner = THIS_MODULE,
	383	.attr = speedstep_attr,
	384	};
	385
	386
	387	/**
	388	* speedstep_init - initializes the SpeedStep CPUFreq driver
	389	*
	390	* Initializes the SpeedStep support. Returns -ENODEV on unsupported
	391	* devices, -EINVAL on problems during initiatization, and zero on
	392	* success.
	393	*/
	394	static int __init speedstep_init(void)
	395	{
	396	/* detect processor */
	397	speedstep_processor = speedstep_detect_processor();
	398	if (!speedstep_processor) {
bbfebd66 DJ	399	dprintk("Intel(R) SpeedStep(TM) capable processor "
bbfebd66 DJ	400	"not found\n");
1da177e4 LT	401	return -ENODEV;
	402	}
	403
	404	/* detect chipset */
	405	if (!speedstep_detect_chipset()) {
bbfebd66 DJ	406	dprintk("Intel(R) SpeedStep(TM) for this chipset not "
bbfebd66 DJ	407	"(yet) available.\n");
1da177e4 LT	408	return -ENODEV;
	409	}
	410
	411	/* activate speedstep support */
	412	if (speedstep_activate()) {
	413	pci_dev_put(speedstep_chipset_dev);
	414	return -EINVAL;
	415	}
	416
9a7d82a8 MD	417	if (speedstep_find_register())
	418	return -ENODEV;
	419
1da177e4 LT	420	return cpufreq_register_driver(&speedstep_driver);
	421	}
	422
	423
	424	/**
	425	* speedstep_exit - unregisters SpeedStep support
	426	*
	427	* Unregisters SpeedStep support.
	428	*/
	429	static void __exit speedstep_exit(void)
	430	{
	431	pci_dev_put(speedstep_chipset_dev);
	432	cpufreq_unregister_driver(&speedstep_driver);
	433	}
	434
	435
bbfebd66 DJ	436	MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
	437	"Dominik Brodowski <linux@brodo.de>");
	438	MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
	439	"with ICH-M southbridges.");
	440	MODULE_LICENSE("GPL");
1da177e4 LT	441
	442	module_init(speedstep_init);
	443	module_exit(speedstep_exit);