[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / cpu / microcode / core.c

/*
 * CPU Microcode Update Driver for Linux
 *
 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
 *	      2006	Shaohua Li <shaohua.li@intel.com>
 *	      2013-2016	Borislav Petkov <bp@alien8.de>
 *
 * X86 CPU microcode early update for Linux:
 *
 *	Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
 *			   H Peter Anvin" <hpa@zytor.com>
 *		  (C) 2015 Borislav Petkov <bp@alien8.de>
 *
 * This driver allows to upgrade microcode on x86 processors.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#define pr_fmt(fmt) "microcode: " fmt

#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/miscdevice.h>
#include <linux/capability.h>
#include <linux/firmware.h>
#include <linux/kernel.h>
#include <linux/mutex.h>
#include <linux/cpu.h>
#include <linux/fs.h>
#include <linux/mm.h>

#include <asm/microcode_intel.h>
#include <asm/cpu_device_id.h>
#include <asm/microcode_amd.h>
#include <asm/perf_event.h>
#include <asm/microcode.h>
#include <asm/processor.h>
#include <asm/cmdline.h>
#include <asm/setup.h>

#define DRIVER_VERSION	"2.2"

static struct microcode_ops	*microcode_ops;
static bool dis_ucode_ldr = true;

LIST_HEAD(microcode_cache);

/*
 * Synchronization.
 *
 * All non cpu-hotplug-callback call sites use:
 *
 * - microcode_mutex to synchronize with each other;
 * - get/put_online_cpus() to synchronize with
 *   the cpu-hotplug-callback call sites.
 *
 * We guarantee that only a single cpu is being
 * updated at any particular moment of time.
 */
static DEFINE_MUTEX(microcode_mutex);

struct ucode_cpu_info		ucode_cpu_info[NR_CPUS];

/*
 * Operations that are run on a target cpu:
 */

struct cpu_info_ctx {
	struct cpu_signature	*cpu_sig;
	int			err;
};

static bool __init check_loader_disabled_bsp(void)
{
	static const char *__dis_opt_str = "dis_ucode_ldr";
	u32 a, b, c, d;

#ifdef CONFIG_X86_32
	const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
	const char *option  = (const char *)__pa_nodebug(__dis_opt_str);
	bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);

#else /* CONFIG_X86_64 */
	const char *cmdline = boot_command_line;
	const char *option  = __dis_opt_str;
	bool *res = &dis_ucode_ldr;
#endif

	if (!have_cpuid_p())
		return *res;

	a = 1;
	c = 0;
	native_cpuid(&a, &b, &c, &d);

	/*
	 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
	 * completely accurate as xen pv guests don't see that CPUID bit set but
	 * that's good enough as they don't land on the BSP path anyway.
	 */
	if (c & BIT(31))
		return *res;

	if (cmdline_find_option_bool(cmdline, option) <= 0)
		*res = false;

	return *res;
}

extern struct builtin_fw __start_builtin_fw[];
extern struct builtin_fw __end_builtin_fw[];

bool get_builtin_firmware(struct cpio_data *cd, const char *name)
{
#ifdef CONFIG_FW_LOADER
	struct builtin_fw *b_fw;

	for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
		if (!strcmp(name, b_fw->name)) {
			cd->size = b_fw->size;
			cd->data = b_fw->data;
			return true;
		}
	}
#endif
	return false;
}

void __init load_ucode_bsp(void)
{
	int vendor;
	unsigned int family;

	if (check_loader_disabled_bsp())
		return;

	vendor = x86_cpuid_vendor();
	family = x86_cpuid_family();

	switch (vendor) {
	case X86_VENDOR_INTEL:
		if (family >= 6)
			load_ucode_intel_bsp();
		break;
	case X86_VENDOR_AMD:
		if (family >= 0x10)
			load_ucode_amd_bsp(family);
		break;
	default:
		break;
	}
}

static bool check_loader_disabled_ap(void)
{
#ifdef CONFIG_X86_32
	return *((bool *)__pa_nodebug(&dis_ucode_ldr));
#else
	return dis_ucode_ldr;
#endif
}

void load_ucode_ap(void)
{
	int vendor, family;

	if (check_loader_disabled_ap())
		return;

	vendor = x86_cpuid_vendor();
	family = x86_cpuid_family();

	switch (vendor) {
	case X86_VENDOR_INTEL:
		if (family >= 6)
			load_ucode_intel_ap();
		break;
	case X86_VENDOR_AMD:
		if (family >= 0x10)
			load_ucode_amd_ap(family);
		break;
	default:
		break;
	}
}

static int __init save_microcode_in_initrd(void)
{
	struct cpuinfo_x86 *c = &boot_cpu_data;

	switch (c->x86_vendor) {
	case X86_VENDOR_INTEL:
		if (c->x86 >= 6)
			return save_microcode_in_initrd_intel();
		break;
	case X86_VENDOR_AMD:
		if (c->x86 >= 0x10)
			return save_microcode_in_initrd_amd(c->x86);
		break;
	default:
		break;
	}

	return -EINVAL;
}

struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
{
#ifdef CONFIG_BLK_DEV_INITRD
	unsigned long start = 0;
	size_t size;

#ifdef CONFIG_X86_32
	struct boot_params *params;

	if (use_pa)
		params = (struct boot_params *)__pa_nodebug(&boot_params);
	else
		params = &boot_params;

	size = params->hdr.ramdisk_size;

	/*
	 * Set start only if we have an initrd image. We cannot use initrd_start
	 * because it is not set that early yet.
	 */
	if (size)
		start = params->hdr.ramdisk_image;

# else /* CONFIG_X86_64 */
	size  = (unsigned long)boot_params.ext_ramdisk_size << 32;
	size |= boot_params.hdr.ramdisk_size;

	if (size) {
		start  = (unsigned long)boot_params.ext_ramdisk_image << 32;
		start |= boot_params.hdr.ramdisk_image;

		start += PAGE_OFFSET;
	}
# endif

	/*
	 * Did we relocate the ramdisk?
	 *
	 * So we possibly relocate the ramdisk *after* applying microcode on the
	 * BSP so we rely on use_pa (use physical addresses) - even if it is not
	 * absolutely correct - to determine whether we've done the ramdisk
	 * relocation already.
	 */
	if (!use_pa && relocated_ramdisk)
		start = initrd_start;

	return find_cpio_data(path, (void *)start, size, NULL);
#else /* !CONFIG_BLK_DEV_INITRD */
	return (struct cpio_data){ NULL, 0, "" };
#endif
}

void reload_early_microcode(void)
{
	int vendor, family;

	vendor = x86_cpuid_vendor();
	family = x86_cpuid_family();

	switch (vendor) {
	case X86_VENDOR_INTEL:
		if (family >= 6)
			reload_ucode_intel();
		break;
	case X86_VENDOR_AMD:
		if (family >= 0x10)
			reload_ucode_amd();
		break;
	default:
		break;
	}
}

static void collect_cpu_info_local(void *arg)
{
	struct cpu_info_ctx *ctx = arg;

	ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
						   ctx->cpu_sig);
}

static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
{
	struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
	int ret;

	ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
	if (!ret)
		ret = ctx.err;

	return ret;
}

static int collect_cpu_info(int cpu)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
	int ret;

	memset(uci, 0, sizeof(*uci));

	ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
	if (!ret)
		uci->valid = 1;

	return ret;
}

struct apply_microcode_ctx {
	int err;
};

static void apply_microcode_local(void *arg)
{
	struct apply_microcode_ctx *ctx = arg;

	ctx->err = microcode_ops->apply_microcode(smp_processor_id());
}

static int apply_microcode_on_target(int cpu)
{
	struct apply_microcode_ctx ctx = { .err = 0 };
	int ret;

	ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
	if (!ret)
		ret = ctx.err;

	return ret;
}

#ifdef CONFIG_MICROCODE_OLD_INTERFACE
static int do_microcode_update(const void __user *buf, size_t size)
{
	int error = 0;
	int cpu;

	for_each_online_cpu(cpu) {
		struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
		enum ucode_state ustate;

		if (!uci->valid)
			continue;

		ustate = microcode_ops->request_microcode_user(cpu, buf, size);
		if (ustate == UCODE_ERROR) {
			error = -1;
			break;
		} else if (ustate == UCODE_OK)
			apply_microcode_on_target(cpu);
	}

	return error;
}

static int microcode_open(struct inode *inode, struct file *file)
{
	return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
}

static ssize_t microcode_write(struct file *file, const char __user *buf,
			       size_t len, loff_t *ppos)
{
	ssize_t ret = -EINVAL;

	if ((len >> PAGE_SHIFT) > totalram_pages) {
		pr_err("too much data (max %ld pages)\n", totalram_pages);
		return ret;
	}

	get_online_cpus();
	mutex_lock(&microcode_mutex);

	if (do_microcode_update(buf, len) == 0)
		ret = (ssize_t)len;

	if (ret > 0)
		perf_check_microcode();

	mutex_unlock(&microcode_mutex);
	put_online_cpus();

	return ret;
}

static const struct file_operations microcode_fops = {
	.owner			= THIS_MODULE,
	.write			= microcode_write,
	.open			= microcode_open,
	.llseek		= no_llseek,
};

static struct miscdevice microcode_dev = {
	.minor			= MICROCODE_MINOR,
	.name			= "microcode",
	.nodename		= "cpu/microcode",
	.fops			= &microcode_fops,
};

static int __init microcode_dev_init(void)
{
	int error;

	error = misc_register(&microcode_dev);
	if (error) {
		pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
		return error;
	}

	return 0;
}

static void __exit microcode_dev_exit(void)
{
	misc_deregister(&microcode_dev);
}
#else
#define microcode_dev_init()	0
#define microcode_dev_exit()	do { } while (0)
#endif

/* fake device for request_firmware */
static struct platform_device	*microcode_pdev;

static int reload_for_cpu(int cpu)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
	enum ucode_state ustate;
	int err = 0;

	if (!uci->valid)
		return err;

	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev, true);
	if (ustate == UCODE_OK)
		apply_microcode_on_target(cpu);
	else
		if (ustate == UCODE_ERROR)
			err = -EINVAL;
	return err;
}

static ssize_t reload_store(struct device *dev,
			    struct device_attribute *attr,
			    const char *buf, size_t size)
{
	unsigned long val;
	int cpu;
	ssize_t ret = 0, tmp_ret;

	ret = kstrtoul(buf, 0, &val);
	if (ret)
		return ret;

	if (val != 1)
		return size;

	get_online_cpus();
	mutex_lock(&microcode_mutex);
	for_each_online_cpu(cpu) {
		tmp_ret = reload_for_cpu(cpu);
		if (tmp_ret != 0)
			pr_warn("Error reloading microcode on CPU %d\n", cpu);

		/* save retval of the first encountered reload error */
		if (!ret)
			ret = tmp_ret;
	}
	if (!ret)
		perf_check_microcode();
	mutex_unlock(&microcode_mutex);
	put_online_cpus();

	if (!ret)
		ret = size;

	return ret;
}

static ssize_t version_show(struct device *dev,
			struct device_attribute *attr, char *buf)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;

	return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
}

static ssize_t pf_show(struct device *dev,
			struct device_attribute *attr, char *buf)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;

	return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
}

static DEVICE_ATTR(reload, 0200, NULL, reload_store);
static DEVICE_ATTR(version, 0400, version_show, NULL);
static DEVICE_ATTR(processor_flags, 0400, pf_show, NULL);

static struct attribute *mc_default_attrs[] = {
	&dev_attr_version.attr,
	&dev_attr_processor_flags.attr,
	NULL
};

static struct attribute_group mc_attr_group = {
	.attrs			= mc_default_attrs,
	.name			= "microcode",
};

static void microcode_fini_cpu(int cpu)
{
	if (microcode_ops->microcode_fini_cpu)
		microcode_ops->microcode_fini_cpu(cpu);
}

static enum ucode_state microcode_resume_cpu(int cpu)
{
	if (apply_microcode_on_target(cpu))
		return UCODE_ERROR;

	pr_debug("CPU%d updated upon resume\n", cpu);

	return UCODE_OK;
}

static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
{
	enum ucode_state ustate;
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;

	if (uci->valid)
		return UCODE_OK;

	if (collect_cpu_info(cpu))
		return UCODE_ERROR;

	/* --dimm. Trigger a delayed update? */
	if (system_state != SYSTEM_RUNNING)
		return UCODE_NFOUND;

	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev,
						     refresh_fw);

	if (ustate == UCODE_OK) {
		pr_debug("CPU%d updated upon init\n", cpu);
		apply_microcode_on_target(cpu);
	}

	return ustate;
}

static enum ucode_state microcode_update_cpu(int cpu)
{
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;

	/* Refresh CPU microcode revision after resume. */
	collect_cpu_info(cpu);

	if (uci->valid)
		return microcode_resume_cpu(cpu);

	return microcode_init_cpu(cpu, false);
}

static int mc_device_add(struct device *dev, struct subsys_interface *sif)
{
	int err, cpu = dev->id;

	if (!cpu_online(cpu))
		return 0;

	pr_debug("CPU%d added\n", cpu);

	err = sysfs_create_group(&dev->kobj, &mc_attr_group);
	if (err)
		return err;

	if (microcode_init_cpu(cpu, true) == UCODE_ERROR)
		return -EINVAL;

	return err;
}

static void mc_device_remove(struct device *dev, struct subsys_interface *sif)
{
	int cpu = dev->id;

	if (!cpu_online(cpu))
		return;

	pr_debug("CPU%d removed\n", cpu);
	microcode_fini_cpu(cpu);
	sysfs_remove_group(&dev->kobj, &mc_attr_group);
}

static struct subsys_interface mc_cpu_interface = {
	.name			= "microcode",
	.subsys			= &cpu_subsys,
	.add_dev		= mc_device_add,
	.remove_dev		= mc_device_remove,
};

/**
 * mc_bp_resume - Update boot CPU microcode during resume.
 */
static void mc_bp_resume(void)
{
	int cpu = smp_processor_id();
	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;

	if (uci->valid && uci->mc)
		microcode_ops->apply_microcode(cpu);
	else if (!uci->mc)
		reload_early_microcode();
}

static struct syscore_ops mc_syscore_ops = {
	.resume			= mc_bp_resume,
};

static int mc_cpu_online(unsigned int cpu)
{
	struct device *dev;

	dev = get_cpu_device(cpu);
	microcode_update_cpu(cpu);
	pr_debug("CPU%d added\n", cpu);

	if (sysfs_create_group(&dev->kobj, &mc_attr_group))
		pr_err("Failed to create group for CPU%d\n", cpu);
	return 0;
}

static int mc_cpu_down_prep(unsigned int cpu)
{
	struct device *dev;

	dev = get_cpu_device(cpu);
	/* Suspend is in progress, only remove the interface */
	sysfs_remove_group(&dev->kobj, &mc_attr_group);
	pr_debug("CPU%d removed\n", cpu);

	return 0;
}

static struct attribute *cpu_root_microcode_attrs[] = {
	&dev_attr_reload.attr,
	NULL
};

static struct attribute_group cpu_root_microcode_group = {
	.name  = "microcode",
	.attrs = cpu_root_microcode_attrs,
};

int __init microcode_init(void)
{
	struct cpuinfo_x86 *c = &boot_cpu_data;
	int error;

	if (dis_ucode_ldr)
		return -EINVAL;

	if (c->x86_vendor == X86_VENDOR_INTEL)
		microcode_ops = init_intel_microcode();
	else if (c->x86_vendor == X86_VENDOR_AMD)
		microcode_ops = init_amd_microcode();
	else
		pr_err("no support for this CPU vendor\n");

	if (!microcode_ops)
		return -ENODEV;

	microcode_pdev = platform_device_register_simple("microcode", -1,
							 NULL, 0);
	if (IS_ERR(microcode_pdev))
		return PTR_ERR(microcode_pdev);

	get_online_cpus();
	mutex_lock(&microcode_mutex);

	error = subsys_interface_register(&mc_cpu_interface);
	if (!error)
		perf_check_microcode();
	mutex_unlock(&microcode_mutex);
	put_online_cpus();

	if (error)
		goto out_pdev;

	error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
				   &cpu_root_microcode_group);

	if (error) {
		pr_err("Error creating microcode group!\n");
		goto out_driver;
	}

	error = microcode_dev_init();
	if (error)
		goto out_ucode_group;

	register_syscore_ops(&mc_syscore_ops);
	cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
				  mc_cpu_online, mc_cpu_down_prep);

	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);

	return 0;

 out_ucode_group:
	sysfs_remove_group(&cpu_subsys.dev_root->kobj,
			   &cpu_root_microcode_group);

 out_driver:
	get_online_cpus();
	mutex_lock(&microcode_mutex);

	subsys_interface_unregister(&mc_cpu_interface);

	mutex_unlock(&microcode_mutex);
	put_online_cpus();

 out_pdev:
	platform_device_unregister(microcode_pdev);
	return error;

}
fs_initcall(save_microcode_in_initrd);
late_initcall(microcode_init);
Commit	Line	Data
3e135d88	1	/*
6b44e72a	2	* CPU Microcode Update Driver for Linux
3e135d88	3	*
6b44e72a BP	4	* Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
6b44e72a BP	5	* 2006 Shaohua Li <shaohua.li@intel.com>
14cfbe55	6	* 2013-2016 Borislav Petkov <bp@alien8.de>
3e135d88	7	*
fe055896 BP	8	* X86 CPU microcode early update for Linux:
	9	*
	10	* Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
	11	* H Peter Anvin" <hpa@zytor.com>
	12	* (C) 2015 Borislav Petkov <bp@alien8.de>
	13	*
6b44e72a	14	* This driver allows to upgrade microcode on x86 processors.
3e135d88	15	*
6b44e72a BP	16	* This program is free software; you can redistribute it and/or
	17	* modify it under the terms of the GNU General Public License
	18	* as published by the Free Software Foundation; either version
	19	* 2 of the License, or (at your option) any later version.
3e135d88	20	*/
f58e1f53	21
6b26e1bf	22	#define pr_fmt(fmt) "microcode: " fmt
f58e1f53	23
4bae1967	24	#include <linux/platform_device.h>
fe055896	25	#include <linux/syscore_ops.h>
4bae1967	26	#include <linux/miscdevice.h>
871b72dd	27	#include <linux/capability.h>
fe055896	28	#include <linux/firmware.h>
4bae1967	29	#include <linux/kernel.h>
3e135d88 PO	30	#include <linux/mutex.h>
3e135d88 PO	31	#include <linux/cpu.h>
4bae1967 IM	32	#include <linux/fs.h>
4bae1967 IM	33	#include <linux/mm.h>
3e135d88	34
fe055896	35	#include <asm/microcode_intel.h>
78ff123b	36	#include <asm/cpu_device_id.h>
fe055896	37	#include <asm/microcode_amd.h>
c93dc84c	38	#include <asm/perf_event.h>
fe055896 BP	39	#include <asm/microcode.h>
	40	#include <asm/processor.h>
	41	#include <asm/cmdline.h>
06b8534c	42	#include <asm/setup.h>
3e135d88	43
14cfbe55	44	#define DRIVER_VERSION "2.2"
3e135d88	45
4bae1967	46	static struct microcode_ops *microcode_ops;
a15a7535	47	static bool dis_ucode_ldr = true;
6b26e1bf	48
058dc498 BP	49	LIST_HEAD(microcode_cache);
058dc498 BP	50
871b72dd DA	51	/*
	52	* Synchronization.
	53	*
	54	* All non cpu-hotplug-callback call sites use:
	55	*
	56	* - microcode_mutex to synchronize with each other;
	57	* - get/put_online_cpus() to synchronize with
	58	* the cpu-hotplug-callback call sites.
	59	*
	60	* We guarantee that only a single cpu is being
	61	* updated at any particular moment of time.
	62	*/
d45de409	63	static DEFINE_MUTEX(microcode_mutex);
3e135d88	64
4bae1967	65	struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
3e135d88	66
871b72dd DA	67	/*
	68	* Operations that are run on a target cpu:
	69	*/
	70
	71	struct cpu_info_ctx {
	72	struct cpu_signature *cpu_sig;
	73	int err;
	74	};
	75
fe055896 BP	76	static bool __init check_loader_disabled_bsp(void)
fe055896 BP	77	{
e8c8165e	78	static const char *__dis_opt_str = "dis_ucode_ldr";
a15a7535	79	u32 a, b, c, d;
e8c8165e	80
fe055896 BP	81	#ifdef CONFIG_X86_32
fe055896 BP	82	const char cmdline = (const char )__pa_nodebug(boot_command_line);
e8c8165e	83	const char option = (const char )__pa_nodebug(__dis_opt_str);
fe055896 BP	84	bool res = (bool )__pa_nodebug(&dis_ucode_ldr);
	85
	86	#else /* CONFIG_X86_64 */
	87	const char *cmdline = boot_command_line;
e8c8165e	88	const char *option = __dis_opt_str;
fe055896 BP	89	bool *res = &dis_ucode_ldr;
	90	#endif
	91
a15a7535 BP	92	if (!have_cpuid_p())
	93	return *res;
	94
	95	a = 1;
	96	c = 0;
	97	native_cpuid(&a, &b, &c, &d);
	98
	99	/*
	100	* CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
	101	* completely accurate as xen pv guests don't see that CPUID bit set but
	102	* that's good enough as they don't land on the BSP path anyway.
	103	*/
	104	if (c & BIT(31))
	105	return *res;
	106
	107	if (cmdline_find_option_bool(cmdline, option) <= 0)
	108	*res = false;
fe055896 BP	109
	110	return *res;
	111	}
	112
	113	extern struct builtin_fw __start_builtin_fw[];
	114	extern struct builtin_fw __end_builtin_fw[];
	115
	116	bool get_builtin_firmware(struct cpio_data cd, const char name)
	117	{
	118	#ifdef CONFIG_FW_LOADER
	119	struct builtin_fw *b_fw;
	120
	121	for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
	122	if (!strcmp(name, b_fw->name)) {
	123	cd->size = b_fw->size;
	124	cd->data = b_fw->data;
	125	return true;
	126	}
	127	}
	128	#endif
	129	return false;
	130	}
	131
	132	void __init load_ucode_bsp(void)
	133	{
	134	int vendor;
	135	unsigned int family;
	136
	137	if (check_loader_disabled_bsp())
	138	return;
	139
99f925ce BP	140	vendor = x86_cpuid_vendor();
99f925ce BP	141	family = x86_cpuid_family();
fe055896 BP	142
	143	switch (vendor) {
	144	case X86_VENDOR_INTEL:
	145	if (family >= 6)
	146	load_ucode_intel_bsp();
	147	break;
	148	case X86_VENDOR_AMD:
	149	if (family >= 0x10)
	150	load_ucode_amd_bsp(family);
	151	break;
	152	default:
	153	break;
	154	}
	155	}
	156
	157	static bool check_loader_disabled_ap(void)
	158	{
	159	#ifdef CONFIG_X86_32
	160	return ((bool )__pa_nodebug(&dis_ucode_ldr));
	161	#else
	162	return dis_ucode_ldr;
	163	#endif
	164	}
	165
	166	void load_ucode_ap(void)
	167	{
	168	int vendor, family;
	169
	170	if (check_loader_disabled_ap())
	171	return;
	172
99f925ce BP	173	vendor = x86_cpuid_vendor();
99f925ce BP	174	family = x86_cpuid_family();
fe055896 BP	175
	176	switch (vendor) {
	177	case X86_VENDOR_INTEL:
	178	if (family >= 6)
	179	load_ucode_intel_ap();
	180	break;
	181	case X86_VENDOR_AMD:
	182	if (family >= 0x10)
b3763a67	183	load_ucode_amd_ap(family);
fe055896 BP	184	break;
	185	default:
	186	break;
	187	}
	188	}
	189
4b703305	190	static int __init save_microcode_in_initrd(void)
fe055896 BP	191	{
	192	struct cpuinfo_x86 *c = &boot_cpu_data;
	193
	194	switch (c->x86_vendor) {
	195	case X86_VENDOR_INTEL:
	196	if (c->x86 >= 6)
fa6788b8	197	return save_microcode_in_initrd_intel();
fe055896 BP	198	break;
	199	case X86_VENDOR_AMD:
	200	if (c->x86 >= 0x10)
b3763a67	201	return save_microcode_in_initrd_amd(c->x86);
fe055896 BP	202	break;
	203	default:
	204	break;
	205	}
	206
fa6788b8	207	return -EINVAL;
fe055896 BP	208	}
fe055896 BP	209
06b8534c BP	210	struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
	211	{
	212	#ifdef CONFIG_BLK_DEV_INITRD
	213	unsigned long start = 0;
	214	size_t size;
	215
	216	#ifdef CONFIG_X86_32
	217	struct boot_params *params;
	218
	219	if (use_pa)
	220	params = (struct boot_params *)__pa_nodebug(&boot_params);
	221	else
	222	params = &boot_params;
	223
	224	size = params->hdr.ramdisk_size;
	225
	226	/*
	227	* Set start only if we have an initrd image. We cannot use initrd_start
	228	* because it is not set that early yet.
	229	*/
	230	if (size)
	231	start = params->hdr.ramdisk_image;
	232
	233	# else /* CONFIG_X86_64 */
	234	size = (unsigned long)boot_params.ext_ramdisk_size << 32;
	235	size \|= boot_params.hdr.ramdisk_size;
	236
	237	if (size) {
	238	start = (unsigned long)boot_params.ext_ramdisk_image << 32;
	239	start \|= boot_params.hdr.ramdisk_image;
	240
	241	start += PAGE_OFFSET;
	242	}
	243	# endif
	244
	245	/*
	246	* Did we relocate the ramdisk?
	247	*
	248	* So we possibly relocate the ramdisk after applying microcode on the
	249	* BSP so we rely on use_pa (use physical addresses) - even if it is not
	250	* absolutely correct - to determine whether we've done the ramdisk
	251	* relocation already.
	252	*/
	253	if (!use_pa && relocated_ramdisk)
	254	start = initrd_start;
	255
	256	return find_cpio_data(path, (void *)start, size, NULL);
	257	#else /* !CONFIG_BLK_DEV_INITRD */
	258	return (struct cpio_data){ NULL, 0, "" };
	259	#endif
	260	}
	261
fe055896 BP	262	void reload_early_microcode(void)
	263	{
	264	int vendor, family;
	265
99f925ce BP	266	vendor = x86_cpuid_vendor();
99f925ce BP	267	family = x86_cpuid_family();
fe055896 BP	268
	269	switch (vendor) {
	270	case X86_VENDOR_INTEL:
	271	if (family >= 6)
	272	reload_ucode_intel();
	273	break;
	274	case X86_VENDOR_AMD:
	275	if (family >= 0x10)
	276	reload_ucode_amd();
	277	break;
	278	default:
	279	break;
	280	}
	281	}
	282
871b72dd DA	283	static void collect_cpu_info_local(void *arg)
	284	{
	285	struct cpu_info_ctx *ctx = arg;
	286
	287	ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
	288	ctx->cpu_sig);
	289	}
	290
	291	static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
	292	{
	293	struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
	294	int ret;
	295
	296	ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
	297	if (!ret)
	298	ret = ctx.err;
	299
	300	return ret;
	301	}
	302
	303	static int collect_cpu_info(int cpu)
	304	{
	305	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
	306	int ret;
	307
	308	memset(uci, 0, sizeof(*uci));
	309
	310	ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
	311	if (!ret)
	312	uci->valid = 1;
	313
	314	return ret;
	315	}
	316
	317	struct apply_microcode_ctx {
	318	int err;
	319	};
	320
	321	static void apply_microcode_local(void *arg)
	322	{
	323	struct apply_microcode_ctx *ctx = arg;
	324
	325	ctx->err = microcode_ops->apply_microcode(smp_processor_id());
	326	}
	327
	328	static int apply_microcode_on_target(int cpu)
	329	{
	330	struct apply_microcode_ctx ctx = { .err = 0 };
	331	int ret;
	332
	333	ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
	334	if (!ret)
	335	ret = ctx.err;
	336
	337	return ret;
	338	}
	339
3e135d88	340	#ifdef CONFIG_MICROCODE_OLD_INTERFACE
a0a29b62	341	static int do_microcode_update(const void __user *buf, size_t size)
3e135d88	342	{
3e135d88	343	int error = 0;
3e135d88	344	int cpu;
6f66cbc6	345
a0a29b62 DA	346	for_each_online_cpu(cpu) {
a0a29b62 DA	347	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
871b72dd	348	enum ucode_state ustate;
a0a29b62 DA	349
	350	if (!uci->valid)
	351	continue;
6f66cbc6	352
871b72dd DA	353	ustate = microcode_ops->request_microcode_user(cpu, buf, size);
	354	if (ustate == UCODE_ERROR) {
	355	error = -1;
	356	break;
	357	} else if (ustate == UCODE_OK)
	358	apply_microcode_on_target(cpu);
3e135d88	359	}
871b72dd	360
3e135d88 PO	361	return error;
	362	}
	363
3f10940e	364	static int microcode_open(struct inode inode, struct file file)
3e135d88	365	{
3f10940e	366	return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
3e135d88 PO	367	}
3e135d88 PO	368
d33dcb9e PO	369	static ssize_t microcode_write(struct file file, const char __user buf,
d33dcb9e PO	370	size_t len, loff_t *ppos)
3e135d88	371	{
871b72dd	372	ssize_t ret = -EINVAL;
3e135d88	373
4481374c	374	if ((len >> PAGE_SHIFT) > totalram_pages) {
f58e1f53	375	pr_err("too much data (max %ld pages)\n", totalram_pages);
871b72dd	376	return ret;
3e135d88 PO	377	}
	378
	379	get_online_cpus();
	380	mutex_lock(&microcode_mutex);
	381
871b72dd	382	if (do_microcode_update(buf, len) == 0)
3e135d88 PO	383	ret = (ssize_t)len;
3e135d88 PO	384
e3e45c01 SE	385	if (ret > 0)
	386	perf_check_microcode();
	387
3e135d88 PO	388	mutex_unlock(&microcode_mutex);
	389	put_online_cpus();
	390
	391	return ret;
	392	}
	393
	394	static const struct file_operations microcode_fops = {
871b72dd DA	395	.owner = THIS_MODULE,
	396	.write = microcode_write,
	397	.open = microcode_open,
6038f373	398	.llseek = no_llseek,
3e135d88 PO	399	};
	400
	401	static struct miscdevice microcode_dev = {
871b72dd DA	402	.minor = MICROCODE_MINOR,
871b72dd DA	403	.name = "microcode",
e454cea2	404	.nodename = "cpu/microcode",
871b72dd	405	.fops = &microcode_fops,
3e135d88 PO	406	};
3e135d88 PO	407
d33dcb9e	408	static int __init microcode_dev_init(void)
3e135d88 PO	409	{
	410	int error;
	411
	412	error = misc_register(&microcode_dev);
	413	if (error) {
f58e1f53	414	pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
3e135d88 PO	415	return error;
	416	}
	417
	418	return 0;
	419	}
	420
bd399063	421	static void __exit microcode_dev_exit(void)
3e135d88 PO	422	{
	423	misc_deregister(&microcode_dev);
	424	}
3e135d88	425	#else
4bae1967 IM	426	#define microcode_dev_init() 0
4bae1967 IM	427	#define microcode_dev_exit() do { } while (0)
3e135d88 PO	428	#endif
	429
	430	/* fake device for request_firmware */
4bae1967	431	static struct platform_device *microcode_pdev;
3e135d88	432
871b72dd	433	static int reload_for_cpu(int cpu)
af5c820a	434	{
871b72dd	435	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
4dbf32c3	436	enum ucode_state ustate;
af5c820a RR	437	int err = 0;
af5c820a RR	438
4dbf32c3 BP	439	if (!uci->valid)
4dbf32c3 BP	440	return err;
871b72dd	441
48e30685	442	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev, true);
4dbf32c3 BP	443	if (ustate == UCODE_OK)
	444	apply_microcode_on_target(cpu);
	445	else
	446	if (ustate == UCODE_ERROR)
	447	err = -EINVAL;
af5c820a RR	448	return err;
	449	}
	450
8a25a2fd KS	451	static ssize_t reload_store(struct device *dev,
8a25a2fd KS	452	struct device_attribute *attr,
871b72dd	453	const char *buf, size_t size)
3e135d88	454	{
871b72dd	455	unsigned long val;
c9fc3f77 BP	456	int cpu;
	457	ssize_t ret = 0, tmp_ret;
	458
e826abd5 SK	459	ret = kstrtoul(buf, 0, &val);
	460	if (ret)
	461	return ret;
871b72dd	462
c9fc3f77 BP	463	if (val != 1)
	464	return size;
	465
	466	get_online_cpus();
c93dc84c	467	mutex_lock(&microcode_mutex);
c9fc3f77 BP	468	for_each_online_cpu(cpu) {
	469	tmp_ret = reload_for_cpu(cpu);
	470	if (tmp_ret != 0)
	471	pr_warn("Error reloading microcode on CPU %d\n", cpu);
	472
	473	/* save retval of the first encountered reload error */
	474	if (!ret)
	475	ret = tmp_ret;
3e135d88	476	}
c93dc84c PZ	477	if (!ret)
	478	perf_check_microcode();
	479	mutex_unlock(&microcode_mutex);
c9fc3f77	480	put_online_cpus();
871b72dd DA	481
	482	if (!ret)
	483	ret = size;
	484
	485	return ret;
3e135d88 PO	486	}
3e135d88 PO	487
8a25a2fd KS	488	static ssize_t version_show(struct device *dev,
8a25a2fd KS	489	struct device_attribute attr, char buf)
3e135d88 PO	490	{
	491	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
	492
d45de409	493	return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
3e135d88 PO	494	}
3e135d88 PO	495
8a25a2fd KS	496	static ssize_t pf_show(struct device *dev,
8a25a2fd KS	497	struct device_attribute attr, char buf)
3e135d88 PO	498	{
	499	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
	500
d45de409	501	return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
3e135d88 PO	502	}
3e135d88 PO	503
8a25a2fd KS	504	static DEVICE_ATTR(reload, 0200, NULL, reload_store);
	505	static DEVICE_ATTR(version, 0400, version_show, NULL);
	506	static DEVICE_ATTR(processor_flags, 0400, pf_show, NULL);
3e135d88 PO	507
3e135d88 PO	508	static struct attribute *mc_default_attrs[] = {
8a25a2fd KS	509	&dev_attr_version.attr,
8a25a2fd KS	510	&dev_attr_processor_flags.attr,
3e135d88 PO	511	NULL
	512	};
	513
	514	static struct attribute_group mc_attr_group = {
871b72dd DA	515	.attrs = mc_default_attrs,
871b72dd DA	516	.name = "microcode",
3e135d88 PO	517	};
3e135d88 PO	518
871b72dd	519	static void microcode_fini_cpu(int cpu)
d45de409	520	{
06b8534c BP	521	if (microcode_ops->microcode_fini_cpu)
06b8534c BP	522	microcode_ops->microcode_fini_cpu(cpu);
280a9ca5 DA	523	}
280a9ca5 DA	524
871b72dd	525	static enum ucode_state microcode_resume_cpu(int cpu)
d45de409	526	{
bb9d3e47 BP	527	if (apply_microcode_on_target(cpu))
bb9d3e47 BP	528	return UCODE_ERROR;
871b72dd	529
6b14b818 BP	530	pr_debug("CPU%d updated upon resume\n", cpu);
6b14b818 BP	531
871b72dd	532	return UCODE_OK;
d45de409 DA	533	}
d45de409 DA	534
48e30685	535	static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
d45de409	536	{
871b72dd	537	enum ucode_state ustate;
9cd4d78e FY	538	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
9cd4d78e FY	539
43858f57	540	if (uci->valid)
9cd4d78e	541	return UCODE_OK;
d45de409	542
871b72dd DA	543	if (collect_cpu_info(cpu))
871b72dd DA	544	return UCODE_ERROR;
d45de409	545
871b72dd DA	546	/* --dimm. Trigger a delayed update? */
	547	if (system_state != SYSTEM_RUNNING)
	548	return UCODE_NFOUND;
d45de409	549
48e30685 BP	550	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev,
48e30685 BP	551	refresh_fw);
d45de409	552
871b72dd	553	if (ustate == UCODE_OK) {
f58e1f53	554	pr_debug("CPU%d updated upon init\n", cpu);
871b72dd	555	apply_microcode_on_target(cpu);
d45de409 DA	556	}
d45de409 DA	557
871b72dd	558	return ustate;
d45de409 DA	559	}
d45de409 DA	560
871b72dd	561	static enum ucode_state microcode_update_cpu(int cpu)
d45de409	562	{
871b72dd	563	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
d45de409	564
7f709d0c BP	565	/* Refresh CPU microcode revision after resume. */
	566	collect_cpu_info(cpu);
	567
2f99f5c8	568	if (uci->valid)
bb9d3e47	569	return microcode_resume_cpu(cpu);
d45de409	570
48e30685	571	return microcode_init_cpu(cpu, false);
d45de409 DA	572	}
d45de409 DA	573
8a25a2fd	574	static int mc_device_add(struct device dev, struct subsys_interface sif)
3e135d88	575	{
8a25a2fd	576	int err, cpu = dev->id;
3e135d88 PO	577
	578	if (!cpu_online(cpu))
	579	return 0;
	580
f58e1f53	581	pr_debug("CPU%d added\n", cpu);
3e135d88	582
8a25a2fd	583	err = sysfs_create_group(&dev->kobj, &mc_attr_group);
3e135d88 PO	584	if (err)
	585	return err;
	586
48e30685	587	if (microcode_init_cpu(cpu, true) == UCODE_ERROR)
6c53cbfc	588	return -EINVAL;
af5c820a RR	589
af5c820a RR	590	return err;
3e135d88 PO	591	}
3e135d88 PO	592
71db87ba	593	static void mc_device_remove(struct device dev, struct subsys_interface sif)
3e135d88	594	{
8a25a2fd	595	int cpu = dev->id;
3e135d88 PO	596
3e135d88 PO	597	if (!cpu_online(cpu))
71db87ba	598	return;
3e135d88	599
f58e1f53	600	pr_debug("CPU%d removed\n", cpu);
d45de409	601	microcode_fini_cpu(cpu);
8a25a2fd	602	sysfs_remove_group(&dev->kobj, &mc_attr_group);
3e135d88 PO	603	}
3e135d88 PO	604
8a25a2fd KS	605	static struct subsys_interface mc_cpu_interface = {
	606	.name = "microcode",
	607	.subsys = &cpu_subsys,
	608	.add_dev = mc_device_add,
	609	.remove_dev = mc_device_remove,
f3c6ea1b RW	610	};
	611
	612	/**
	613	* mc_bp_resume - Update boot CPU microcode during resume.
	614	*/
	615	static void mc_bp_resume(void)
3e135d88	616	{
f3c6ea1b	617	int cpu = smp_processor_id();
871b72dd	618	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
3e135d88	619
871b72dd DA	620	if (uci->valid && uci->mc)
871b72dd DA	621	microcode_ops->apply_microcode(cpu);
fb86b973	622	else if (!uci->mc)
fbae4ba8	623	reload_early_microcode();
3e135d88 PO	624	}
3e135d88 PO	625
f3c6ea1b RW	626	static struct syscore_ops mc_syscore_ops = {
f3c6ea1b RW	627	.resume = mc_bp_resume,
3e135d88 PO	628	};
3e135d88 PO	629
29bd7fbc	630	static int mc_cpu_online(unsigned int cpu)
3e135d88	631	{
8a25a2fd	632	struct device *dev;
3e135d88	633
8a25a2fd	634	dev = get_cpu_device(cpu);
29bd7fbc SAS	635	microcode_update_cpu(cpu);
29bd7fbc SAS	636	pr_debug("CPU%d added\n", cpu);
09c3f0d8	637
29bd7fbc SAS	638	if (sysfs_create_group(&dev->kobj, &mc_attr_group))
	639	pr_err("Failed to create group for CPU%d\n", cpu);
	640	return 0;
	641	}
09c3f0d8	642
29bd7fbc SAS	643	static int mc_cpu_down_prep(unsigned int cpu)
	644	{
	645	struct device *dev;
70989449	646
29bd7fbc SAS	647	dev = get_cpu_device(cpu);
	648	/* Suspend is in progress, only remove the interface */
	649	sysfs_remove_group(&dev->kobj, &mc_attr_group);
	650	pr_debug("CPU%d removed\n", cpu);
06b8534c	651
29bd7fbc	652	return 0;
3e135d88 PO	653	}
3e135d88 PO	654
3d8986bc BP	655	static struct attribute *cpu_root_microcode_attrs[] = {
	656	&dev_attr_reload.attr,
	657	NULL
	658	};
	659
	660	static struct attribute_group cpu_root_microcode_group = {
	661	.name = "microcode",
	662	.attrs = cpu_root_microcode_attrs,
	663	};
	664
9a2bc335	665	int __init microcode_init(void)
3e135d88	666	{
9a2bc335	667	struct cpuinfo_x86 *c = &boot_cpu_data;
3e135d88 PO	668	int error;
3e135d88 PO	669
84aba677	670	if (dis_ucode_ldr)
da63865a	671	return -EINVAL;
65cef131	672
18dbc916 DA	673	if (c->x86_vendor == X86_VENDOR_INTEL)
18dbc916 DA	674	microcode_ops = init_intel_microcode();
82b07865	675	else if (c->x86_vendor == X86_VENDOR_AMD)
18dbc916	676	microcode_ops = init_amd_microcode();
283c1f25	677	else
f58e1f53	678	pr_err("no support for this CPU vendor\n");
283c1f25 AH	679
283c1f25 AH	680	if (!microcode_ops)
18dbc916	681	return -ENODEV;
3e135d88	682
3e135d88 PO	683	microcode_pdev = platform_device_register_simple("microcode", -1,
3e135d88 PO	684	NULL, 0);
bd399063	685	if (IS_ERR(microcode_pdev))
3e135d88	686	return PTR_ERR(microcode_pdev);
3e135d88 PO	687
3e135d88 PO	688	get_online_cpus();
871b72dd DA	689	mutex_lock(&microcode_mutex);
871b72dd DA	690
8a25a2fd	691	error = subsys_interface_register(&mc_cpu_interface);
c93dc84c PZ	692	if (!error)
c93dc84c PZ	693	perf_check_microcode();
871b72dd	694	mutex_unlock(&microcode_mutex);
3e135d88	695	put_online_cpus();
871b72dd	696
bd399063 SB	697	if (error)
bd399063 SB	698	goto out_pdev;
3e135d88	699
3d8986bc BP	700	error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
	701	&cpu_root_microcode_group);
	702
	703	if (error) {
	704	pr_err("Error creating microcode group!\n");
	705	goto out_driver;
	706	}
	707
871b72dd DA	708	error = microcode_dev_init();
871b72dd DA	709	if (error)
3d8986bc	710	goto out_ucode_group;
871b72dd	711
f3c6ea1b	712	register_syscore_ops(&mc_syscore_ops);
29bd7fbc SAS	713	cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
29bd7fbc SAS	714	mc_cpu_online, mc_cpu_down_prep);
8d86f390	715
14cfbe55	716	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
8d86f390	717
3e135d88	718	return 0;
bd399063	719
3d8986bc BP	720	out_ucode_group:
	721	sysfs_remove_group(&cpu_subsys.dev_root->kobj,
	722	&cpu_root_microcode_group);
	723
	724	out_driver:
bd399063 SB	725	get_online_cpus();
	726	mutex_lock(&microcode_mutex);
	727
ff4b8a57	728	subsys_interface_unregister(&mc_cpu_interface);
bd399063 SB	729
	730	mutex_unlock(&microcode_mutex);
	731	put_online_cpus();
	732
3d8986bc	733	out_pdev:
bd399063 SB	734	platform_device_unregister(microcode_pdev);
	735	return error;
	736
3e135d88	737	}
4b703305	738	fs_initcall(save_microcode_in_initrd);
2d5be37d	739	late_initcall(microcode_init);