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52ca9ced AS |
1 | /* |
2 | * Intel(R) Processor Trace PMU driver for perf | |
3 | * Copyright (c) 2013-2014, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * Intel PT is specified in the Intel Architecture Instruction Set Extensions | |
15 | * Programming Reference: | |
16 | * http://software.intel.com/en-us/intel-isa-extensions | |
17 | */ | |
18 | ||
19 | #undef DEBUG | |
20 | ||
21 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
22 | ||
23 | #include <linux/types.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/device.h> | |
26 | ||
27 | #include <asm/perf_event.h> | |
28 | #include <asm/insn.h> | |
29 | #include <asm/io.h> | |
30 | ||
31 | #include "perf_event.h" | |
32 | #include "intel_pt.h" | |
33 | ||
34 | static DEFINE_PER_CPU(struct pt, pt_ctx); | |
35 | ||
36 | static struct pt_pmu pt_pmu; | |
37 | ||
38 | enum cpuid_regs { | |
39 | CR_EAX = 0, | |
40 | CR_ECX, | |
41 | CR_EDX, | |
42 | CR_EBX | |
43 | }; | |
44 | ||
45 | /* | |
46 | * Capabilities of Intel PT hardware, such as number of address bits or | |
47 | * supported output schemes, are cached and exported to userspace as "caps" | |
48 | * attribute group of pt pmu device | |
49 | * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store | |
50 | * relevant bits together with intel_pt traces. | |
51 | * | |
52 | * These are necessary for both trace decoding (payloads_lip, contains address | |
53 | * width encoded in IP-related packets), and event configuration (bitmasks with | |
54 | * permitted values for certain bit fields). | |
55 | */ | |
56 | #define PT_CAP(_n, _l, _r, _m) \ | |
57 | [PT_CAP_ ## _n] = { .name = __stringify(_n), .leaf = _l, \ | |
58 | .reg = _r, .mask = _m } | |
59 | ||
60 | static struct pt_cap_desc { | |
61 | const char *name; | |
62 | u32 leaf; | |
63 | u8 reg; | |
64 | u32 mask; | |
65 | } pt_caps[] = { | |
66 | PT_CAP(max_subleaf, 0, CR_EAX, 0xffffffff), | |
67 | PT_CAP(cr3_filtering, 0, CR_EBX, BIT(0)), | |
68 | PT_CAP(topa_output, 0, CR_ECX, BIT(0)), | |
69 | PT_CAP(topa_multiple_entries, 0, CR_ECX, BIT(1)), | |
70 | PT_CAP(payloads_lip, 0, CR_ECX, BIT(31)), | |
71 | }; | |
72 | ||
73 | static u32 pt_cap_get(enum pt_capabilities cap) | |
74 | { | |
75 | struct pt_cap_desc *cd = &pt_caps[cap]; | |
76 | u32 c = pt_pmu.caps[cd->leaf * 4 + cd->reg]; | |
77 | unsigned int shift = __ffs(cd->mask); | |
78 | ||
79 | return (c & cd->mask) >> shift; | |
80 | } | |
81 | ||
82 | static ssize_t pt_cap_show(struct device *cdev, | |
83 | struct device_attribute *attr, | |
84 | char *buf) | |
85 | { | |
86 | struct dev_ext_attribute *ea = | |
87 | container_of(attr, struct dev_ext_attribute, attr); | |
88 | enum pt_capabilities cap = (long)ea->var; | |
89 | ||
90 | return snprintf(buf, PAGE_SIZE, "%x\n", pt_cap_get(cap)); | |
91 | } | |
92 | ||
93 | static struct attribute_group pt_cap_group = { | |
94 | .name = "caps", | |
95 | }; | |
96 | ||
97 | PMU_FORMAT_ATTR(tsc, "config:10" ); | |
98 | PMU_FORMAT_ATTR(noretcomp, "config:11" ); | |
99 | ||
100 | static struct attribute *pt_formats_attr[] = { | |
101 | &format_attr_tsc.attr, | |
102 | &format_attr_noretcomp.attr, | |
103 | NULL, | |
104 | }; | |
105 | ||
106 | static struct attribute_group pt_format_group = { | |
107 | .name = "format", | |
108 | .attrs = pt_formats_attr, | |
109 | }; | |
110 | ||
111 | static const struct attribute_group *pt_attr_groups[] = { | |
112 | &pt_cap_group, | |
113 | &pt_format_group, | |
114 | NULL, | |
115 | }; | |
116 | ||
117 | static int __init pt_pmu_hw_init(void) | |
118 | { | |
119 | struct dev_ext_attribute *de_attrs; | |
120 | struct attribute **attrs; | |
121 | size_t size; | |
066450be | 122 | int ret; |
52ca9ced AS |
123 | long i; |
124 | ||
066450be IM |
125 | attrs = NULL; |
126 | ret = -ENODEV; | |
127 | if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT)) | |
128 | goto fail; | |
129 | ||
130 | for (i = 0; i < PT_CPUID_LEAVES; i++) { | |
131 | cpuid_count(20, i, | |
132 | &pt_pmu.caps[CR_EAX + i*4], | |
133 | &pt_pmu.caps[CR_EBX + i*4], | |
134 | &pt_pmu.caps[CR_ECX + i*4], | |
135 | &pt_pmu.caps[CR_EDX + i*4]); | |
52ca9ced AS |
136 | } |
137 | ||
066450be IM |
138 | ret = -ENOMEM; |
139 | size = sizeof(struct attribute *) * (ARRAY_SIZE(pt_caps)+1); | |
52ca9ced AS |
140 | attrs = kzalloc(size, GFP_KERNEL); |
141 | if (!attrs) | |
066450be | 142 | goto fail; |
52ca9ced | 143 | |
066450be | 144 | size = sizeof(struct dev_ext_attribute) * (ARRAY_SIZE(pt_caps)+1); |
52ca9ced AS |
145 | de_attrs = kzalloc(size, GFP_KERNEL); |
146 | if (!de_attrs) | |
066450be | 147 | goto fail; |
52ca9ced AS |
148 | |
149 | for (i = 0; i < ARRAY_SIZE(pt_caps); i++) { | |
066450be | 150 | struct dev_ext_attribute *de_attr = de_attrs + i; |
52ca9ced | 151 | |
066450be IM |
152 | de_attr->attr.attr.name = pt_caps[i].name; |
153 | ||
b44a2b53 | 154 | sysfs_attr_init(&de_attr->attr.attr); |
066450be IM |
155 | |
156 | de_attr->attr.attr.mode = S_IRUGO; | |
157 | de_attr->attr.show = pt_cap_show; | |
158 | de_attr->var = (void *)i; | |
159 | ||
160 | attrs[i] = &de_attr->attr.attr; | |
52ca9ced AS |
161 | } |
162 | ||
163 | pt_cap_group.attrs = attrs; | |
066450be | 164 | |
52ca9ced AS |
165 | return 0; |
166 | ||
066450be | 167 | fail: |
52ca9ced AS |
168 | kfree(attrs); |
169 | ||
066450be | 170 | return ret; |
52ca9ced AS |
171 | } |
172 | ||
173 | #define PT_CONFIG_MASK (RTIT_CTL_TSC_EN | RTIT_CTL_DISRETC) | |
174 | ||
175 | static bool pt_event_valid(struct perf_event *event) | |
176 | { | |
177 | u64 config = event->attr.config; | |
178 | ||
179 | if ((config & PT_CONFIG_MASK) != config) | |
180 | return false; | |
181 | ||
182 | return true; | |
183 | } | |
184 | ||
185 | /* | |
186 | * PT configuration helpers | |
187 | * These all are cpu affine and operate on a local PT | |
188 | */ | |
189 | ||
52ca9ced AS |
190 | static void pt_config(struct perf_event *event) |
191 | { | |
192 | u64 reg; | |
193 | ||
9a6694cf AS |
194 | if (!event->hw.itrace_started) { |
195 | event->hw.itrace_started = 1; | |
196 | wrmsrl(MSR_IA32_RTIT_STATUS, 0); | |
197 | } | |
198 | ||
52ca9ced AS |
199 | reg = RTIT_CTL_TOPA | RTIT_CTL_BRANCH_EN | RTIT_CTL_TRACEEN; |
200 | ||
201 | if (!event->attr.exclude_kernel) | |
202 | reg |= RTIT_CTL_OS; | |
203 | if (!event->attr.exclude_user) | |
204 | reg |= RTIT_CTL_USR; | |
205 | ||
206 | reg |= (event->attr.config & PT_CONFIG_MASK); | |
207 | ||
208 | wrmsrl(MSR_IA32_RTIT_CTL, reg); | |
209 | } | |
210 | ||
211 | static void pt_config_start(bool start) | |
212 | { | |
213 | u64 ctl; | |
214 | ||
215 | rdmsrl(MSR_IA32_RTIT_CTL, ctl); | |
216 | if (start) | |
217 | ctl |= RTIT_CTL_TRACEEN; | |
218 | else | |
219 | ctl &= ~RTIT_CTL_TRACEEN; | |
220 | wrmsrl(MSR_IA32_RTIT_CTL, ctl); | |
221 | ||
222 | /* | |
223 | * A wrmsr that disables trace generation serializes other PT | |
224 | * registers and causes all data packets to be written to memory, | |
225 | * but a fence is required for the data to become globally visible. | |
226 | * | |
227 | * The below WMB, separating data store and aux_head store matches | |
228 | * the consumer's RMB that separates aux_head load and data load. | |
229 | */ | |
230 | if (!start) | |
231 | wmb(); | |
232 | } | |
233 | ||
234 | static void pt_config_buffer(void *buf, unsigned int topa_idx, | |
235 | unsigned int output_off) | |
236 | { | |
237 | u64 reg; | |
238 | ||
239 | wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, virt_to_phys(buf)); | |
240 | ||
241 | reg = 0x7f | ((u64)topa_idx << 7) | ((u64)output_off << 32); | |
242 | ||
243 | wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg); | |
244 | } | |
245 | ||
246 | /* | |
247 | * Keep ToPA table-related metadata on the same page as the actual table, | |
248 | * taking up a few words from the top | |
249 | */ | |
250 | ||
251 | #define TENTS_PER_PAGE (((PAGE_SIZE - 40) / sizeof(struct topa_entry)) - 1) | |
252 | ||
253 | /** | |
254 | * struct topa - page-sized ToPA table with metadata at the top | |
255 | * @table: actual ToPA table entries, as understood by PT hardware | |
256 | * @list: linkage to struct pt_buffer's list of tables | |
257 | * @phys: physical address of this page | |
258 | * @offset: offset of the first entry in this table in the buffer | |
259 | * @size: total size of all entries in this table | |
260 | * @last: index of the last initialized entry in this table | |
261 | */ | |
262 | struct topa { | |
263 | struct topa_entry table[TENTS_PER_PAGE]; | |
264 | struct list_head list; | |
265 | u64 phys; | |
266 | u64 offset; | |
267 | size_t size; | |
268 | int last; | |
269 | }; | |
270 | ||
271 | /* make -1 stand for the last table entry */ | |
272 | #define TOPA_ENTRY(t, i) ((i) == -1 ? &(t)->table[(t)->last] : &(t)->table[(i)]) | |
273 | ||
274 | /** | |
275 | * topa_alloc() - allocate page-sized ToPA table | |
276 | * @cpu: CPU on which to allocate. | |
277 | * @gfp: Allocation flags. | |
278 | * | |
279 | * Return: On success, return the pointer to ToPA table page. | |
280 | */ | |
281 | static struct topa *topa_alloc(int cpu, gfp_t gfp) | |
282 | { | |
283 | int node = cpu_to_node(cpu); | |
284 | struct topa *topa; | |
285 | struct page *p; | |
286 | ||
287 | p = alloc_pages_node(node, gfp | __GFP_ZERO, 0); | |
288 | if (!p) | |
289 | return NULL; | |
290 | ||
291 | topa = page_address(p); | |
292 | topa->last = 0; | |
293 | topa->phys = page_to_phys(p); | |
294 | ||
295 | /* | |
296 | * In case of singe-entry ToPA, always put the self-referencing END | |
297 | * link as the 2nd entry in the table | |
298 | */ | |
299 | if (!pt_cap_get(PT_CAP_topa_multiple_entries)) { | |
300 | TOPA_ENTRY(topa, 1)->base = topa->phys >> TOPA_SHIFT; | |
301 | TOPA_ENTRY(topa, 1)->end = 1; | |
302 | } | |
303 | ||
304 | return topa; | |
305 | } | |
306 | ||
307 | /** | |
308 | * topa_free() - free a page-sized ToPA table | |
309 | * @topa: Table to deallocate. | |
310 | */ | |
311 | static void topa_free(struct topa *topa) | |
312 | { | |
313 | free_page((unsigned long)topa); | |
314 | } | |
315 | ||
316 | /** | |
317 | * topa_insert_table() - insert a ToPA table into a buffer | |
318 | * @buf: PT buffer that's being extended. | |
319 | * @topa: New topa table to be inserted. | |
320 | * | |
321 | * If it's the first table in this buffer, set up buffer's pointers | |
322 | * accordingly; otherwise, add a END=1 link entry to @topa to the current | |
323 | * "last" table and adjust the last table pointer to @topa. | |
324 | */ | |
325 | static void topa_insert_table(struct pt_buffer *buf, struct topa *topa) | |
326 | { | |
327 | struct topa *last = buf->last; | |
328 | ||
329 | list_add_tail(&topa->list, &buf->tables); | |
330 | ||
331 | if (!buf->first) { | |
332 | buf->first = buf->last = buf->cur = topa; | |
333 | return; | |
334 | } | |
335 | ||
336 | topa->offset = last->offset + last->size; | |
337 | buf->last = topa; | |
338 | ||
339 | if (!pt_cap_get(PT_CAP_topa_multiple_entries)) | |
340 | return; | |
341 | ||
342 | BUG_ON(last->last != TENTS_PER_PAGE - 1); | |
343 | ||
344 | TOPA_ENTRY(last, -1)->base = topa->phys >> TOPA_SHIFT; | |
345 | TOPA_ENTRY(last, -1)->end = 1; | |
346 | } | |
347 | ||
348 | /** | |
349 | * topa_table_full() - check if a ToPA table is filled up | |
350 | * @topa: ToPA table. | |
351 | */ | |
352 | static bool topa_table_full(struct topa *topa) | |
353 | { | |
354 | /* single-entry ToPA is a special case */ | |
355 | if (!pt_cap_get(PT_CAP_topa_multiple_entries)) | |
356 | return !!topa->last; | |
357 | ||
358 | return topa->last == TENTS_PER_PAGE - 1; | |
359 | } | |
360 | ||
361 | /** | |
362 | * topa_insert_pages() - create a list of ToPA tables | |
363 | * @buf: PT buffer being initialized. | |
364 | * @gfp: Allocation flags. | |
365 | * | |
366 | * This initializes a list of ToPA tables with entries from | |
367 | * the data_pages provided by rb_alloc_aux(). | |
368 | * | |
369 | * Return: 0 on success or error code. | |
370 | */ | |
371 | static int topa_insert_pages(struct pt_buffer *buf, gfp_t gfp) | |
372 | { | |
373 | struct topa *topa = buf->last; | |
374 | int order = 0; | |
375 | struct page *p; | |
376 | ||
377 | p = virt_to_page(buf->data_pages[buf->nr_pages]); | |
378 | if (PagePrivate(p)) | |
379 | order = page_private(p); | |
380 | ||
381 | if (topa_table_full(topa)) { | |
382 | topa = topa_alloc(buf->cpu, gfp); | |
383 | if (!topa) | |
384 | return -ENOMEM; | |
385 | ||
386 | topa_insert_table(buf, topa); | |
387 | } | |
388 | ||
389 | TOPA_ENTRY(topa, -1)->base = page_to_phys(p) >> TOPA_SHIFT; | |
390 | TOPA_ENTRY(topa, -1)->size = order; | |
391 | if (!buf->snapshot && !pt_cap_get(PT_CAP_topa_multiple_entries)) { | |
392 | TOPA_ENTRY(topa, -1)->intr = 1; | |
393 | TOPA_ENTRY(topa, -1)->stop = 1; | |
394 | } | |
395 | ||
396 | topa->last++; | |
397 | topa->size += sizes(order); | |
398 | ||
399 | buf->nr_pages += 1ul << order; | |
400 | ||
401 | return 0; | |
402 | } | |
403 | ||
404 | /** | |
405 | * pt_topa_dump() - print ToPA tables and their entries | |
406 | * @buf: PT buffer. | |
407 | */ | |
408 | static void pt_topa_dump(struct pt_buffer *buf) | |
409 | { | |
410 | struct topa *topa; | |
411 | ||
412 | list_for_each_entry(topa, &buf->tables, list) { | |
413 | int i; | |
414 | ||
2e54a5bd IM |
415 | pr_debug("# table @%p (%016Lx), off %llx size %zx\n", topa->table, |
416 | topa->phys, topa->offset, topa->size); | |
52ca9ced AS |
417 | for (i = 0; i < TENTS_PER_PAGE; i++) { |
418 | pr_debug("# entry @%p (%lx sz %u %c%c%c) raw=%16llx\n", | |
419 | &topa->table[i], | |
420 | (unsigned long)topa->table[i].base << TOPA_SHIFT, | |
421 | sizes(topa->table[i].size), | |
422 | topa->table[i].end ? 'E' : ' ', | |
423 | topa->table[i].intr ? 'I' : ' ', | |
424 | topa->table[i].stop ? 'S' : ' ', | |
425 | *(u64 *)&topa->table[i]); | |
426 | if ((pt_cap_get(PT_CAP_topa_multiple_entries) && | |
427 | topa->table[i].stop) || | |
428 | topa->table[i].end) | |
429 | break; | |
430 | } | |
431 | } | |
432 | } | |
433 | ||
434 | /** | |
435 | * pt_buffer_advance() - advance to the next output region | |
436 | * @buf: PT buffer. | |
437 | * | |
438 | * Advance the current pointers in the buffer to the next ToPA entry. | |
439 | */ | |
440 | static void pt_buffer_advance(struct pt_buffer *buf) | |
441 | { | |
442 | buf->output_off = 0; | |
443 | buf->cur_idx++; | |
444 | ||
445 | if (buf->cur_idx == buf->cur->last) { | |
446 | if (buf->cur == buf->last) | |
447 | buf->cur = buf->first; | |
448 | else | |
449 | buf->cur = list_entry(buf->cur->list.next, struct topa, | |
450 | list); | |
451 | buf->cur_idx = 0; | |
452 | } | |
453 | } | |
454 | ||
455 | /** | |
456 | * pt_update_head() - calculate current offsets and sizes | |
457 | * @pt: Per-cpu pt context. | |
458 | * | |
459 | * Update buffer's current write pointer position and data size. | |
460 | */ | |
461 | static void pt_update_head(struct pt *pt) | |
462 | { | |
463 | struct pt_buffer *buf = perf_get_aux(&pt->handle); | |
464 | u64 topa_idx, base, old; | |
465 | ||
466 | /* offset of the first region in this table from the beginning of buf */ | |
467 | base = buf->cur->offset + buf->output_off; | |
468 | ||
469 | /* offset of the current output region within this table */ | |
470 | for (topa_idx = 0; topa_idx < buf->cur_idx; topa_idx++) | |
471 | base += sizes(buf->cur->table[topa_idx].size); | |
472 | ||
473 | if (buf->snapshot) { | |
474 | local_set(&buf->data_size, base); | |
475 | } else { | |
476 | old = (local64_xchg(&buf->head, base) & | |
477 | ((buf->nr_pages << PAGE_SHIFT) - 1)); | |
478 | if (base < old) | |
479 | base += buf->nr_pages << PAGE_SHIFT; | |
480 | ||
481 | local_add(base - old, &buf->data_size); | |
482 | } | |
483 | } | |
484 | ||
485 | /** | |
486 | * pt_buffer_region() - obtain current output region's address | |
487 | * @buf: PT buffer. | |
488 | */ | |
489 | static void *pt_buffer_region(struct pt_buffer *buf) | |
490 | { | |
491 | return phys_to_virt(buf->cur->table[buf->cur_idx].base << TOPA_SHIFT); | |
492 | } | |
493 | ||
494 | /** | |
495 | * pt_buffer_region_size() - obtain current output region's size | |
496 | * @buf: PT buffer. | |
497 | */ | |
498 | static size_t pt_buffer_region_size(struct pt_buffer *buf) | |
499 | { | |
500 | return sizes(buf->cur->table[buf->cur_idx].size); | |
501 | } | |
502 | ||
503 | /** | |
504 | * pt_handle_status() - take care of possible status conditions | |
505 | * @pt: Per-cpu pt context. | |
506 | */ | |
507 | static void pt_handle_status(struct pt *pt) | |
508 | { | |
509 | struct pt_buffer *buf = perf_get_aux(&pt->handle); | |
510 | int advance = 0; | |
511 | u64 status; | |
512 | ||
513 | rdmsrl(MSR_IA32_RTIT_STATUS, status); | |
514 | ||
515 | if (status & RTIT_STATUS_ERROR) { | |
516 | pr_err_ratelimited("ToPA ERROR encountered, trying to recover\n"); | |
517 | pt_topa_dump(buf); | |
518 | status &= ~RTIT_STATUS_ERROR; | |
519 | } | |
520 | ||
521 | if (status & RTIT_STATUS_STOPPED) { | |
522 | status &= ~RTIT_STATUS_STOPPED; | |
523 | ||
524 | /* | |
525 | * On systems that only do single-entry ToPA, hitting STOP | |
526 | * means we are already losing data; need to let the decoder | |
527 | * know. | |
528 | */ | |
529 | if (!pt_cap_get(PT_CAP_topa_multiple_entries) || | |
530 | buf->output_off == sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) { | |
531 | local_inc(&buf->lost); | |
532 | advance++; | |
533 | } | |
534 | } | |
535 | ||
536 | /* | |
537 | * Also on single-entry ToPA implementations, interrupt will come | |
538 | * before the output reaches its output region's boundary. | |
539 | */ | |
540 | if (!pt_cap_get(PT_CAP_topa_multiple_entries) && !buf->snapshot && | |
541 | pt_buffer_region_size(buf) - buf->output_off <= TOPA_PMI_MARGIN) { | |
542 | void *head = pt_buffer_region(buf); | |
543 | ||
544 | /* everything within this margin needs to be zeroed out */ | |
545 | memset(head + buf->output_off, 0, | |
546 | pt_buffer_region_size(buf) - | |
547 | buf->output_off); | |
548 | advance++; | |
549 | } | |
550 | ||
551 | if (advance) | |
552 | pt_buffer_advance(buf); | |
553 | ||
554 | wrmsrl(MSR_IA32_RTIT_STATUS, status); | |
555 | } | |
556 | ||
557 | /** | |
558 | * pt_read_offset() - translate registers into buffer pointers | |
559 | * @buf: PT buffer. | |
560 | * | |
561 | * Set buffer's output pointers from MSR values. | |
562 | */ | |
563 | static void pt_read_offset(struct pt_buffer *buf) | |
564 | { | |
565 | u64 offset, base_topa; | |
566 | ||
567 | rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, base_topa); | |
568 | buf->cur = phys_to_virt(base_topa); | |
569 | ||
570 | rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, offset); | |
571 | /* offset within current output region */ | |
572 | buf->output_off = offset >> 32; | |
573 | /* index of current output region within this table */ | |
574 | buf->cur_idx = (offset & 0xffffff80) >> 7; | |
575 | } | |
576 | ||
577 | /** | |
578 | * pt_topa_next_entry() - obtain index of the first page in the next ToPA entry | |
579 | * @buf: PT buffer. | |
580 | * @pg: Page offset in the buffer. | |
581 | * | |
582 | * When advancing to the next output region (ToPA entry), given a page offset | |
583 | * into the buffer, we need to find the offset of the first page in the next | |
584 | * region. | |
585 | */ | |
586 | static unsigned int pt_topa_next_entry(struct pt_buffer *buf, unsigned int pg) | |
587 | { | |
588 | struct topa_entry *te = buf->topa_index[pg]; | |
589 | ||
590 | /* one region */ | |
591 | if (buf->first == buf->last && buf->first->last == 1) | |
592 | return pg; | |
593 | ||
594 | do { | |
595 | pg++; | |
596 | pg &= buf->nr_pages - 1; | |
597 | } while (buf->topa_index[pg] == te); | |
598 | ||
599 | return pg; | |
600 | } | |
601 | ||
602 | /** | |
603 | * pt_buffer_reset_markers() - place interrupt and stop bits in the buffer | |
604 | * @buf: PT buffer. | |
605 | * @handle: Current output handle. | |
606 | * | |
607 | * Place INT and STOP marks to prevent overwriting old data that the consumer | |
cf302bfd AS |
608 | * hasn't yet collected and waking up the consumer after a certain fraction of |
609 | * the buffer has filled up. Only needed and sensible for non-snapshot counters. | |
610 | * | |
611 | * This obviously relies on buf::head to figure out buffer markers, so it has | |
612 | * to be called after pt_buffer_reset_offsets() and before the hardware tracing | |
613 | * is enabled. | |
52ca9ced AS |
614 | */ |
615 | static int pt_buffer_reset_markers(struct pt_buffer *buf, | |
616 | struct perf_output_handle *handle) | |
617 | ||
618 | { | |
f73ec48c AS |
619 | unsigned long head = local64_read(&buf->head); |
620 | unsigned long idx, npages, wakeup; | |
52ca9ced | 621 | |
52ca9ced AS |
622 | /* can't stop in the middle of an output region */ |
623 | if (buf->output_off + handle->size + 1 < | |
624 | sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) | |
625 | return -EINVAL; | |
626 | ||
627 | ||
628 | /* single entry ToPA is handled by marking all regions STOP=1 INT=1 */ | |
629 | if (!pt_cap_get(PT_CAP_topa_multiple_entries)) | |
630 | return 0; | |
631 | ||
632 | /* clear STOP and INT from current entry */ | |
633 | buf->topa_index[buf->stop_pos]->stop = 0; | |
634 | buf->topa_index[buf->intr_pos]->intr = 0; | |
635 | ||
f73ec48c AS |
636 | /* how many pages till the STOP marker */ |
637 | npages = handle->size >> PAGE_SHIFT; | |
638 | ||
639 | /* if it's on a page boundary, fill up one more page */ | |
640 | if (!offset_in_page(head + handle->size + 1)) | |
641 | npages++; | |
642 | ||
643 | idx = (head >> PAGE_SHIFT) + npages; | |
644 | idx &= buf->nr_pages - 1; | |
645 | buf->stop_pos = idx; | |
646 | ||
647 | wakeup = handle->wakeup >> PAGE_SHIFT; | |
648 | ||
649 | /* in the worst case, wake up the consumer one page before hard stop */ | |
650 | idx = (head >> PAGE_SHIFT) + npages - 1; | |
651 | if (idx > wakeup) | |
652 | idx = wakeup; | |
653 | ||
654 | idx &= buf->nr_pages - 1; | |
655 | buf->intr_pos = idx; | |
52ca9ced AS |
656 | |
657 | buf->topa_index[buf->stop_pos]->stop = 1; | |
658 | buf->topa_index[buf->intr_pos]->intr = 1; | |
659 | ||
660 | return 0; | |
661 | } | |
662 | ||
663 | /** | |
664 | * pt_buffer_setup_topa_index() - build topa_index[] table of regions | |
665 | * @buf: PT buffer. | |
666 | * | |
667 | * topa_index[] references output regions indexed by offset into the | |
668 | * buffer for purposes of quick reverse lookup. | |
669 | */ | |
670 | static void pt_buffer_setup_topa_index(struct pt_buffer *buf) | |
671 | { | |
672 | struct topa *cur = buf->first, *prev = buf->last; | |
673 | struct topa_entry *te_cur = TOPA_ENTRY(cur, 0), | |
674 | *te_prev = TOPA_ENTRY(prev, prev->last - 1); | |
74387bcb | 675 | int pg = 0, idx = 0; |
52ca9ced AS |
676 | |
677 | while (pg < buf->nr_pages) { | |
678 | int tidx; | |
679 | ||
680 | /* pages within one topa entry */ | |
681 | for (tidx = 0; tidx < 1 << te_cur->size; tidx++, pg++) | |
682 | buf->topa_index[pg] = te_prev; | |
683 | ||
684 | te_prev = te_cur; | |
685 | ||
686 | if (idx == cur->last - 1) { | |
687 | /* advance to next topa table */ | |
688 | idx = 0; | |
689 | cur = list_entry(cur->list.next, struct topa, list); | |
74387bcb | 690 | } else { |
52ca9ced | 691 | idx++; |
74387bcb | 692 | } |
52ca9ced AS |
693 | te_cur = TOPA_ENTRY(cur, idx); |
694 | } | |
695 | ||
696 | } | |
697 | ||
698 | /** | |
699 | * pt_buffer_reset_offsets() - adjust buffer's write pointers from aux_head | |
700 | * @buf: PT buffer. | |
701 | * @head: Write pointer (aux_head) from AUX buffer. | |
702 | * | |
703 | * Find the ToPA table and entry corresponding to given @head and set buffer's | |
5b1dbd17 AS |
704 | * "current" pointers accordingly. This is done after we have obtained the |
705 | * current aux_head position from a successful call to perf_aux_output_begin() | |
706 | * to make sure the hardware is writing to the right place. | |
707 | * | |
708 | * This function modifies buf::{cur,cur_idx,output_off} that will be programmed | |
709 | * into PT msrs when the tracing is enabled and buf::head and buf::data_size, | |
710 | * which are used to determine INT and STOP markers' locations by a subsequent | |
711 | * call to pt_buffer_reset_markers(). | |
52ca9ced AS |
712 | */ |
713 | static void pt_buffer_reset_offsets(struct pt_buffer *buf, unsigned long head) | |
714 | { | |
715 | int pg; | |
716 | ||
717 | if (buf->snapshot) | |
718 | head &= (buf->nr_pages << PAGE_SHIFT) - 1; | |
719 | ||
720 | pg = (head >> PAGE_SHIFT) & (buf->nr_pages - 1); | |
721 | pg = pt_topa_next_entry(buf, pg); | |
722 | ||
723 | buf->cur = (struct topa *)((unsigned long)buf->topa_index[pg] & PAGE_MASK); | |
724 | buf->cur_idx = ((unsigned long)buf->topa_index[pg] - | |
725 | (unsigned long)buf->cur) / sizeof(struct topa_entry); | |
726 | buf->output_off = head & (sizes(buf->cur->table[buf->cur_idx].size) - 1); | |
727 | ||
728 | local64_set(&buf->head, head); | |
729 | local_set(&buf->data_size, 0); | |
730 | } | |
731 | ||
732 | /** | |
733 | * pt_buffer_fini_topa() - deallocate ToPA structure of a buffer | |
734 | * @buf: PT buffer. | |
735 | */ | |
736 | static void pt_buffer_fini_topa(struct pt_buffer *buf) | |
737 | { | |
738 | struct topa *topa, *iter; | |
739 | ||
740 | list_for_each_entry_safe(topa, iter, &buf->tables, list) { | |
741 | /* | |
742 | * right now, this is in free_aux() path only, so | |
743 | * no need to unlink this table from the list | |
744 | */ | |
745 | topa_free(topa); | |
746 | } | |
747 | } | |
748 | ||
749 | /** | |
750 | * pt_buffer_init_topa() - initialize ToPA table for pt buffer | |
751 | * @buf: PT buffer. | |
752 | * @size: Total size of all regions within this ToPA. | |
753 | * @gfp: Allocation flags. | |
754 | */ | |
755 | static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages, | |
756 | gfp_t gfp) | |
757 | { | |
758 | struct topa *topa; | |
759 | int err; | |
760 | ||
761 | topa = topa_alloc(buf->cpu, gfp); | |
762 | if (!topa) | |
763 | return -ENOMEM; | |
764 | ||
765 | topa_insert_table(buf, topa); | |
766 | ||
767 | while (buf->nr_pages < nr_pages) { | |
768 | err = topa_insert_pages(buf, gfp); | |
769 | if (err) { | |
770 | pt_buffer_fini_topa(buf); | |
771 | return -ENOMEM; | |
772 | } | |
773 | } | |
774 | ||
775 | pt_buffer_setup_topa_index(buf); | |
776 | ||
777 | /* link last table to the first one, unless we're double buffering */ | |
778 | if (pt_cap_get(PT_CAP_topa_multiple_entries)) { | |
779 | TOPA_ENTRY(buf->last, -1)->base = buf->first->phys >> TOPA_SHIFT; | |
780 | TOPA_ENTRY(buf->last, -1)->end = 1; | |
781 | } | |
782 | ||
783 | pt_topa_dump(buf); | |
784 | return 0; | |
785 | } | |
786 | ||
787 | /** | |
788 | * pt_buffer_setup_aux() - set up topa tables for a PT buffer | |
789 | * @cpu: Cpu on which to allocate, -1 means current. | |
790 | * @pages: Array of pointers to buffer pages passed from perf core. | |
791 | * @nr_pages: Number of pages in the buffer. | |
792 | * @snapshot: If this is a snapshot/overwrite counter. | |
793 | * | |
794 | * This is a pmu::setup_aux callback that sets up ToPA tables and all the | |
795 | * bookkeeping for an AUX buffer. | |
796 | * | |
797 | * Return: Our private PT buffer structure. | |
798 | */ | |
799 | static void * | |
800 | pt_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool snapshot) | |
801 | { | |
802 | struct pt_buffer *buf; | |
803 | int node, ret; | |
804 | ||
805 | if (!nr_pages) | |
806 | return NULL; | |
807 | ||
808 | if (cpu == -1) | |
809 | cpu = raw_smp_processor_id(); | |
810 | node = cpu_to_node(cpu); | |
811 | ||
812 | buf = kzalloc_node(offsetof(struct pt_buffer, topa_index[nr_pages]), | |
813 | GFP_KERNEL, node); | |
814 | if (!buf) | |
815 | return NULL; | |
816 | ||
817 | buf->cpu = cpu; | |
818 | buf->snapshot = snapshot; | |
819 | buf->data_pages = pages; | |
820 | ||
821 | INIT_LIST_HEAD(&buf->tables); | |
822 | ||
823 | ret = pt_buffer_init_topa(buf, nr_pages, GFP_KERNEL); | |
824 | if (ret) { | |
825 | kfree(buf); | |
826 | return NULL; | |
827 | } | |
828 | ||
829 | return buf; | |
830 | } | |
831 | ||
832 | /** | |
833 | * pt_buffer_free_aux() - perf AUX deallocation path callback | |
834 | * @data: PT buffer. | |
835 | */ | |
836 | static void pt_buffer_free_aux(void *data) | |
837 | { | |
838 | struct pt_buffer *buf = data; | |
839 | ||
840 | pt_buffer_fini_topa(buf); | |
841 | kfree(buf); | |
842 | } | |
843 | ||
844 | /** | |
845 | * pt_buffer_is_full() - check if the buffer is full | |
846 | * @buf: PT buffer. | |
847 | * @pt: Per-cpu pt handle. | |
848 | * | |
849 | * If the user hasn't read data from the output region that aux_head | |
850 | * points to, the buffer is considered full: the user needs to read at | |
851 | * least this region and update aux_tail to point past it. | |
852 | */ | |
853 | static bool pt_buffer_is_full(struct pt_buffer *buf, struct pt *pt) | |
854 | { | |
855 | if (buf->snapshot) | |
856 | return false; | |
857 | ||
858 | if (local_read(&buf->data_size) >= pt->handle.size) | |
859 | return true; | |
860 | ||
861 | return false; | |
862 | } | |
863 | ||
864 | /** | |
865 | * intel_pt_interrupt() - PT PMI handler | |
866 | */ | |
867 | void intel_pt_interrupt(void) | |
868 | { | |
869 | struct pt *pt = this_cpu_ptr(&pt_ctx); | |
870 | struct pt_buffer *buf; | |
871 | struct perf_event *event = pt->handle.event; | |
872 | ||
873 | /* | |
874 | * There may be a dangling PT bit in the interrupt status register | |
875 | * after PT has been disabled by pt_event_stop(). Make sure we don't | |
876 | * do anything (particularly, re-enable) for this event here. | |
877 | */ | |
878 | if (!ACCESS_ONCE(pt->handle_nmi)) | |
879 | return; | |
880 | ||
881 | pt_config_start(false); | |
882 | ||
883 | if (!event) | |
884 | return; | |
885 | ||
886 | buf = perf_get_aux(&pt->handle); | |
887 | if (!buf) | |
888 | return; | |
889 | ||
890 | pt_read_offset(buf); | |
891 | ||
892 | pt_handle_status(pt); | |
893 | ||
894 | pt_update_head(pt); | |
895 | ||
896 | perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0), | |
897 | local_xchg(&buf->lost, 0)); | |
898 | ||
899 | if (!event->hw.state) { | |
900 | int ret; | |
901 | ||
902 | buf = perf_aux_output_begin(&pt->handle, event); | |
903 | if (!buf) { | |
904 | event->hw.state = PERF_HES_STOPPED; | |
905 | return; | |
906 | } | |
907 | ||
908 | pt_buffer_reset_offsets(buf, pt->handle.head); | |
cf302bfd | 909 | /* snapshot counters don't use PMI, so it's safe */ |
52ca9ced AS |
910 | ret = pt_buffer_reset_markers(buf, &pt->handle); |
911 | if (ret) { | |
912 | perf_aux_output_end(&pt->handle, 0, true); | |
913 | return; | |
914 | } | |
915 | ||
916 | pt_config_buffer(buf->cur->table, buf->cur_idx, | |
917 | buf->output_off); | |
52ca9ced AS |
918 | pt_config(event); |
919 | } | |
920 | } | |
921 | ||
922 | /* | |
923 | * PMU callbacks | |
924 | */ | |
925 | ||
926 | static void pt_event_start(struct perf_event *event, int mode) | |
927 | { | |
928 | struct pt *pt = this_cpu_ptr(&pt_ctx); | |
929 | struct pt_buffer *buf = perf_get_aux(&pt->handle); | |
930 | ||
0a487aad | 931 | if (!buf || pt_buffer_is_full(buf, pt)) { |
52ca9ced AS |
932 | event->hw.state = PERF_HES_STOPPED; |
933 | return; | |
934 | } | |
935 | ||
936 | ACCESS_ONCE(pt->handle_nmi) = 1; | |
937 | event->hw.state = 0; | |
938 | ||
939 | pt_config_buffer(buf->cur->table, buf->cur_idx, | |
940 | buf->output_off); | |
52ca9ced AS |
941 | pt_config(event); |
942 | } | |
943 | ||
944 | static void pt_event_stop(struct perf_event *event, int mode) | |
945 | { | |
946 | struct pt *pt = this_cpu_ptr(&pt_ctx); | |
947 | ||
948 | /* | |
949 | * Protect against the PMI racing with disabling wrmsr, | |
950 | * see comment in intel_pt_interrupt(). | |
951 | */ | |
952 | ACCESS_ONCE(pt->handle_nmi) = 0; | |
953 | pt_config_start(false); | |
954 | ||
955 | if (event->hw.state == PERF_HES_STOPPED) | |
956 | return; | |
957 | ||
958 | event->hw.state = PERF_HES_STOPPED; | |
959 | ||
960 | if (mode & PERF_EF_UPDATE) { | |
52ca9ced AS |
961 | struct pt_buffer *buf = perf_get_aux(&pt->handle); |
962 | ||
963 | if (!buf) | |
964 | return; | |
965 | ||
966 | if (WARN_ON_ONCE(pt->handle.event != event)) | |
967 | return; | |
968 | ||
969 | pt_read_offset(buf); | |
970 | ||
971 | pt_handle_status(pt); | |
972 | ||
973 | pt_update_head(pt); | |
974 | } | |
975 | } | |
976 | ||
977 | static void pt_event_del(struct perf_event *event, int mode) | |
978 | { | |
979 | struct pt *pt = this_cpu_ptr(&pt_ctx); | |
980 | struct pt_buffer *buf; | |
981 | ||
982 | pt_event_stop(event, PERF_EF_UPDATE); | |
983 | ||
984 | buf = perf_get_aux(&pt->handle); | |
985 | ||
986 | if (buf) { | |
987 | if (buf->snapshot) | |
988 | pt->handle.head = | |
989 | local_xchg(&buf->data_size, | |
990 | buf->nr_pages << PAGE_SHIFT); | |
991 | perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0), | |
992 | local_xchg(&buf->lost, 0)); | |
993 | } | |
994 | } | |
995 | ||
996 | static int pt_event_add(struct perf_event *event, int mode) | |
997 | { | |
998 | struct pt_buffer *buf; | |
999 | struct pt *pt = this_cpu_ptr(&pt_ctx); | |
1000 | struct hw_perf_event *hwc = &event->hw; | |
1001 | int ret = -EBUSY; | |
1002 | ||
1003 | if (pt->handle.event) | |
0c99241c | 1004 | goto fail; |
52ca9ced AS |
1005 | |
1006 | buf = perf_aux_output_begin(&pt->handle, event); | |
0c99241c IM |
1007 | ret = -EINVAL; |
1008 | if (!buf) | |
1009 | goto fail_stop; | |
52ca9ced AS |
1010 | |
1011 | pt_buffer_reset_offsets(buf, pt->handle.head); | |
1012 | if (!buf->snapshot) { | |
1013 | ret = pt_buffer_reset_markers(buf, &pt->handle); | |
0c99241c IM |
1014 | if (ret) |
1015 | goto fail_end_stop; | |
52ca9ced AS |
1016 | } |
1017 | ||
1018 | if (mode & PERF_EF_START) { | |
1019 | pt_event_start(event, 0); | |
0c99241c IM |
1020 | ret = -EBUSY; |
1021 | if (hwc->state == PERF_HES_STOPPED) | |
1022 | goto fail_end_stop; | |
52ca9ced AS |
1023 | } else { |
1024 | hwc->state = PERF_HES_STOPPED; | |
1025 | } | |
1026 | ||
0c99241c | 1027 | return 0; |
52ca9ced | 1028 | |
0c99241c IM |
1029 | fail_end_stop: |
1030 | perf_aux_output_end(&pt->handle, 0, true); | |
1031 | fail_stop: | |
1032 | hwc->state = PERF_HES_STOPPED; | |
1033 | fail: | |
52ca9ced AS |
1034 | return ret; |
1035 | } | |
1036 | ||
1037 | static void pt_event_read(struct perf_event *event) | |
1038 | { | |
1039 | } | |
1040 | ||
1041 | static void pt_event_destroy(struct perf_event *event) | |
1042 | { | |
1043 | x86_del_exclusive(x86_lbr_exclusive_pt); | |
1044 | } | |
1045 | ||
1046 | static int pt_event_init(struct perf_event *event) | |
1047 | { | |
1048 | if (event->attr.type != pt_pmu.pmu.type) | |
1049 | return -ENOENT; | |
1050 | ||
1051 | if (!pt_event_valid(event)) | |
1052 | return -EINVAL; | |
1053 | ||
1054 | if (x86_add_exclusive(x86_lbr_exclusive_pt)) | |
1055 | return -EBUSY; | |
1056 | ||
1057 | event->destroy = pt_event_destroy; | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | static __init int pt_init(void) | |
1063 | { | |
1064 | int ret, cpu, prior_warn = 0; | |
1065 | ||
1066 | BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE); | |
1067 | get_online_cpus(); | |
1068 | for_each_online_cpu(cpu) { | |
1069 | u64 ctl; | |
1070 | ||
1071 | ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &ctl); | |
1072 | if (!ret && (ctl & RTIT_CTL_TRACEEN)) | |
1073 | prior_warn++; | |
1074 | } | |
1075 | put_online_cpus(); | |
1076 | ||
1077 | if (prior_warn) { | |
1078 | x86_add_exclusive(x86_lbr_exclusive_pt); | |
1079 | pr_warn("PT is enabled at boot time, doing nothing\n"); | |
1080 | ||
1081 | return -EBUSY; | |
1082 | } | |
1083 | ||
1084 | ret = pt_pmu_hw_init(); | |
1085 | if (ret) | |
1086 | return ret; | |
1087 | ||
1088 | if (!pt_cap_get(PT_CAP_topa_output)) { | |
1089 | pr_warn("ToPA output is not supported on this CPU\n"); | |
1090 | return -ENODEV; | |
1091 | } | |
1092 | ||
1093 | if (!pt_cap_get(PT_CAP_topa_multiple_entries)) | |
1094 | pt_pmu.pmu.capabilities = | |
1095 | PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF; | |
1096 | ||
1097 | pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE; | |
1098 | pt_pmu.pmu.attr_groups = pt_attr_groups; | |
1099 | pt_pmu.pmu.task_ctx_nr = perf_sw_context; | |
1100 | pt_pmu.pmu.event_init = pt_event_init; | |
1101 | pt_pmu.pmu.add = pt_event_add; | |
1102 | pt_pmu.pmu.del = pt_event_del; | |
1103 | pt_pmu.pmu.start = pt_event_start; | |
1104 | pt_pmu.pmu.stop = pt_event_stop; | |
1105 | pt_pmu.pmu.read = pt_event_read; | |
1106 | pt_pmu.pmu.setup_aux = pt_buffer_setup_aux; | |
1107 | pt_pmu.pmu.free_aux = pt_buffer_free_aux; | |
1108 | ret = perf_pmu_register(&pt_pmu.pmu, "intel_pt", -1); | |
1109 | ||
1110 | return ret; | |
1111 | } | |
5b00c1eb | 1112 | arch_initcall(pt_init); |