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Commit | Line | Data |
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1da177e4 LT |
1 | #include <linux/smp.h> |
2 | #include <linux/timex.h> | |
3 | #include <linux/string.h> | |
1da177e4 | 4 | #include <linux/seq_file.h> |
95235ca2 | 5 | #include <linux/cpufreq.h> |
1da177e4 LT |
6 | |
7 | /* | |
8 | * Get CPU information for use by the procfs. | |
9 | */ | |
a967ceac HS |
10 | static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, |
11 | unsigned int cpu) | |
12 | { | |
327f4387 | 13 | #ifdef CONFIG_SMP |
a477c859 HD |
14 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); |
15 | seq_printf(m, "siblings\t: %d\n", cpumask_weight(cpu_core_mask(cpu))); | |
16 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); | |
17 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | |
18 | seq_printf(m, "apicid\t\t: %d\n", c->apicid); | |
19 | seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid); | |
a967ceac HS |
20 | #endif |
21 | } | |
22 | ||
327f4387 | 23 | #ifdef CONFIG_X86_32 |
a967ceac HS |
24 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
25 | { | |
a967ceac HS |
26 | seq_printf(m, |
27 | "fdiv_bug\t: %s\n" | |
a967ceac HS |
28 | "f00f_bug\t: %s\n" |
29 | "coma_bug\t: %s\n" | |
30 | "fpu\t\t: %s\n" | |
31 | "fpu_exception\t: %s\n" | |
32 | "cpuid level\t: %d\n" | |
33 | "wp\t\t: %s\n", | |
93a829e8 | 34 | static_cpu_has_bug(X86_BUG_FDIV) ? "yes" : "no", |
e2604b49 | 35 | static_cpu_has_bug(X86_BUG_F00F) ? "yes" : "no", |
c5b41a67 | 36 | static_cpu_has_bug(X86_BUG_COMA) ? "yes" : "no", |
60e019eb PA |
37 | static_cpu_has(X86_FEATURE_FPU) ? "yes" : "no", |
38 | static_cpu_has(X86_FEATURE_FPU) ? "yes" : "no", | |
a967ceac HS |
39 | c->cpuid_level, |
40 | c->wp_works_ok ? "yes" : "no"); | |
41 | } | |
2aef7720 | 42 | #else |
2aef7720 HS |
43 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
44 | { | |
45 | seq_printf(m, | |
46 | "fpu\t\t: yes\n" | |
47 | "fpu_exception\t: yes\n" | |
48 | "cpuid level\t: %d\n" | |
49 | "wp\t\t: yes\n", | |
50 | c->cpuid_level); | |
51 | } | |
52 | #endif | |
a967ceac | 53 | |
1da177e4 LT |
54 | static int show_cpuinfo(struct seq_file *m, void *v) |
55 | { | |
1da177e4 | 56 | struct cpuinfo_x86 *c = v; |
141168c3 | 57 | unsigned int cpu; |
a967ceac | 58 | int i; |
1da177e4 | 59 | |
a967ceac | 60 | cpu = c->cpu_index; |
a967ceac HS |
61 | seq_printf(m, "processor\t: %u\n" |
62 | "vendor_id\t: %s\n" | |
63 | "cpu family\t: %d\n" | |
64 | "model\t\t: %u\n" | |
65 | "model name\t: %s\n", | |
66 | cpu, | |
67 | c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown", | |
68 | c->x86, | |
69 | c->x86_model, | |
70 | c->x86_model_id[0] ? c->x86_model_id : "unknown"); | |
1da177e4 LT |
71 | |
72 | if (c->x86_mask || c->cpuid_level >= 0) | |
73 | seq_printf(m, "stepping\t: %d\n", c->x86_mask); | |
74 | else | |
75 | seq_printf(m, "stepping\t: unknown\n"); | |
506ed6b5 | 76 | if (c->microcode) |
881e23e5 | 77 | seq_printf(m, "microcode\t: 0x%x\n", c->microcode); |
1da177e4 | 78 | |
a967ceac HS |
79 | if (cpu_has(c, X86_FEATURE_TSC)) { |
80 | unsigned int freq = cpufreq_quick_get(cpu); | |
81 | ||
95235ca2 VP |
82 | if (!freq) |
83 | freq = cpu_khz; | |
a3a255e7 | 84 | seq_printf(m, "cpu MHz\t\t: %u.%03u\n", |
a967ceac | 85 | freq / 1000, (freq % 1000)); |
1da177e4 LT |
86 | } |
87 | ||
88 | /* Cache size */ | |
89 | if (c->x86_cache_size >= 0) | |
90 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); | |
a967ceac HS |
91 | |
92 | show_cpuinfo_core(m, c, cpu); | |
93 | show_cpuinfo_misc(m, c); | |
94 | ||
95 | seq_printf(m, "flags\t\t:"); | |
96 | for (i = 0; i < 32*NCAPINTS; i++) | |
97 | if (cpu_has(c, i) && x86_cap_flags[i] != NULL) | |
1da177e4 LT |
98 | seq_printf(m, " %s", x86_cap_flags[i]); |
99 | ||
f84c3a42 HS |
100 | seq_printf(m, "\nbogomips\t: %lu.%02lu\n", |
101 | c->loops_per_jiffy/(500000/HZ), | |
102 | (c->loops_per_jiffy/(5000/HZ)) % 100); | |
2aef7720 HS |
103 | |
104 | #ifdef CONFIG_X86_64 | |
105 | if (c->x86_tlbsize > 0) | |
106 | seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize); | |
107 | #endif | |
f84c3a42 | 108 | seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size); |
2aef7720 HS |
109 | seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment); |
110 | seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n", | |
111 | c->x86_phys_bits, c->x86_virt_bits); | |
f84c3a42 HS |
112 | |
113 | seq_printf(m, "power management:"); | |
114 | for (i = 0; i < 32; i++) { | |
3f98bc49 AK |
115 | if (c->x86_power & (1 << i)) { |
116 | if (i < ARRAY_SIZE(x86_power_flags) && | |
117 | x86_power_flags[i]) | |
118 | seq_printf(m, "%s%s", | |
8bdbd962 | 119 | x86_power_flags[i][0] ? " " : "", |
3f98bc49 AK |
120 | x86_power_flags[i]); |
121 | else | |
122 | seq_printf(m, " [%d]", i); | |
123 | } | |
f84c3a42 | 124 | } |
3f98bc49 | 125 | |
f84c3a42 | 126 | seq_printf(m, "\n\n"); |
3dd9d514 | 127 | |
1da177e4 LT |
128 | return 0; |
129 | } | |
130 | ||
131 | static void *c_start(struct seq_file *m, loff_t *pos) | |
132 | { | |
dec08a83 | 133 | *pos = cpumask_next(*pos - 1, cpu_online_mask); |
bc8bcc79 | 134 | if ((*pos) < nr_cpu_ids) |
92cb7612 MT |
135 | return &cpu_data(*pos); |
136 | return NULL; | |
1da177e4 | 137 | } |
a967ceac | 138 | |
1da177e4 LT |
139 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
140 | { | |
bc8bcc79 | 141 | (*pos)++; |
1da177e4 LT |
142 | return c_start(m, pos); |
143 | } | |
a967ceac | 144 | |
1da177e4 LT |
145 | static void c_stop(struct seq_file *m, void *v) |
146 | { | |
147 | } | |
a967ceac | 148 | |
8a45eb31 | 149 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
150 | .start = c_start, |
151 | .next = c_next, | |
152 | .stop = c_stop, | |
153 | .show = show_cpuinfo, | |
154 | }; |