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Commit | Line | Data |
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1da177e4 LT |
1 | #include <linux/smp.h> |
2 | #include <linux/timex.h> | |
3 | #include <linux/string.h> | |
1da177e4 | 4 | #include <linux/seq_file.h> |
95235ca2 | 5 | #include <linux/cpufreq.h> |
1da177e4 LT |
6 | |
7 | /* | |
8 | * Get CPU information for use by the procfs. | |
9 | */ | |
a967ceac HS |
10 | static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, |
11 | unsigned int cpu) | |
12 | { | |
327f4387 | 13 | #ifdef CONFIG_SMP |
a967ceac HS |
14 | if (c->x86_max_cores * smp_num_siblings > 1) { |
15 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); | |
16 | seq_printf(m, "siblings\t: %d\n", | |
35d11680 | 17 | cpumask_weight(cpu_core_mask(cpu))); |
a967ceac HS |
18 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); |
19 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | |
01aaea1a YL |
20 | seq_printf(m, "apicid\t\t: %d\n", c->apicid); |
21 | seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid); | |
a967ceac HS |
22 | } |
23 | #endif | |
24 | } | |
25 | ||
327f4387 | 26 | #ifdef CONFIG_X86_32 |
a967ceac HS |
27 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
28 | { | |
29 | /* | |
30 | * We use exception 16 if we have hardware math and we've either seen | |
31 | * it or the CPU claims it is internal | |
32 | */ | |
33 | int fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu); | |
34 | seq_printf(m, | |
35 | "fdiv_bug\t: %s\n" | |
36 | "hlt_bug\t\t: %s\n" | |
37 | "f00f_bug\t: %s\n" | |
38 | "coma_bug\t: %s\n" | |
39 | "fpu\t\t: %s\n" | |
40 | "fpu_exception\t: %s\n" | |
41 | "cpuid level\t: %d\n" | |
42 | "wp\t\t: %s\n", | |
43 | c->fdiv_bug ? "yes" : "no", | |
44 | c->hlt_works_ok ? "no" : "yes", | |
45 | c->f00f_bug ? "yes" : "no", | |
46 | c->coma_bug ? "yes" : "no", | |
47 | c->hard_math ? "yes" : "no", | |
48 | fpu_exception ? "yes" : "no", | |
49 | c->cpuid_level, | |
50 | c->wp_works_ok ? "yes" : "no"); | |
51 | } | |
2aef7720 | 52 | #else |
2aef7720 HS |
53 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
54 | { | |
55 | seq_printf(m, | |
56 | "fpu\t\t: yes\n" | |
57 | "fpu_exception\t: yes\n" | |
58 | "cpuid level\t: %d\n" | |
59 | "wp\t\t: yes\n", | |
60 | c->cpuid_level); | |
61 | } | |
62 | #endif | |
a967ceac | 63 | |
1da177e4 LT |
64 | static int show_cpuinfo(struct seq_file *m, void *v) |
65 | { | |
1da177e4 | 66 | struct cpuinfo_x86 *c = v; |
a967ceac HS |
67 | unsigned int cpu = 0; |
68 | int i; | |
1da177e4 LT |
69 | |
70 | #ifdef CONFIG_SMP | |
a967ceac | 71 | cpu = c->cpu_index; |
1da177e4 | 72 | #endif |
a967ceac HS |
73 | seq_printf(m, "processor\t: %u\n" |
74 | "vendor_id\t: %s\n" | |
75 | "cpu family\t: %d\n" | |
76 | "model\t\t: %u\n" | |
77 | "model name\t: %s\n", | |
78 | cpu, | |
79 | c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown", | |
80 | c->x86, | |
81 | c->x86_model, | |
82 | c->x86_model_id[0] ? c->x86_model_id : "unknown"); | |
1da177e4 LT |
83 | |
84 | if (c->x86_mask || c->cpuid_level >= 0) | |
85 | seq_printf(m, "stepping\t: %d\n", c->x86_mask); | |
86 | else | |
87 | seq_printf(m, "stepping\t: unknown\n"); | |
88 | ||
a967ceac HS |
89 | if (cpu_has(c, X86_FEATURE_TSC)) { |
90 | unsigned int freq = cpufreq_quick_get(cpu); | |
91 | ||
95235ca2 VP |
92 | if (!freq) |
93 | freq = cpu_khz; | |
a3a255e7 | 94 | seq_printf(m, "cpu MHz\t\t: %u.%03u\n", |
a967ceac | 95 | freq / 1000, (freq % 1000)); |
1da177e4 LT |
96 | } |
97 | ||
98 | /* Cache size */ | |
99 | if (c->x86_cache_size >= 0) | |
100 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); | |
a967ceac HS |
101 | |
102 | show_cpuinfo_core(m, c, cpu); | |
103 | show_cpuinfo_misc(m, c); | |
104 | ||
105 | seq_printf(m, "flags\t\t:"); | |
106 | for (i = 0; i < 32*NCAPINTS; i++) | |
107 | if (cpu_has(c, i) && x86_cap_flags[i] != NULL) | |
1da177e4 LT |
108 | seq_printf(m, " %s", x86_cap_flags[i]); |
109 | ||
f84c3a42 HS |
110 | seq_printf(m, "\nbogomips\t: %lu.%02lu\n", |
111 | c->loops_per_jiffy/(500000/HZ), | |
112 | (c->loops_per_jiffy/(5000/HZ)) % 100); | |
2aef7720 HS |
113 | |
114 | #ifdef CONFIG_X86_64 | |
115 | if (c->x86_tlbsize > 0) | |
116 | seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize); | |
117 | #endif | |
f84c3a42 | 118 | seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size); |
2aef7720 HS |
119 | seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment); |
120 | seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n", | |
121 | c->x86_phys_bits, c->x86_virt_bits); | |
f84c3a42 HS |
122 | |
123 | seq_printf(m, "power management:"); | |
124 | for (i = 0; i < 32; i++) { | |
3f98bc49 AK |
125 | if (c->x86_power & (1 << i)) { |
126 | if (i < ARRAY_SIZE(x86_power_flags) && | |
127 | x86_power_flags[i]) | |
128 | seq_printf(m, "%s%s", | |
8bdbd962 | 129 | x86_power_flags[i][0] ? " " : "", |
3f98bc49 AK |
130 | x86_power_flags[i]); |
131 | else | |
132 | seq_printf(m, " [%d]", i); | |
133 | } | |
f84c3a42 | 134 | } |
3f98bc49 | 135 | |
f84c3a42 | 136 | seq_printf(m, "\n\n"); |
3dd9d514 | 137 | |
1da177e4 LT |
138 | return 0; |
139 | } | |
140 | ||
141 | static void *c_start(struct seq_file *m, loff_t *pos) | |
142 | { | |
92cb7612 | 143 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
4f062896 | 144 | *pos = cpumask_first(cpu_online_mask); |
bc8bcc79 | 145 | else |
4f062896 | 146 | *pos = cpumask_next(*pos - 1, cpu_online_mask); |
bc8bcc79 | 147 | if ((*pos) < nr_cpu_ids) |
92cb7612 MT |
148 | return &cpu_data(*pos); |
149 | return NULL; | |
1da177e4 | 150 | } |
a967ceac | 151 | |
1da177e4 LT |
152 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
153 | { | |
bc8bcc79 | 154 | (*pos)++; |
1da177e4 LT |
155 | return c_start(m, pos); |
156 | } | |
a967ceac | 157 | |
1da177e4 LT |
158 | static void c_stop(struct seq_file *m, void *v) |
159 | { | |
160 | } | |
a967ceac | 161 | |
8a45eb31 | 162 | const struct seq_operations cpuinfo_op = { |
1da177e4 LT |
163 | .start = c_start, |
164 | .next = c_next, | |
165 | .stop = c_stop, | |
166 | .show = show_cpuinfo, | |
167 | }; |