[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / cpu / transmeta.c

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/sched/clock.h>
#include <linux/mm.h>
#include <asm/cpufeature.h>
#include <asm/msr.h>
#include "cpu.h"

static void early_init_transmeta(struct cpuinfo_x86 *c)
{
	u32 xlvl;

	/* Transmeta-defined flags: level 0x80860001 */
	xlvl = cpuid_eax(0x80860000);
	if ((xlvl & 0xffff0000) == 0x80860000) {
		if (xlvl >= 0x80860001)
			c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
	}
}

static void init_transmeta(struct cpuinfo_x86 *c)
{
	unsigned int cap_mask, uk, max, dummy;
	unsigned int cms_rev1, cms_rev2;
	unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
	char cpu_info[65];

	early_init_transmeta(c);

	cpu_detect_cache_sizes(c);

	/* Print CMS and CPU revision */
	max = cpuid_eax(0x80860000);
	cpu_rev = 0;
	if (max >= 0x80860001) {
		cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
		if (cpu_rev != 0x02000000) {
			pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
				(cpu_rev >> 24) & 0xff,
				(cpu_rev >> 16) & 0xff,
				(cpu_rev >> 8) & 0xff,
				cpu_rev & 0xff,
				cpu_freq);
		}
	}
	if (max >= 0x80860002) {
		cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
		if (cpu_rev == 0x02000000) {
			pr_info("CPU: Processor revision %08X, %u MHz\n",
				new_cpu_rev, cpu_freq);
		}
		pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
		       (cms_rev1 >> 24) & 0xff,
		       (cms_rev1 >> 16) & 0xff,
		       (cms_rev1 >> 8) & 0xff,
		       cms_rev1 & 0xff,
		       cms_rev2);
	}
	if (max >= 0x80860006) {
		cpuid(0x80860003,
		      (void *)&cpu_info[0],
		      (void *)&cpu_info[4],
		      (void *)&cpu_info[8],
		      (void *)&cpu_info[12]);
		cpuid(0x80860004,
		      (void *)&cpu_info[16],
		      (void *)&cpu_info[20],
		      (void *)&cpu_info[24],
		      (void *)&cpu_info[28]);
		cpuid(0x80860005,
		      (void *)&cpu_info[32],
		      (void *)&cpu_info[36],
		      (void *)&cpu_info[40],
		      (void *)&cpu_info[44]);
		cpuid(0x80860006,
		      (void *)&cpu_info[48],
		      (void *)&cpu_info[52],
		      (void *)&cpu_info[56],
		      (void *)&cpu_info[60]);
		cpu_info[64] = '\0';
		pr_info("CPU: %s\n", cpu_info);
	}

	/* Unhide possibly hidden capability flags */
	rdmsr(0x80860004, cap_mask, uk);
	wrmsr(0x80860004, ~0, uk);
	c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
	wrmsr(0x80860004, cap_mask, uk);

	/* All Transmeta CPUs have a constant TSC */
	set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);

#ifdef CONFIG_SYSCTL
	/*
	 * randomize_va_space slows us down enormously;
	 * it probably triggers retranslation of x86->native bytecode
	 */
	randomize_va_space = 0;
#endif
}

static const struct cpu_dev transmeta_cpu_dev = {
	.c_vendor	= "Transmeta",
	.c_ident	= { "GenuineTMx86", "TransmetaCPU" },
	.c_early_init	= early_init_transmeta,
	.c_init		= init_transmeta,
	.c_x86_vendor	= X86_VENDOR_TRANSMETA,
};

cpu_dev_register(transmeta_cpu_dev);
Commit	Line	Data
1da177e4	1	#include <linux/kernel.h>
acb04058	2	#include <linux/sched.h>
e6017571	3	#include <linux/sched/clock.h>
a62eaf15	4	#include <linux/mm.h>
cd4d09ec	5	#include <asm/cpufeature.h>
1da177e4 LT	6	#include <asm/msr.h>
	7	#include "cpu.h"
	8
148f9bb8	9	static void early_init_transmeta(struct cpuinfo_x86 *c)
afae8656 YL	10	{
	11	u32 xlvl;
	12
	13	/* Transmeta-defined flags: level 0x80860001 */
	14	xlvl = cpuid_eax(0x80860000);
	15	if ((xlvl & 0xffff0000) == 0x80860000) {
	16	if (xlvl >= 0x80860001)
39c06df4	17	c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
afae8656 YL	18	}
	19	}
	20
148f9bb8	21	static void init_transmeta(struct cpuinfo_x86 *c)
1da177e4 LT	22	{
	23	unsigned int cap_mask, uk, max, dummy;
	24	unsigned int cms_rev1, cms_rev2;
7de6d361	25	unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
1da177e4 LT	26	char cpu_info[65];
1da177e4 LT	27
afae8656 YL	28	early_init_transmeta(c);
afae8656 YL	29
27c13ece	30	cpu_detect_cache_sizes(c);
1da177e4 LT	31
	32	/* Print CMS and CPU revision */
	33	max = cpuid_eax(0x80860000);
	34	cpu_rev = 0;
f9751827 PC	35	if (max >= 0x80860001) {
f9751827 PC	36	cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
1da177e4	37	if (cpu_rev != 0x02000000) {
1b74dde7	38	pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
1da177e4 LT	39	(cpu_rev >> 24) & 0xff,
	40	(cpu_rev >> 16) & 0xff,
	41	(cpu_rev >> 8) & 0xff,
	42	cpu_rev & 0xff,
	43	cpu_freq);
	44	}
	45	}
f9751827	46	if (max >= 0x80860002) {
1da177e4 LT	47	cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
1da177e4 LT	48	if (cpu_rev == 0x02000000) {
1b74dde7	49	pr_info("CPU: Processor revision %08X, %u MHz\n",
1da177e4 LT	50	new_cpu_rev, cpu_freq);
1da177e4 LT	51	}
1b74dde7	52	pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
1da177e4 LT	53	(cms_rev1 >> 24) & 0xff,
	54	(cms_rev1 >> 16) & 0xff,
	55	(cms_rev1 >> 8) & 0xff,
	56	cms_rev1 & 0xff,
	57	cms_rev2);
	58	}
f9751827	59	if (max >= 0x80860006) {
1da177e4 LT	60	cpuid(0x80860003,
	61	(void *)&cpu_info[0],
	62	(void *)&cpu_info[4],
	63	(void *)&cpu_info[8],
	64	(void *)&cpu_info[12]);
	65	cpuid(0x80860004,
	66	(void *)&cpu_info[16],
	67	(void *)&cpu_info[20],
	68	(void *)&cpu_info[24],
	69	(void *)&cpu_info[28]);
	70	cpuid(0x80860005,
	71	(void *)&cpu_info[32],
	72	(void *)&cpu_info[36],
	73	(void *)&cpu_info[40],
	74	(void *)&cpu_info[44]);
	75	cpuid(0x80860006,
	76	(void *)&cpu_info[48],
	77	(void *)&cpu_info[52],
	78	(void *)&cpu_info[56],
	79	(void *)&cpu_info[60]);
	80	cpu_info[64] = '\0';
1b74dde7	81	pr_info("CPU: %s\n", cpu_info);
1da177e4 LT	82	}
	83
	84	/* Unhide possibly hidden capability flags */
	85	rdmsr(0x80860004, cap_mask, uk);
	86	wrmsr(0x80860004, ~0, uk);
39c06df4	87	c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
1da177e4	88	wrmsr(0x80860004, cap_mask, uk);
30b82ea0 PA	89
30b82ea0 PA	90	/* All Transmeta CPUs have a constant TSC */
10cd5a1e	91	set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
f9751827	92
39bbb07d	93	#ifdef CONFIG_SYSCTL
f9751827 PC	94	/*
	95	* randomize_va_space slows us down enormously;
	96	* it probably triggers retranslation of x86->native bytecode
	97	*/
cdf32eaa	98	randomize_va_space = 0;
39bbb07d	99	#endif
1da177e4 LT	100	}
1da177e4 LT	101
148f9bb8	102	static const struct cpu_dev transmeta_cpu_dev = {
1da177e4 LT	103	.c_vendor = "Transmeta",
1da177e4 LT	104	.c_ident = { "GenuineTMx86", "TransmetaCPU" },
afae8656	105	.c_early_init = early_init_transmeta,
1da177e4	106	.c_init = init_transmeta,
10a434fc	107	.c_x86_vendor = X86_VENDOR_TRANSMETA,
1da177e4 LT	108	};
1da177e4 LT	109
10a434fc	110	cpu_dev_register(transmeta_cpu_dev);