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x86, ptrace: support for branch trace store(BTS)
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1/*
2 * Debug Store support
3 *
4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for last branch recording (LBR) and
6 * precise-event based sampling (PEBS).
7 *
8 * Different architectures use a different DS layout/pointer size.
9 * The below functions therefore work on a void*.
10 *
11 *
12 * Since there is no user for PEBS, yet, only LBR (or branch
13 * trace store, BTS) is supported.
14 *
15 *
16 * Copyright (C) 2007 Intel Corporation.
17 * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
18 */
19
20#include <asm/ds.h>
21
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/slab.h>
25
26
27/*
28 * Debug Store (DS) save area configuration (see Intel64 and IA32
29 * Architectures Software Developer's Manual, section 18.5)
30 *
31 * The DS configuration consists of the following fields; different
32 * architetures vary in the size of those fields.
33 * - double-word aligned base linear address of the BTS buffer
34 * - write pointer into the BTS buffer
35 * - end linear address of the BTS buffer (one byte beyond the end of
36 * the buffer)
37 * - interrupt pointer into BTS buffer
38 * (interrupt occurs when write pointer passes interrupt pointer)
39 * - double-word aligned base linear address of the PEBS buffer
40 * - write pointer into the PEBS buffer
41 * - end linear address of the PEBS buffer (one byte beyond the end of
42 * the buffer)
43 * - interrupt pointer into PEBS buffer
44 * (interrupt occurs when write pointer passes interrupt pointer)
45 * - value to which counter is reset following counter overflow
46 *
47 * On later architectures, the last branch recording hardware uses
48 * 64bit pointers even in 32bit mode.
49 *
50 *
51 * Branch Trace Store (BTS) records store information about control
52 * flow changes. They at least provide the following information:
53 * - source linear address
54 * - destination linear address
55 *
56 * Netburst supported a predicated bit that had been dropped in later
57 * architectures. We do not suppor it.
58 *
59 *
60 * In order to abstract from the actual DS and BTS layout, we describe
61 * the access to the relevant fields.
62 * Thanks to Andi Kleen for proposing this design.
63 *
64 * The implementation, however, is not as general as it might seem. In
65 * order to stay somewhat simple and efficient, we assume an
66 * underlying unsigned type (mostly a pointer type) and we expect the
67 * field to be at least as big as that type.
68 */
69
70/*
71 * A special from_ip address to indicate that the BTS record is an
72 * info record that needs to be interpreted or skipped.
73 */
74#define BTS_ESCAPE_ADDRESS (-1)
75
76/*
77 * A field access descriptor
78 */
79struct access_desc {
80 unsigned char offset;
81 unsigned char size;
82};
83
84/*
85 * The configuration for a particular DS/BTS hardware implementation.
86 */
87struct ds_configuration {
88 /* the DS configuration */
89 unsigned char sizeof_ds;
90 struct access_desc bts_buffer_base;
91 struct access_desc bts_index;
92 struct access_desc bts_absolute_maximum;
93 struct access_desc bts_interrupt_threshold;
94 /* the BTS configuration */
95 unsigned char sizeof_bts;
96 struct access_desc from_ip;
97 struct access_desc to_ip;
98 /* BTS variants used to store additional information like
99 timestamps */
100 struct access_desc info_type;
101 struct access_desc info_data;
102 unsigned long debugctl_mask;
103};
104
105/*
106 * The global configuration used by the below accessor functions
107 */
108static struct ds_configuration ds_cfg;
109
110/*
111 * Accessor functions for some DS and BTS fields using the above
112 * global ptrace_bts_cfg.
113 */
114static inline void *get_bts_buffer_base(char *base)
115{
116 return *(void **)(base + ds_cfg.bts_buffer_base.offset);
117}
118static inline void set_bts_buffer_base(char *base, void *value)
119{
120 (*(void **)(base + ds_cfg.bts_buffer_base.offset)) = value;
121}
122static inline void *get_bts_index(char *base)
123{
124 return *(void **)(base + ds_cfg.bts_index.offset);
125}
126static inline void set_bts_index(char *base, void *value)
127{
128 (*(void **)(base + ds_cfg.bts_index.offset)) = value;
129}
130static inline void *get_bts_absolute_maximum(char *base)
131{
132 return *(void **)(base + ds_cfg.bts_absolute_maximum.offset);
133}
134static inline void set_bts_absolute_maximum(char *base, void *value)
135{
136 (*(void **)(base + ds_cfg.bts_absolute_maximum.offset)) = value;
137}
138static inline void *get_bts_interrupt_threshold(char *base)
139{
140 return *(void **)(base + ds_cfg.bts_interrupt_threshold.offset);
141}
142static inline void set_bts_interrupt_threshold(char *base, void *value)
143{
144 (*(void **)(base + ds_cfg.bts_interrupt_threshold.offset)) = value;
145}
146static inline long get_from_ip(char *base)
147{
148 return *(long *)(base + ds_cfg.from_ip.offset);
149}
150static inline void set_from_ip(char *base, long value)
151{
152 (*(long *)(base + ds_cfg.from_ip.offset)) = value;
153}
154static inline long get_to_ip(char *base)
155{
156 return *(long *)(base + ds_cfg.to_ip.offset);
157}
158static inline void set_to_ip(char *base, long value)
159{
160 (*(long *)(base + ds_cfg.to_ip.offset)) = value;
161}
162static inline unsigned char get_info_type(char *base)
163{
164 return *(unsigned char *)(base + ds_cfg.info_type.offset);
165}
166static inline void set_info_type(char *base, unsigned char value)
167{
168 (*(unsigned char *)(base + ds_cfg.info_type.offset)) = value;
169}
170/*
171 * The info data might overlap with the info type on some architectures.
172 * We therefore read and write the exact number of bytes.
173 */
174static inline unsigned long long get_info_data(char *base)
175{
176 unsigned long long value = 0;
177 memcpy(&value,
178 base + ds_cfg.info_data.offset,
179 ds_cfg.info_data.size);
180 return value;
181}
182static inline void set_info_data(char *base, unsigned long long value)
183{
184 memcpy(base + ds_cfg.info_data.offset,
185 &value,
186 ds_cfg.info_data.size);
187}
188
189
190int ds_allocate(void **dsp, size_t bts_size_in_records)
191{
192 size_t bts_size_in_bytes = 0;
193 void *bts = 0;
194 void *ds = 0;
195
196 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
197 return -EOPNOTSUPP;
198
199 if (bts_size_in_records < 0)
200 return -EINVAL;
201
202 bts_size_in_bytes =
203 bts_size_in_records * ds_cfg.sizeof_bts;
204
205 if (bts_size_in_bytes <= 0)
206 return -EINVAL;
207
208 bts = kzalloc(bts_size_in_bytes, GFP_KERNEL);
209
210 if (!bts)
211 return -ENOMEM;
212
213 ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
214
215 if (!ds) {
216 kfree(bts);
217 return -ENOMEM;
218 }
219
220 set_bts_buffer_base(ds, bts);
221 set_bts_index(ds, bts);
222 set_bts_absolute_maximum(ds, bts + bts_size_in_bytes);
223 set_bts_interrupt_threshold(ds, bts + bts_size_in_bytes + 1);
224
225 *dsp = ds;
226 return 0;
227}
228
229int ds_free(void **dsp)
230{
231 if (*dsp)
232 kfree(get_bts_buffer_base(*dsp));
233 kfree(*dsp);
234 *dsp = 0;
235
236 return 0;
237}
238
239int ds_get_bts_size(void *ds)
240{
241 size_t size_in_bytes;
242
243 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
244 return -EOPNOTSUPP;
245
246 size_in_bytes =
247 get_bts_absolute_maximum(ds) -
248 get_bts_buffer_base(ds);
249
250 return size_in_bytes / ds_cfg.sizeof_bts;
251}
252
253int ds_get_bts_index(void *ds)
254{
255 size_t index_offset_in_bytes;
256
257 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
258 return -EOPNOTSUPP;
259
260 index_offset_in_bytes =
261 get_bts_index(ds) -
262 get_bts_buffer_base(ds);
263
264 return index_offset_in_bytes / ds_cfg.sizeof_bts;
265}
266
267int ds_read_bts(void *ds, size_t index, struct bts_struct *out)
268{
269 void *bts;
270
271 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
272 return -EOPNOTSUPP;
273
274 if (index < 0)
275 return -EINVAL;
276
277 if (index >= ds_get_bts_size(ds))
278 return -EINVAL;
279
280 bts = get_bts_buffer_base(ds);
281 bts = (char *)bts + (index * ds_cfg.sizeof_bts);
282
283 memset(out, 0, sizeof(*out));
284 if (get_from_ip(bts) == BTS_ESCAPE_ADDRESS) {
285 out->qualifier = get_info_type(bts);
286 out->variant.timestamp = get_info_data(bts);
287 } else {
288 out->qualifier = BTS_BRANCH;
289 out->variant.lbr.from_ip = get_from_ip(bts);
290 out->variant.lbr.to_ip = get_to_ip(bts);
291 }
292
293 return 0;
294}
295
296int ds_write_bts(void *ds, const struct bts_struct *in)
297{
298 void *bts;
299
300 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
301 return -EOPNOTSUPP;
302
303 if (ds_get_bts_size(ds) <= 0)
304 return -ENXIO;
305
306 bts = get_bts_index(ds);
307
308 memset(bts, 0, ds_cfg.sizeof_bts);
309 switch (in->qualifier) {
310 case BTS_INVALID:
311 break;
312
313 case BTS_BRANCH:
314 set_from_ip(bts, in->variant.lbr.from_ip);
315 set_to_ip(bts, in->variant.lbr.to_ip);
316 break;
317
318 case BTS_TASK_ARRIVES:
319 case BTS_TASK_DEPARTS:
320 set_from_ip(bts, BTS_ESCAPE_ADDRESS);
321 set_info_type(bts, in->qualifier);
322 set_info_data(bts, in->variant.timestamp);
323 break;
324
325 default:
326 return -EINVAL;
327 }
328
329 bts = (char *)bts + ds_cfg.sizeof_bts;
330 if (bts >= get_bts_absolute_maximum(ds))
331 bts = get_bts_buffer_base(ds);
332 set_bts_index(ds, bts);
333
334 return 0;
335}
336
337unsigned long ds_debugctl_mask(void)
338{
339 return ds_cfg.debugctl_mask;
340}
341
342#ifdef __i386__
343static const struct ds_configuration ds_cfg_netburst = {
344 .sizeof_ds = 9 * 4,
345 .bts_buffer_base = { 0, 4 },
346 .bts_index = { 4, 4 },
347 .bts_absolute_maximum = { 8, 4 },
348 .bts_interrupt_threshold = { 12, 4 },
349 .sizeof_bts = 3 * 4,
350 .from_ip = { 0, 4 },
351 .to_ip = { 4, 4 },
352 .info_type = { 4, 1 },
353 .info_data = { 5, 7 },
354 .debugctl_mask = (1<<2)|(1<<3)
355};
356
357static const struct ds_configuration ds_cfg_pentium_m = {
358 .sizeof_ds = 9 * 4,
359 .bts_buffer_base = { 0, 4 },
360 .bts_index = { 4, 4 },
361 .bts_absolute_maximum = { 8, 4 },
362 .bts_interrupt_threshold = { 12, 4 },
363 .sizeof_bts = 3 * 4,
364 .from_ip = { 0, 4 },
365 .to_ip = { 4, 4 },
366 .info_type = { 4, 1 },
367 .info_data = { 5, 7 },
368 .debugctl_mask = (1<<6)|(1<<7)
369};
370#endif /* _i386_ */
371
372static const struct ds_configuration ds_cfg_core2 = {
373 .sizeof_ds = 9 * 8,
374 .bts_buffer_base = { 0, 8 },
375 .bts_index = { 8, 8 },
376 .bts_absolute_maximum = { 16, 8 },
377 .bts_interrupt_threshold = { 24, 8 },
378 .sizeof_bts = 3 * 8,
379 .from_ip = { 0, 8 },
380 .to_ip = { 8, 8 },
381 .info_type = { 8, 1 },
382 .info_data = { 9, 7 },
383 .debugctl_mask = (1<<6)|(1<<7)|(1<<9)
384};
385
386static inline void
387ds_configure(const struct ds_configuration *cfg)
388{
389 ds_cfg = *cfg;
390}
391
392void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
393{
394 switch (c->x86) {
395 case 0x6:
396 switch (c->x86_model) {
397#ifdef __i386__
398 case 0xD:
399 case 0xE: /* Pentium M */
400 ds_configure(&ds_cfg_pentium_m);
401 break;
402#endif /* _i386_ */
403 case 0xF: /* Core2 */
404 ds_configure(&ds_cfg_core2);
405 break;
406 default:
407 /* sorry, don't know about them */
408 break;
409 }
410 break;
411 case 0xF:
412 switch (c->x86_model) {
413#ifdef __i386__
414 case 0x0:
415 case 0x1:
416 case 0x2: /* Netburst */
417 ds_configure(&ds_cfg_netburst);
418 break;
419#endif /* _i386_ */
420 default:
421 /* sorry, don't know about them */
422 break;
423 }
424 break;
425 default:
426 /* sorry, don't know about them */
427 break;
428 }
429}