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1/* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
4 uniquely.
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
8 in standard PCI quirks
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
11
12#include <linux/pci.h>
13#include <linux/acpi.h>
14#include <linux/pci_ids.h>
15#include <asm/pci-direct.h>
dfa4698c 16#include <asm/dma.h>
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17#include <asm/io_apic.h>
18#include <asm/apic.h>
19
20#ifdef CONFIG_IOMMU
21#include <asm/iommu.h>
22#endif
dfa4698c 23
43999d9e 24static void __init via_bugs(void)
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25{
26#ifdef CONFIG_IOMMU
27 if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
28 !iommu_aperture_allowed) {
29 printk(KERN_INFO
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30 "Looks like a VIA chipset. Disabling IOMMU."
31 " Override with iommu=allowed\n");
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32 iommu_aperture_disabled = 1;
33 }
34#endif
35}
36
37#ifdef CONFIG_ACPI
38
15a58ed1 39static int __init nvidia_hpet_check(struct acpi_table_header *header)
dfa4698c 40{
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41 return 0;
42}
43#endif
44
43999d9e 45static void __init nvidia_bugs(void)
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46{
47#ifdef CONFIG_ACPI
54ef3400 48#ifdef CONFIG_X86_IO_APIC
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49 /*
50 * All timer overrides on Nvidia are
51 * wrong unless HPET is enabled.
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52 * Unfortunately that's not true on many Asus boards.
53 * We don't know yet how to detect this automatically, but
54 * at least allow a command line override.
dfa4698c 55 */
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56 if (acpi_use_timer_override)
57 return;
58
fe699336 59 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
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60 acpi_skip_timer_override = 1;
61 printk(KERN_INFO "Nvidia board "
62 "detected. Ignoring ACPI "
63 "timer override.\n");
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64 printk(KERN_INFO "If you got timer trouble "
65 "try acpi_use_timer_override\n");
dfa4698c 66 }
54ef3400 67#endif
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68#endif
69 /* RED-PEN skip them on mptables too? */
70
71}
72
43999d9e 73static void __init ati_bugs(void)
dfa4698c 74{
54ef3400 75#ifdef CONFIG_X86_IO_APIC
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76 if (timer_over_8254 == 1) {
77 timer_over_8254 = 0;
78 printk(KERN_INFO
54ef3400 79 "ATI board detected. Disabling timer routing over 8254.\n");
fea5f1e1 80 }
54ef3400 81#endif
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82}
83
84struct chipset {
85 u16 vendor;
86 void (*f)(void);
87};
88
c993c735 89static struct chipset early_qrk[] __initdata = {
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90 { PCI_VENDOR_ID_NVIDIA, nvidia_bugs },
91 { PCI_VENDOR_ID_VIA, via_bugs },
92 { PCI_VENDOR_ID_ATI, ati_bugs },
93 {}
94};
95
96void __init early_quirks(void)
97{
98 int num, slot, func;
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99
100 if (!early_pci_allowed())
101 return;
102
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103 /* Poor man's PCI discovery */
104 for (num = 0; num < 32; num++) {
105 for (slot = 0; slot < 32; slot++) {
106 for (func = 0; func < 8; func++) {
107 u32 class;
108 u32 vendor;
109 u8 type;
110 int i;
111 class = read_pci_config(num,slot,func,
112 PCI_CLASS_REVISION);
113 if (class == 0xffffffff)
114 break;
115
54ef3400 116 if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
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117 continue;
118
119 vendor = read_pci_config(num, slot, func,
120 PCI_VENDOR_ID);
121 vendor &= 0xffff;
122
123 for (i = 0; early_qrk[i].f; i++)
124 if (early_qrk[i].vendor == vendor) {
125 early_qrk[i].f();
126 return;
127 }
128
129 type = read_pci_config_byte(num, slot, func,
130 PCI_HEADER_TYPE);
131 if (!(type & 0x80))
132 break;
133 }
134 }
135 }
136}