[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / early_printk.c

#include <linux/console.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/screen_info.h>
#include <linux/usb/ch9.h>
#include <linux/pci_regs.h>
#include <linux/pci_ids.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fcntl.h>
#include <asm/setup.h>
#include <xen/hvc-console.h>
#include <asm/pci-direct.h>
#include <asm/fixmap.h>
#include <asm/intel-mid.h>
#include <asm/pgtable.h>
#include <linux/usb/ehci_def.h>
#include <linux/efi.h>
#include <asm/efi.h>
#include <asm/pci_x86.h>

/* Simple VGA output */
#define VGABASE		(__ISA_IO_base + 0xb8000)

static int max_ypos = 25, max_xpos = 80;
static int current_ypos = 25, current_xpos;

static void early_vga_write(struct console *con, const char *str, unsigned n)
{
	char c;
	int  i, k, j;

	while ((c = *str++) != '\0' && n-- > 0) {
		if (current_ypos >= max_ypos) {
			/* scroll 1 line up */
			for (k = 1, j = 0; k < max_ypos; k++, j++) {
				for (i = 0; i < max_xpos; i++) {
					writew(readw(VGABASE+2*(max_xpos*k+i)),
					       VGABASE + 2*(max_xpos*j + i));
				}
			}
			for (i = 0; i < max_xpos; i++)
				writew(0x720, VGABASE + 2*(max_xpos*j + i));
			current_ypos = max_ypos-1;
		}
#ifdef CONFIG_KGDB_KDB
		if (c == '\b') {
			if (current_xpos > 0)
				current_xpos--;
		} else if (c == '\r') {
			current_xpos = 0;
		} else
#endif
		if (c == '\n') {
			current_xpos = 0;
			current_ypos++;
		} else if (c != '\r')  {
			writew(((0x7 << 8) | (unsigned short) c),
			       VGABASE + 2*(max_xpos*current_ypos +
						current_xpos++));
			if (current_xpos >= max_xpos) {
				current_xpos = 0;
				current_ypos++;
			}
		}
	}
}

static struct console early_vga_console = {
	.name =		"earlyvga",
	.write =	early_vga_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */

static unsigned long early_serial_base = 0x3f8;  /* ttyS0 */

#define XMTRDY          0x20

#define DLAB		0x80

#define TXR             0       /*  Transmit register (WRITE) */
#define RXR             0       /*  Receive register  (READ)  */
#define IER             1       /*  Interrupt Enable          */
#define IIR             2       /*  Interrupt ID              */
#define FCR             2       /*  FIFO control              */
#define LCR             3       /*  Line control              */
#define MCR             4       /*  Modem control             */
#define LSR             5       /*  Line Status               */
#define MSR             6       /*  Modem Status              */
#define DLL             0       /*  Divisor Latch Low         */
#define DLH             1       /*  Divisor latch High        */

static unsigned int io_serial_in(unsigned long addr, int offset)
{
	return inb(addr + offset);
}

static void io_serial_out(unsigned long addr, int offset, int value)
{
	outb(value, addr + offset);
}

static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;

static int early_serial_putc(unsigned char ch)
{
	unsigned timeout = 0xffff;

	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
		cpu_relax();
	serial_out(early_serial_base, TXR, ch);
	return timeout ? 0 : -1;
}

static void early_serial_write(struct console *con, const char *s, unsigned n)
{
	while (*s && n-- > 0) {
		if (*s == '\n')
			early_serial_putc('\r');
		early_serial_putc(*s);
		s++;
	}
}

static __init void early_serial_hw_init(unsigned divisor)
{
	unsigned char c;

	serial_out(early_serial_base, LCR, 0x3);	/* 8n1 */
	serial_out(early_serial_base, IER, 0);	/* no interrupt */
	serial_out(early_serial_base, FCR, 0);	/* no fifo */
	serial_out(early_serial_base, MCR, 0x3);	/* DTR + RTS */

	c = serial_in(early_serial_base, LCR);
	serial_out(early_serial_base, LCR, c | DLAB);
	serial_out(early_serial_base, DLL, divisor & 0xff);
	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	serial_out(early_serial_base, LCR, c & ~DLAB);
}

#define DEFAULT_BAUD 9600

static __init void early_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	char *e;

	if (*s == ',')
		++s;

	if (*s) {
		unsigned port;
		if (!strncmp(s, "0x", 2)) {
			early_serial_base = simple_strtoul(s, &e, 16);
		} else {
			static const int __initconst bases[] = { 0x3f8, 0x2f8 };

			if (!strncmp(s, "ttyS", 4))
				s += 4;
			port = simple_strtoul(s, &e, 10);
			if (port > 1 || s == e)
				port = 0;
			early_serial_base = bases[port];
		}
		s += strcspn(s, ",");
		if (*s == ',')
			s++;
	}

	if (*s) {
		baud = simple_strtoull(s, &e, 0);

		if (baud == 0 || s == e)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* These will always be IO based ports */
	serial_in = io_serial_in;
	serial_out = io_serial_out;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}

#ifdef CONFIG_PCI
static void mem32_serial_out(unsigned long addr, int offset, int value)
{
	u32 *vaddr = (u32 *)addr;
	/* shift implied by pointer type */
	writel(value, vaddr + offset);
}

static unsigned int mem32_serial_in(unsigned long addr, int offset)
{
	u32 *vaddr = (u32 *)addr;
	/* shift implied by pointer type */
	return readl(vaddr + offset);
}

/*
 * early_pci_serial_init()
 *
 * This function is invoked when the early_printk param starts with "pciserial"
 * The rest of the param should be ",B:D.F,baud" where B, D & F describe the
 * location of a PCI device that must be a UART device.
 */
static __init void early_pci_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	u8 bus, slot, func;
	u32 classcode, bar0;
	u16 cmdreg;
	char *e;


	/*
	 * First, part the param to get the BDF values
	 */
	if (*s == ',')
		++s;

	if (*s == 0)
		return;

	bus = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != ':')
		return;
	++s;
	slot = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != '.')
		return;
	++s;
	func = (u8)simple_strtoul(s, &e, 16);
	s = e;

	/* A baud might be following */
	if (*s == ',')
		s++;

	/*
	 * Second, find the device from the BDF
	 */
	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

	/*
	 * Verify it is a UART type device
	 */
	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
	   (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */
		return;

	/*
	 * Determine if it is IO or memory mapped
	 */
	if (bar0 & 0x01) {
		/* it is IO mapped */
		serial_in = io_serial_in;
		serial_out = io_serial_out;
		early_serial_base = bar0&0xfffffffc;
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_IO);
	} else {
		/* It is memory mapped - assume 32-bit alignment */
		serial_in = mem32_serial_in;
		serial_out = mem32_serial_out;
		/* WARNING! assuming the address is always in the first 4G */
		early_serial_base =
			(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_MEMORY);
	}

	/*
	 * Lastly, initalize the hardware
	 */
	if (*s) {
		if (strcmp(s, "nocfg") == 0)
			/* Sometimes, we want to leave the UART alone
			 * and assume the BIOS has set it up correctly.
			 * "nocfg" tells us this is the case, and we
			 * should do no more setup.
			 */
			return;
		if (kstrtoul(s, 0, &baud) < 0 || baud == 0)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}
#endif

static struct console early_serial_console = {
	.name =		"earlyser",
	.write =	early_serial_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

static void early_console_register(struct console *con, int keep_early)
{
	if (con->index != -1) {
		printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
		       con->name);
		return;
	}
	early_console = con;
	if (keep_early)
		early_console->flags &= ~CON_BOOT;
	else
		early_console->flags |= CON_BOOT;
	register_console(early_console);
}

static int __init setup_early_printk(char *buf)
{
	int keep;

	if (!buf)
		return 0;

	if (early_console)
		return 0;

	keep = (strstr(buf, "keep") != NULL);

	while (*buf != '\0') {
		if (!strncmp(buf, "serial", 6)) {
			buf += 6;
			early_serial_init(buf);
			early_console_register(&early_serial_console, keep);
			if (!strncmp(buf, ",ttyS", 5))
				buf += 5;
		}
		if (!strncmp(buf, "ttyS", 4)) {
			early_serial_init(buf + 4);
			early_console_register(&early_serial_console, keep);
		}
#ifdef CONFIG_PCI
		if (!strncmp(buf, "pciserial", 9)) {
			early_pci_serial_init(buf + 9);
			early_console_register(&early_serial_console, keep);
			buf += 9; /* Keep from match the above "serial" */
		}
#endif
		if (!strncmp(buf, "vga", 3) &&
		    boot_params.screen_info.orig_video_isVGA == 1) {
			max_xpos = boot_params.screen_info.orig_video_cols;
			max_ypos = boot_params.screen_info.orig_video_lines;
			current_ypos = boot_params.screen_info.orig_y;
			early_console_register(&early_vga_console, keep);
		}
#ifdef CONFIG_EARLY_PRINTK_DBGP
		if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
			early_console_register(&early_dbgp_console, keep);
#endif
#ifdef CONFIG_HVC_XEN
		if (!strncmp(buf, "xen", 3))
			early_console_register(&xenboot_console, keep);
#endif
#ifdef CONFIG_EARLY_PRINTK_EFI
		if (!strncmp(buf, "efi", 3))
			early_console_register(&early_efi_console, keep);
#endif

		buf++;
	}
	return 0;
}

early_param("earlyprintk", setup_early_printk);
Commit	Line	Data
250c2277 TG	1	#include <linux/console.h>
	2	#include <linux/kernel.h>
	3	#include <linux/init.h>
	4	#include <linux/string.h>
	5	#include <linux/screen_info.h>
5c05917e YL	6	#include <linux/usb/ch9.h>
	7	#include <linux/pci_regs.h>
	8	#include <linux/pci_ids.h>
	9	#include <linux/errno.h>
250c2277 TG	10	#include <asm/io.h>
	11	#include <asm/processor.h>
	12	#include <asm/fcntl.h>
30c82645	13	#include <asm/setup.h>
250c2277	14	#include <xen/hvc-console.h>
5c05917e	15	#include <asm/pci-direct.h>
5c05917e	16	#include <asm/fixmap.h>
05454c26	17	#include <asm/intel-mid.h>
726c0d95	18	#include <asm/pgtable.h>
5c05917e	19	#include <linux/usb/ehci_def.h>
72548e83 MF	20	#include <linux/efi.h>
72548e83 MF	21	#include <asm/efi.h>
ea9e9d80	22	#include <asm/pci_x86.h>
1da177e4	23
250c2277	24	/* Simple VGA output */
250c2277 TG	25	#define VGABASE (__ISA_IO_base + 0xb8000)
	26
	27	static int max_ypos = 25, max_xpos = 80;
c9cf39ae	28	static int current_ypos = 25, current_xpos;
250c2277 TG	29
	30	static void early_vga_write(struct console con, const char str, unsigned n)
	31	{
	32	char c;
	33	int i, k, j;
	34
	35	while ((c = *str++) != '\0' && n-- > 0) {
	36	if (current_ypos >= max_ypos) {
	37	/* scroll 1 line up */
	38	for (k = 1, j = 0; k < max_ypos; k++, j++) {
	39	for (i = 0; i < max_xpos; i++) {
	40	writew(readw(VGABASE+2(max_xposk+i)),
	41	VGABASE + 2(max_xposj + i));
	42	}
	43	}
	44	for (i = 0; i < max_xpos; i++)
	45	writew(0x720, VGABASE + 2(max_xposj + i));
	46	current_ypos = max_ypos-1;
	47	}
61eaf539 JW	48	#ifdef CONFIG_KGDB_KDB
	49	if (c == '\b') {
	50	if (current_xpos > 0)
	51	current_xpos--;
	52	} else if (c == '\r') {
	53	current_xpos = 0;
	54	} else
	55	#endif
250c2277 TG	56	if (c == '\n') {
	57	current_xpos = 0;
	58	current_ypos++;
	59	} else if (c != '\r') {
	60	writew(((0x7 << 8) \| (unsigned short) c),
	61	VGABASE + 2(max_xposcurrent_ypos +
	62	current_xpos++));
	63	if (current_xpos >= max_xpos) {
	64	current_xpos = 0;
	65	current_ypos++;
	66	}
	67	}
	68	}
	69	}
	70
	71	static struct console early_vga_console = {
	72	.name = "earlyvga",
	73	.write = early_vga_write,
	74	.flags = CON_PRINTBUFFER,
	75	.index = -1,
	76	};
	77
	78	/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */
	79
ea9e9d80	80	static unsigned long early_serial_base = 0x3f8; /* ttyS0 */
250c2277 TG	81
	82	#define XMTRDY 0x20
	83
	84	#define DLAB 0x80
	85
	86	#define TXR 0 /* Transmit register (WRITE) */
	87	#define RXR 0 /* Receive register (READ) */
	88	#define IER 1 /* Interrupt Enable */
	89	#define IIR 2 /* Interrupt ID */
	90	#define FCR 2 /* FIFO control */
	91	#define LCR 3 /* Line control */
	92	#define MCR 4 /* Modem control */
	93	#define LSR 5 /* Line Status */
	94	#define MSR 6 /* Modem Status */
	95	#define DLL 0 /* Divisor Latch Low */
	96	#define DLH 1 /* Divisor latch High */
	97
ea9e9d80 SA	98	static unsigned int io_serial_in(unsigned long addr, int offset)
	99	{
	100	return inb(addr + offset);
	101	}
	102
	103	static void io_serial_out(unsigned long addr, int offset, int value)
	104	{
	105	outb(value, addr + offset);
	106	}
	107
	108	static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
	109	static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;
	110
250c2277 TG	111	static int early_serial_putc(unsigned char ch)
	112	{
	113	unsigned timeout = 0xffff;
5c05917e	114
ea9e9d80	115	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
250c2277	116	cpu_relax();
ea9e9d80	117	serial_out(early_serial_base, TXR, ch);
250c2277 TG	118	return timeout ? 0 : -1;
	119	}
	120
	121	static void early_serial_write(struct console con, const char s, unsigned n)
	122	{
	123	while (*s && n-- > 0) {
	124	if (*s == '\n')
	125	early_serial_putc('\r');
	126	early_serial_putc(*s);
	127	s++;
	128	}
	129	}
	130
ea9e9d80 SA	131	static __init void early_serial_hw_init(unsigned divisor)
	132	{
	133	unsigned char c;
	134
	135	serial_out(early_serial_base, LCR, 0x3); /* 8n1 */
	136	serial_out(early_serial_base, IER, 0); /* no interrupt */
	137	serial_out(early_serial_base, FCR, 0); /* no fifo */
	138	serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */
	139
	140	c = serial_in(early_serial_base, LCR);
	141	serial_out(early_serial_base, LCR, c \| DLAB);
	142	serial_out(early_serial_base, DLL, divisor & 0xff);
	143	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	144	serial_out(early_serial_base, LCR, c & ~DLAB);
	145	}
	146
250c2277 TG	147	#define DEFAULT_BAUD 9600
	148
	149	static __init void early_serial_init(char *s)
	150	{
250c2277	151	unsigned divisor;
ea9e9d80	152	unsigned long baud = DEFAULT_BAUD;
250c2277 TG	153	char *e;
	154
	155	if (*s == ',')
	156	++s;
	157
	158	if (*s) {
	159	unsigned port;
e941f27a	160	if (!strncmp(s, "0x", 2)) {
250c2277 TG	161	early_serial_base = simple_strtoul(s, &e, 16);
250c2277 TG	162	} else {
30cec979	163	static const int __initconst bases[] = { 0x3f8, 0x2f8 };
250c2277	164
e941f27a	165	if (!strncmp(s, "ttyS", 4))
250c2277 TG	166	s += 4;
	167	port = simple_strtoul(s, &e, 10);
	168	if (port > 1 \|\| s == e)
	169	port = 0;
	170	early_serial_base = bases[port];
	171	}
	172	s += strcspn(s, ",");
	173	if (*s == ',')
	174	s++;
	175	}
	176
ea9e9d80	177	if (*s) {
827a82ff SR	178	baud = simple_strtoull(s, &e, 0);
	179
	180	if (baud == 0 \|\| s == e)
ea9e9d80 SA	181	baud = DEFAULT_BAUD;
	182	}
	183
	184	/* Convert from baud to divisor value */
	185	divisor = 115200 / baud;
	186
	187	/* These will always be IO based ports */
	188	serial_in = io_serial_in;
	189	serial_out = io_serial_out;
	190
	191	/* Set up the HW */
	192	early_serial_hw_init(divisor);
	193	}
	194
	195	#ifdef CONFIG_PCI
7f99f8b9 ME	196	static void mem32_serial_out(unsigned long addr, int offset, int value)
	197	{
	198	u32 vaddr = (u32 )addr;
	199	/* shift implied by pointer type */
	200	writel(value, vaddr + offset);
	201	}
	202
	203	static unsigned int mem32_serial_in(unsigned long addr, int offset)
	204	{
	205	u32 vaddr = (u32 )addr;
	206	/* shift implied by pointer type */
	207	return readl(vaddr + offset);
	208	}
	209
ea9e9d80 SA	210	/*
	211	* early_pci_serial_init()
	212	*
	213	* This function is invoked when the early_printk param starts with "pciserial"
	214	* The rest of the param should be ",B:D.F,baud" where B, D & F describe the
	215	* location of a PCI device that must be a UART device.
	216	*/
	217	static __init void early_pci_serial_init(char *s)
	218	{
	219	unsigned divisor;
	220	unsigned long baud = DEFAULT_BAUD;
	221	u8 bus, slot, func;
7f99f8b9 ME	222	u32 classcode, bar0;
7f99f8b9 ME	223	u16 cmdreg;
ea9e9d80 SA	224	char *e;
	225
	226
	227	/*
	228	* First, part the param to get the BDF values
	229	*/
	230	if (*s == ',')
	231	++s;
	232
	233	if (*s == 0)
	234	return;
	235
	236	bus = (u8)simple_strtoul(s, &e, 16);
	237	s = e;
	238	if (*s != ':')
	239	return;
	240	++s;
	241	slot = (u8)simple_strtoul(s, &e, 16);
	242	s = e;
	243	if (*s != '.')
	244	return;
	245	++s;
	246	func = (u8)simple_strtoul(s, &e, 16);
	247	s = e;
250c2277	248
ea9e9d80 SA	249	/* A baud might be following */
	250	if (*s == ',')
	251	s++;
	252
	253	/*
	254	* Second, find the device from the BDF
	255	*/
	256	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	257	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	258	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
	259
	260	/*
	261	* Verify it is a UART type device
	262	*/
	263	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	264	(classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) \|\|
	265	(((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */
	266	return;
	267
	268	/*
	269	* Determine if it is IO or memory mapped
	270	*/
	271	if (bar0 & 0x01) {
	272	/* it is IO mapped */
	273	serial_in = io_serial_in;
	274	serial_out = io_serial_out;
	275	early_serial_base = bar0&0xfffffffc;
	276	write_pci_config(bus, slot, func, PCI_COMMAND,
	277	cmdreg\|PCI_COMMAND_IO);
	278	} else {
	279	/* It is memory mapped - assume 32-bit alignment */
	280	serial_in = mem32_serial_in;
	281	serial_out = mem32_serial_out;
	282	/* WARNING! assuming the address is always in the first 4G */
	283	early_serial_base =
	284	(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
	285	write_pci_config(bus, slot, func, PCI_COMMAND,
	286	cmdreg\|PCI_COMMAND_MEMORY);
	287	}
	288
	289	/*
	290	* Lastly, initalize the hardware
	291	*/
250c2277	292	if (*s) {
ea9e9d80 SA	293	if (strcmp(s, "nocfg") == 0)
	294	/* Sometimes, we want to leave the UART alone
	295	* and assume the BIOS has set it up correctly.
	296	* "nocfg" tells us this is the case, and we
	297	* should do no more setup.
	298	*/
	299	return;
	300	if (kstrtoul(s, 0, &baud) < 0 \|\| baud == 0)
250c2277 TG	301	baud = DEFAULT_BAUD;
	302	}
	303
ea9e9d80	304	/* Convert from baud to divisor value */
250c2277	305	divisor = 115200 / baud;
ea9e9d80 SA	306
	307	/* Set up the HW */
	308	early_serial_hw_init(divisor);
250c2277	309	}
ea9e9d80	310	#endif
250c2277 TG	311
	312	static struct console early_serial_console = {
	313	.name = "earlyser",
	314	.write = early_serial_write,
	315	.flags = CON_PRINTBUFFER,
	316	.index = -1,
	317	};
	318
c368ef28	319	static void early_console_register(struct console *con, int keep_early)
c9530948	320	{
d0380e6c	321	if (con->index != -1) {
429a6e5e JW	322	printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
	323	con->name);
	324	return;
	325	}
c9530948 JW	326	early_console = con;
	327	if (keep_early)
	328	early_console->flags &= ~CON_BOOT;
	329	else
	330	early_console->flags \|= CON_BOOT;
	331	register_console(early_console);
	332	}
250c2277 TG	333
	334	static int __init setup_early_printk(char *buf)
	335	{
c9530948	336	int keep;
5c05917e	337
250c2277 TG	338	if (!buf)
	339	return 0;
	340
d0380e6c	341	if (early_console)
250c2277	342	return 0;
250c2277	343
c9530948 JW	344	keep = (strstr(buf, "keep") != NULL);
	345
	346	while (*buf != '\0') {
	347	if (!strncmp(buf, "serial", 6)) {
ea3acb19 JW	348	buf += 6;
ea3acb19 JW	349	early_serial_init(buf);
c9530948	350	early_console_register(&early_serial_console, keep);
ea3acb19 JW	351	if (!strncmp(buf, ",ttyS", 5))
ea3acb19 JW	352	buf += 5;
c9530948 JW	353	}
	354	if (!strncmp(buf, "ttyS", 4)) {
	355	early_serial_init(buf + 4);
	356	early_console_register(&early_serial_console, keep);
	357	}
ea9e9d80 SA	358	#ifdef CONFIG_PCI
	359	if (!strncmp(buf, "pciserial", 9)) {
	360	early_pci_serial_init(buf + 9);
	361	early_console_register(&early_serial_console, keep);
	362	buf += 9; /* Keep from match the above "serial" */
	363	}
	364	#endif
c9530948 JW	365	if (!strncmp(buf, "vga", 3) &&
	366	boot_params.screen_info.orig_video_isVGA == 1) {
	367	max_xpos = boot_params.screen_info.orig_video_cols;
	368	max_ypos = boot_params.screen_info.orig_video_lines;
	369	current_ypos = boot_params.screen_info.orig_y;
	370	early_console_register(&early_vga_console, keep);
	371	}
5c05917e	372	#ifdef CONFIG_EARLY_PRINTK_DBGP
c9530948 JW	373	if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
c9530948 JW	374	early_console_register(&early_dbgp_console, keep);
5c05917e	375	#endif
250c2277	376	#ifdef CONFIG_HVC_XEN
c9530948 JW	377	if (!strncmp(buf, "xen", 3))
c9530948 JW	378	early_console_register(&xenboot_console, keep);
c20b5c33	379	#endif
72548e83 MF	380	#ifdef CONFIG_EARLY_PRINTK_EFI
	381	if (!strncmp(buf, "efi", 3))
	382	early_console_register(&early_efi_console, keep);
	383	#endif
	384
c9530948	385	buf++;
250c2277	386	}
250c2277 TG	387	return 0;
250c2277 TG	388	}
5c05917e	389
250c2277	390	early_param("earlyprintk", setup_early_printk);