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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 | 16 | * |
0bd7b798 AH |
17 | * A note on terminology: |
18 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
19 | * at the top of the kernel process stack. | |
0d2eb44f | 20 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 21 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
22 | * |
23 | * Some macro usage: | |
24 | * - CFI macros are used to generate dwarf2 unwind information for better | |
25 | * backtraces. They don't change any code. | |
2e91a17b AK |
26 | * - ENTRY/END Define functions in the symbol table. |
27 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
28 | * frame that is otherwise undefined after a SYSCALL | |
29 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
cb5dd2c5 | 30 | * - idtentry - Define exception entry points. |
1da177e4 LT |
31 | */ |
32 | ||
1da177e4 LT |
33 | #include <linux/linkage.h> |
34 | #include <asm/segment.h> | |
1da177e4 LT |
35 | #include <asm/cache.h> |
36 | #include <asm/errno.h> | |
37 | #include <asm/dwarf2.h> | |
38 | #include <asm/calling.h> | |
e2d5df93 | 39 | #include <asm/asm-offsets.h> |
1da177e4 LT |
40 | #include <asm/msr.h> |
41 | #include <asm/unistd.h> | |
42 | #include <asm/thread_info.h> | |
43 | #include <asm/hw_irq.h> | |
0341c14d | 44 | #include <asm/page_types.h> |
2601e64d | 45 | #include <asm/irqflags.h> |
72fe4858 | 46 | #include <asm/paravirt.h> |
9939ddaf | 47 | #include <asm/percpu.h> |
d7abc0fa | 48 | #include <asm/asm.h> |
91d1aa43 | 49 | #include <asm/context_tracking.h> |
63bcff2a | 50 | #include <asm/smap.h> |
3891a04a | 51 | #include <asm/pgtable_types.h> |
d7e7528b | 52 | #include <linux/err.h> |
1da177e4 | 53 | |
86a1c34a RM |
54 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
55 | #include <linux/elf-em.h> | |
56 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
57 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
58 | #define __AUDIT_ARCH_LE 0x40000000 | |
59 | ||
1da177e4 | 60 | .code64 |
ea714547 JO |
61 | .section .entry.text, "ax" |
62 | ||
16444a8a | 63 | |
dc37db4d | 64 | #ifndef CONFIG_PREEMPT |
1da177e4 | 65 | #define retint_kernel retint_restore_args |
0bd7b798 | 66 | #endif |
2601e64d | 67 | |
72fe4858 | 68 | #ifdef CONFIG_PARAVIRT |
2be29982 | 69 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
70 | swapgs |
71 | sysretq | |
b3baaa13 | 72 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
73 | #endif /* CONFIG_PARAVIRT */ |
74 | ||
2601e64d | 75 | |
f2db9382 | 76 | .macro TRACE_IRQS_IRETQ |
2601e64d | 77 | #ifdef CONFIG_TRACE_IRQFLAGS |
f2db9382 | 78 | bt $9,EFLAGS(%rsp) /* interrupts off? */ |
2601e64d IM |
79 | jnc 1f |
80 | TRACE_IRQS_ON | |
81 | 1: | |
82 | #endif | |
83 | .endm | |
84 | ||
5963e317 SR |
85 | /* |
86 | * When dynamic function tracer is enabled it will add a breakpoint | |
87 | * to all locations that it is about to modify, sync CPUs, update | |
88 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
89 | * if lockdep is enabled, it might jump back into the debug handler | |
90 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
91 | * | |
92 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
93 | * make sure the stack pointer does not get reset back to the top | |
94 | * of the debug stack, and instead just reuses the current stack. | |
95 | */ | |
96 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
97 | ||
98 | .macro TRACE_IRQS_OFF_DEBUG | |
99 | call debug_stack_set_zero | |
100 | TRACE_IRQS_OFF | |
101 | call debug_stack_reset | |
102 | .endm | |
103 | ||
104 | .macro TRACE_IRQS_ON_DEBUG | |
105 | call debug_stack_set_zero | |
106 | TRACE_IRQS_ON | |
107 | call debug_stack_reset | |
108 | .endm | |
109 | ||
f2db9382 DV |
110 | .macro TRACE_IRQS_IRETQ_DEBUG |
111 | bt $9,EFLAGS(%rsp) /* interrupts off? */ | |
5963e317 SR |
112 | jnc 1f |
113 | TRACE_IRQS_ON_DEBUG | |
114 | 1: | |
115 | .endm | |
116 | ||
117 | #else | |
118 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
119 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
120 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
121 | #endif | |
122 | ||
1da177e4 | 123 | /* |
0bd7b798 AH |
124 | * C code is not supposed to know about undefined top of stack. Every time |
125 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
126 | * fast path FIXUP_TOP_OF_STACK is needed. |
127 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
128 | * manipulation. | |
0bd7b798 AH |
129 | */ |
130 | ||
131 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 132 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 133 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
134 | movq \tmp,RSP+\offset(%rsp) |
135 | movq $__USER_DS,SS+\offset(%rsp) | |
136 | movq $__USER_CS,CS+\offset(%rsp) | |
0fcedc86 AL |
137 | movq RIP+\offset(%rsp),\tmp /* get rip */ |
138 | movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */ | |
c002a1e6 AH |
139 | movq R11+\offset(%rsp),\tmp /* get eflags */ |
140 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
141 | .endm |
142 | ||
c002a1e6 AH |
143 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
144 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 145 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
146 | movq EFLAGS+\offset(%rsp),\tmp |
147 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
148 | .endm |
149 | ||
dcd072e2 | 150 | /* |
e90e147c | 151 | * empty frame |
dcd072e2 AH |
152 | */ |
153 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 154 | .if \start |
dcd072e2 | 155 | CFI_STARTPROC simple |
adf14236 | 156 | CFI_SIGNAL_FRAME |
dcd072e2 | 157 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 158 | .else |
dcd072e2 | 159 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 160 | .endif |
1da177e4 | 161 | .endm |
d99015b1 AH |
162 | |
163 | /* | |
dcd072e2 | 164 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 165 | */ |
dcd072e2 | 166 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
167 | EMPTY_FRAME \start, SS+8+\offset-RIP |
168 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
169 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
170 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
171 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
172 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
173 | .endm |
174 | ||
d99015b1 AH |
175 | /* |
176 | * initial frame state for exceptions with error code (and interrupts | |
177 | * with vector already pushed) | |
178 | */ | |
dcd072e2 | 179 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 180 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
181 | .endm |
182 | ||
183 | /* | |
76f5df43 | 184 | * frame that enables passing a complete pt_regs to a C function. |
dcd072e2 | 185 | */ |
76f5df43 | 186 | .macro DEFAULT_FRAME start=1 offset=0 |
f2db9382 DV |
187 | XCPT_FRAME \start, ORIG_RAX+\offset |
188 | CFI_REL_OFFSET rdi, RDI+\offset | |
189 | CFI_REL_OFFSET rsi, RSI+\offset | |
190 | CFI_REL_OFFSET rdx, RDX+\offset | |
191 | CFI_REL_OFFSET rcx, RCX+\offset | |
192 | CFI_REL_OFFSET rax, RAX+\offset | |
193 | CFI_REL_OFFSET r8, R8+\offset | |
194 | CFI_REL_OFFSET r9, R9+\offset | |
195 | CFI_REL_OFFSET r10, R10+\offset | |
196 | CFI_REL_OFFSET r11, R11+\offset | |
dcd072e2 AH |
197 | CFI_REL_OFFSET rbx, RBX+\offset |
198 | CFI_REL_OFFSET rbp, RBP+\offset | |
199 | CFI_REL_OFFSET r12, R12+\offset | |
200 | CFI_REL_OFFSET r13, R13+\offset | |
201 | CFI_REL_OFFSET r14, R14+\offset | |
202 | CFI_REL_OFFSET r15, R15+\offset | |
203 | .endm | |
d99015b1 | 204 | |
1da177e4 | 205 | /* |
b87cf63e | 206 | * 64bit SYSCALL instruction entry. Up to 6 arguments in registers. |
1da177e4 | 207 | * |
b87cf63e DV |
208 | * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, |
209 | * then loads new ss, cs, and rip from previously programmed MSRs. | |
210 | * rflags gets masked by a value from another MSR (so CLD and CLAC | |
211 | * are not needed). SYSCALL does not save anything on the stack | |
212 | * and does not change rsp. | |
213 | * | |
214 | * Registers on entry: | |
1da177e4 | 215 | * rax system call number |
b87cf63e DV |
216 | * rcx return address |
217 | * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) | |
1da177e4 | 218 | * rdi arg0 |
1da177e4 | 219 | * rsi arg1 |
0bd7b798 | 220 | * rdx arg2 |
b87cf63e | 221 | * r10 arg3 (needs to be moved to rcx to conform to C ABI) |
1da177e4 LT |
222 | * r8 arg4 |
223 | * r9 arg5 | |
b87cf63e | 224 | * (note: r12-r15,rbp,rbx are callee-preserved in C ABI) |
0bd7b798 | 225 | * |
1da177e4 LT |
226 | * Interrupts are off on entry. |
227 | * Only called from user space. | |
228 | * | |
229 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
230 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
231 | * |
232 | * When user can change the frames always force IRET. That is because | |
233 | * it deals with uncanonical addresses better. SYSRET has trouble | |
234 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 235 | */ |
1da177e4 LT |
236 | |
237 | ENTRY(system_call) | |
7effaa88 | 238 | CFI_STARTPROC simple |
adf14236 | 239 | CFI_SIGNAL_FRAME |
9af45651 | 240 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
241 | CFI_REGISTER rip,rcx |
242 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
243 | SWAPGS_UNSAFE_STACK |
244 | /* | |
245 | * A hypervisor implementation might want to use a label | |
246 | * after the swapgs, so that it can do the swapgs | |
247 | * for the guest and jump here on syscall. | |
248 | */ | |
f6b2bc84 | 249 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 250 | |
3d1e42a7 | 251 | movq %rsp,PER_CPU_VAR(old_rsp) |
b87cf63e | 252 | /* kernel_stack is set so that 5 slots (iret frame) are preallocated */ |
9af45651 | 253 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
254 | /* |
255 | * No need to follow this irqs off/on section - it's straight | |
256 | * and short: | |
257 | */ | |
72fe4858 | 258 | ENABLE_INTERRUPTS(CLBR_NONE) |
b87cf63e | 259 | ALLOC_PT_GPREGS_ON_STACK 8 /* +8: space for orig_ax */ |
76f5df43 | 260 | SAVE_C_REGS_EXCEPT_RAX_RCX |
f2db9382 DV |
261 | movq $-ENOSYS,RAX(%rsp) |
262 | movq_cfi rax,ORIG_RAX | |
263 | movq %rcx,RIP(%rsp) | |
264 | CFI_REL_OFFSET rip,RIP | |
265 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP) | |
1da177e4 | 266 | jnz tracesys |
86a1c34a | 267 | system_call_fastpath: |
fca460f9 | 268 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 269 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
270 | #else |
271 | andl $__SYSCALL_MASK,%eax | |
272 | cmpl $__NR_syscall_max,%eax | |
273 | #endif | |
54eea995 | 274 | ja ret_from_sys_call /* and return regs->ax */ |
1da177e4 LT |
275 | movq %r10,%rcx |
276 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
f2db9382 | 277 | movq %rax,RAX(%rsp) |
1da177e4 LT |
278 | /* |
279 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
280 | * Has incomplete stack frame and undefined top of stack. |
281 | */ | |
1da177e4 | 282 | ret_from_sys_call: |
f2db9382 | 283 | testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP) |
96b6352c AL |
284 | jnz int_ret_from_sys_call_fixup /* Go the the slow path */ |
285 | ||
10cd706d | 286 | LOCKDEP_SYS_EXIT |
72fe4858 | 287 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 288 | TRACE_IRQS_OFF |
bcddc015 | 289 | CFI_REMEMBER_STATE |
2601e64d IM |
290 | /* |
291 | * sysretq will re-enable interrupts: | |
292 | */ | |
293 | TRACE_IRQS_ON | |
76f5df43 | 294 | RESTORE_C_REGS_EXCEPT_RCX |
f2db9382 | 295 | movq RIP(%rsp),%rcx |
7effaa88 | 296 | CFI_REGISTER rip,rcx |
7effaa88 | 297 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 298 | movq PER_CPU_VAR(old_rsp), %rsp |
b87cf63e DV |
299 | /* |
300 | * 64bit SYSRET restores rip from rcx, | |
301 | * rflags from r11 (but RF and VM bits are forced to 0), | |
302 | * cs and ss are loaded from MSRs. | |
303 | */ | |
2be29982 | 304 | USERGS_SYSRET64 |
1da177e4 | 305 | |
bcddc015 | 306 | CFI_RESTORE_STATE |
1da177e4 | 307 | |
96b6352c | 308 | int_ret_from_sys_call_fixup: |
f2db9382 | 309 | FIXUP_TOP_OF_STACK %r11 |
96b6352c | 310 | jmp int_ret_from_sys_call |
86a1c34a | 311 | |
1da177e4 | 312 | /* Do syscall tracing */ |
0bd7b798 | 313 | tracesys: |
76f5df43 | 314 | movq %rsp, %rdi |
1dcf74f6 AL |
315 | movq $AUDIT_ARCH_X86_64, %rsi |
316 | call syscall_trace_enter_phase1 | |
317 | test %rax, %rax | |
318 | jnz tracesys_phase2 /* if needed, run the slow path */ | |
76f5df43 | 319 | RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */ |
f2db9382 | 320 | movq ORIG_RAX(%rsp), %rax |
1dcf74f6 AL |
321 | jmp system_call_fastpath /* and return to the fast path */ |
322 | ||
323 | tracesys_phase2: | |
76f5df43 | 324 | SAVE_EXTRA_REGS |
1da177e4 | 325 | FIXUP_TOP_OF_STACK %rdi |
1dcf74f6 AL |
326 | movq %rsp, %rdi |
327 | movq $AUDIT_ARCH_X86_64, %rsi | |
328 | movq %rax,%rdx | |
329 | call syscall_trace_enter_phase2 | |
330 | ||
d4d67150 | 331 | /* |
e90e147c | 332 | * Reload registers from stack in case ptrace changed them. |
1dcf74f6 | 333 | * We don't reload %rax because syscall_trace_entry_phase2() returned |
d4d67150 RM |
334 | * the value it wants us to use in the table lookup. |
335 | */ | |
76f5df43 DV |
336 | RESTORE_C_REGS_EXCEPT_RAX |
337 | RESTORE_EXTRA_REGS | |
fca460f9 | 338 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 339 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
340 | #else |
341 | andl $__SYSCALL_MASK,%eax | |
342 | cmpl $__NR_syscall_max,%eax | |
343 | #endif | |
54eea995 | 344 | ja int_ret_from_sys_call /* RAX(%rsp) is already set */ |
1da177e4 LT |
345 | movq %r10,%rcx /* fixup for C */ |
346 | call *sys_call_table(,%rax,8) | |
f2db9382 | 347 | movq %rax,RAX(%rsp) |
7bf36bbc | 348 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
349 | |
350 | /* | |
1da177e4 LT |
351 | * Syscall return path ending with IRET. |
352 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 353 | */ |
bc8b2b92 | 354 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 355 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 356 | TRACE_IRQS_OFF |
1da177e4 LT |
357 | movl $_TIF_ALLWORK_MASK,%edi |
358 | /* edi: mask to check */ | |
bc8b2b92 | 359 | GLOBAL(int_with_check) |
10cd706d | 360 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 361 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 362 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
363 | andl %edi,%edx |
364 | jnz int_careful | |
26ccb8a7 | 365 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
366 | jmp retint_swapgs |
367 | ||
368 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
369 | /* First do a reschedule test. */ | |
370 | /* edx: work, edi: workmask */ | |
371 | int_careful: | |
372 | bt $TIF_NEED_RESCHED,%edx | |
373 | jnc int_very_careful | |
2601e64d | 374 | TRACE_IRQS_ON |
72fe4858 | 375 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 376 | pushq_cfi %rdi |
0430499c | 377 | SCHEDULE_USER |
df5d1874 | 378 | popq_cfi %rdi |
72fe4858 | 379 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 380 | TRACE_IRQS_OFF |
1da177e4 LT |
381 | jmp int_with_check |
382 | ||
383 | /* handle signals and tracing -- both require a full stack frame */ | |
384 | int_very_careful: | |
2601e64d | 385 | TRACE_IRQS_ON |
72fe4858 | 386 | ENABLE_INTERRUPTS(CLBR_NONE) |
76f5df43 | 387 | SAVE_EXTRA_REGS |
0bd7b798 | 388 | /* Check for syscall exit trace */ |
d4d67150 | 389 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 390 | jz int_signal |
df5d1874 | 391 | pushq_cfi %rdi |
0bd7b798 | 392 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 393 | call syscall_trace_leave |
df5d1874 | 394 | popq_cfi %rdi |
d4d67150 | 395 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 396 | jmp int_restore_rest |
0bd7b798 | 397 | |
1da177e4 | 398 | int_signal: |
8f4d37ec | 399 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
400 | jz 1f |
401 | movq %rsp,%rdi # &ptregs -> arg1 | |
402 | xorl %esi,%esi # oldset -> arg2 | |
403 | call do_notify_resume | |
eca91e78 | 404 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 | 405 | int_restore_rest: |
76f5df43 | 406 | RESTORE_EXTRA_REGS |
72fe4858 | 407 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 408 | TRACE_IRQS_OFF |
1da177e4 LT |
409 | jmp int_with_check |
410 | CFI_ENDPROC | |
bcddc015 | 411 | END(system_call) |
0bd7b798 | 412 | |
1d4b4b29 AV |
413 | .macro FORK_LIKE func |
414 | ENTRY(stub_\func) | |
415 | CFI_STARTPROC | |
76f5df43 DV |
416 | DEFAULT_FRAME 0, 8 /* offset 8: return address */ |
417 | SAVE_EXTRA_REGS 8 | |
1d4b4b29 | 418 | FIXUP_TOP_OF_STACK %r11, 8 |
1d4b4b29 AV |
419 | call sys_\func |
420 | RESTORE_TOP_OF_STACK %r11, 8 | |
76f5df43 | 421 | ret |
1d4b4b29 AV |
422 | CFI_ENDPROC |
423 | END(stub_\func) | |
424 | .endm | |
425 | ||
b3af11af AV |
426 | .macro FIXED_FRAME label,func |
427 | ENTRY(\label) | |
428 | CFI_STARTPROC | |
76f5df43 | 429 | DEFAULT_FRAME 0, 8 /* offset 8: return address */ |
f2db9382 | 430 | FIXUP_TOP_OF_STACK %r11, 8 |
b3af11af | 431 | call \func |
f2db9382 | 432 | RESTORE_TOP_OF_STACK %r11, 8 |
b3af11af AV |
433 | ret |
434 | CFI_ENDPROC | |
435 | END(\label) | |
436 | .endm | |
437 | ||
1d4b4b29 AV |
438 | FORK_LIKE clone |
439 | FORK_LIKE fork | |
440 | FORK_LIKE vfork | |
b3af11af | 441 | FIXED_FRAME stub_iopl, sys_iopl |
1da177e4 | 442 | |
1da177e4 LT |
443 | ENTRY(stub_execve) |
444 | CFI_STARTPROC | |
e6b04b6b | 445 | addq $8, %rsp |
76f5df43 DV |
446 | DEFAULT_FRAME 0 |
447 | SAVE_EXTRA_REGS | |
1da177e4 LT |
448 | FIXUP_TOP_OF_STACK %r11 |
449 | call sys_execve | |
1da177e4 | 450 | movq %rax,RAX(%rsp) |
76f5df43 | 451 | RESTORE_EXTRA_REGS |
1da177e4 LT |
452 | jmp int_ret_from_sys_call |
453 | CFI_ENDPROC | |
4b787e0b | 454 | END(stub_execve) |
0bd7b798 | 455 | |
27d6ec7a DD |
456 | ENTRY(stub_execveat) |
457 | CFI_STARTPROC | |
458 | addq $8, %rsp | |
76f5df43 DV |
459 | DEFAULT_FRAME 0 |
460 | SAVE_EXTRA_REGS | |
27d6ec7a DD |
461 | FIXUP_TOP_OF_STACK %r11 |
462 | call sys_execveat | |
463 | RESTORE_TOP_OF_STACK %r11 | |
464 | movq %rax,RAX(%rsp) | |
76f5df43 | 465 | RESTORE_EXTRA_REGS |
27d6ec7a DD |
466 | jmp int_ret_from_sys_call |
467 | CFI_ENDPROC | |
468 | END(stub_execveat) | |
469 | ||
1da177e4 LT |
470 | /* |
471 | * sigreturn is special because it needs to restore all registers on return. | |
472 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 473 | */ |
1da177e4 LT |
474 | ENTRY(stub_rt_sigreturn) |
475 | CFI_STARTPROC | |
7effaa88 | 476 | addq $8, %rsp |
76f5df43 DV |
477 | DEFAULT_FRAME 0 |
478 | SAVE_EXTRA_REGS | |
1da177e4 LT |
479 | FIXUP_TOP_OF_STACK %r11 |
480 | call sys_rt_sigreturn | |
481 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
76f5df43 | 482 | RESTORE_EXTRA_REGS |
1da177e4 LT |
483 | jmp int_ret_from_sys_call |
484 | CFI_ENDPROC | |
4b787e0b | 485 | END(stub_rt_sigreturn) |
1da177e4 | 486 | |
c5a37394 | 487 | #ifdef CONFIG_X86_X32_ABI |
c5a37394 PA |
488 | ENTRY(stub_x32_rt_sigreturn) |
489 | CFI_STARTPROC | |
490 | addq $8, %rsp | |
76f5df43 DV |
491 | DEFAULT_FRAME 0 |
492 | SAVE_EXTRA_REGS | |
c5a37394 PA |
493 | FIXUP_TOP_OF_STACK %r11 |
494 | call sys32_x32_rt_sigreturn | |
495 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
76f5df43 | 496 | RESTORE_EXTRA_REGS |
c5a37394 PA |
497 | jmp int_ret_from_sys_call |
498 | CFI_ENDPROC | |
499 | END(stub_x32_rt_sigreturn) | |
500 | ||
d1a797f3 PA |
501 | ENTRY(stub_x32_execve) |
502 | CFI_STARTPROC | |
503 | addq $8, %rsp | |
76f5df43 DV |
504 | DEFAULT_FRAME 0 |
505 | SAVE_EXTRA_REGS | |
d1a797f3 | 506 | FIXUP_TOP_OF_STACK %r11 |
6783eaa2 | 507 | call compat_sys_execve |
d1a797f3 PA |
508 | RESTORE_TOP_OF_STACK %r11 |
509 | movq %rax,RAX(%rsp) | |
76f5df43 | 510 | RESTORE_EXTRA_REGS |
d1a797f3 PA |
511 | jmp int_ret_from_sys_call |
512 | CFI_ENDPROC | |
513 | END(stub_x32_execve) | |
514 | ||
27d6ec7a DD |
515 | ENTRY(stub_x32_execveat) |
516 | CFI_STARTPROC | |
517 | addq $8, %rsp | |
76f5df43 DV |
518 | DEFAULT_FRAME 0 |
519 | SAVE_EXTRA_REGS | |
27d6ec7a DD |
520 | FIXUP_TOP_OF_STACK %r11 |
521 | call compat_sys_execveat | |
522 | RESTORE_TOP_OF_STACK %r11 | |
523 | movq %rax,RAX(%rsp) | |
76f5df43 | 524 | RESTORE_EXTRA_REGS |
27d6ec7a DD |
525 | jmp int_ret_from_sys_call |
526 | CFI_ENDPROC | |
527 | END(stub_x32_execveat) | |
528 | ||
c5a37394 PA |
529 | #endif |
530 | ||
1eeb207f DV |
531 | /* |
532 | * A newly forked process directly context switches into this address. | |
533 | * | |
534 | * rdi: prev task we switched from | |
535 | */ | |
536 | ENTRY(ret_from_fork) | |
537 | DEFAULT_FRAME | |
538 | ||
539 | LOCK ; btr $TIF_FORK,TI_flags(%r8) | |
540 | ||
541 | pushq_cfi $0x0002 | |
542 | popfq_cfi # reset kernel eflags | |
543 | ||
544 | call schedule_tail # rdi: 'prev' task parameter | |
545 | ||
546 | GET_THREAD_INFO(%rcx) | |
547 | ||
548 | RESTORE_EXTRA_REGS | |
549 | ||
550 | testl $3,CS(%rsp) # from kernel_thread? | |
551 | jz 1f | |
552 | ||
553 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
554 | jnz int_ret_from_sys_call | |
555 | ||
556 | RESTORE_TOP_OF_STACK %rdi | |
557 | jmp ret_from_sys_call # go to the SYSRET fastpath | |
558 | ||
559 | 1: | |
560 | movq %rbp, %rdi | |
561 | call *%rbx | |
562 | movl $0, RAX(%rsp) | |
563 | RESTORE_EXTRA_REGS | |
564 | jmp int_ret_from_sys_call | |
565 | CFI_ENDPROC | |
566 | END(ret_from_fork) | |
567 | ||
939b7871 PA |
568 | /* |
569 | * Build the entry stubs and pointer table with some assembler magic. | |
570 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
571 | * single cache line on all modern x86 implementations. | |
572 | */ | |
573 | .section .init.rodata,"a" | |
574 | ENTRY(interrupt) | |
ea714547 | 575 | .section .entry.text |
939b7871 PA |
576 | .p2align 5 |
577 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
578 | ENTRY(irq_entries_start) | |
579 | INTR_FRAME | |
580 | vector=FIRST_EXTERNAL_VECTOR | |
2414e021 | 581 | .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7 |
939b7871 PA |
582 | .balign 32 |
583 | .rept 7 | |
2414e021 | 584 | .if vector < FIRST_SYSTEM_VECTOR |
8665596e | 585 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
586 | CFI_ADJUST_CFA_OFFSET -8 |
587 | .endif | |
df5d1874 | 588 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 589 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
590 | jmp 2f |
591 | .endif | |
592 | .previous | |
593 | .quad 1b | |
ea714547 | 594 | .section .entry.text |
939b7871 PA |
595 | vector=vector+1 |
596 | .endif | |
597 | .endr | |
598 | 2: jmp common_interrupt | |
599 | .endr | |
600 | CFI_ENDPROC | |
601 | END(irq_entries_start) | |
602 | ||
603 | .previous | |
604 | END(interrupt) | |
605 | .previous | |
606 | ||
d99015b1 | 607 | /* |
1da177e4 LT |
608 | * Interrupt entry/exit. |
609 | * | |
610 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
611 | * |
612 | * Entry runs with interrupts off. | |
613 | */ | |
1da177e4 | 614 | |
722024db | 615 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 616 | .macro interrupt func |
f6f64681 | 617 | cld |
e90e147c DV |
618 | /* |
619 | * Since nothing in interrupt handling code touches r12...r15 members | |
620 | * of "struct pt_regs", and since interrupts can nest, we can save | |
621 | * four stack slots and simultaneously provide | |
622 | * an unwind-friendly stack layout by saving "truncated" pt_regs | |
623 | * exactly up to rbp slot, without these members. | |
624 | */ | |
76f5df43 DV |
625 | ALLOC_PT_GPREGS_ON_STACK -RBP |
626 | SAVE_C_REGS -RBP | |
627 | /* this goes to 0(%rsp) for unwinder, not for saving the value: */ | |
628 | SAVE_EXTRA_REGS_RBP -RBP | |
629 | ||
630 | leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */ | |
f6f64681 | 631 | |
76f5df43 | 632 | testl $3, CS-RBP(%rsp) |
f6f64681 DV |
633 | je 1f |
634 | SWAPGS | |
76f5df43 | 635 | 1: |
f6f64681 | 636 | /* |
e90e147c | 637 | * Save previous stack pointer, optionally switch to interrupt stack. |
f6f64681 DV |
638 | * irq_count is used to check if a CPU is already on an interrupt stack |
639 | * or not. While this is essentially redundant with preempt_count it is | |
640 | * a little cheaper to use a separate counter in the PDA (short of | |
641 | * moving irq_enter into assembly, which would be too much work) | |
642 | */ | |
76f5df43 DV |
643 | movq %rsp, %rsi |
644 | incl PER_CPU_VAR(irq_count) | |
f6f64681 DV |
645 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
646 | CFI_DEF_CFA_REGISTER rsi | |
f6f64681 DV |
647 | pushq %rsi |
648 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ | |
649 | 0x77 /* DW_OP_breg7 */, 0, \ | |
650 | 0x06 /* DW_OP_deref */, \ | |
651 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
652 | 0x22 /* DW_OP_plus */ | |
653 | /* We entered an interrupt context - irqs are off: */ | |
654 | TRACE_IRQS_OFF | |
655 | ||
1da177e4 LT |
656 | call \func |
657 | .endm | |
658 | ||
722024db AH |
659 | /* |
660 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
661 | * then jump to common_interrupt. | |
662 | */ | |
939b7871 PA |
663 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
664 | common_interrupt: | |
7effaa88 | 665 | XCPT_FRAME |
ee4eb87b | 666 | ASM_CLAC |
722024db | 667 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 668 | interrupt do_IRQ |
f2db9382 | 669 | /* 0(%rsp): old_rsp */ |
7effaa88 | 670 | ret_from_intr: |
72fe4858 | 671 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 672 | TRACE_IRQS_OFF |
56895530 | 673 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 674 | |
a2bbe750 FW |
675 | /* Restore saved previous stack */ |
676 | popq %rsi | |
928282e4 | 677 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
e90e147c | 678 | /* return code expects complete pt_regs - adjust rsp accordingly: */ |
f2db9382 | 679 | leaq -RBP(%rsi),%rsp |
7effaa88 | 680 | CFI_DEF_CFA_REGISTER rsp |
f2db9382 | 681 | CFI_ADJUST_CFA_OFFSET RBP |
625dbc3b | 682 | |
7effaa88 | 683 | exit_intr: |
1da177e4 | 684 | GET_THREAD_INFO(%rcx) |
f2db9382 | 685 | testl $3,CS(%rsp) |
1da177e4 | 686 | je retint_kernel |
0bd7b798 | 687 | |
1da177e4 LT |
688 | /* Interrupt came from user space */ |
689 | /* | |
e90e147c | 690 | * Has a correct top of stack. |
1da177e4 | 691 | * %rcx: thread info. Interrupts off. |
0bd7b798 | 692 | */ |
1da177e4 LT |
693 | retint_with_reschedule: |
694 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 695 | retint_check: |
10cd706d | 696 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 697 | movl TI_flags(%rcx),%edx |
1da177e4 | 698 | andl %edi,%edx |
7effaa88 | 699 | CFI_REMEMBER_STATE |
1da177e4 | 700 | jnz retint_careful |
10cd706d PZ |
701 | |
702 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
703 | /* |
704 | * The iretq could re-enable interrupts: | |
705 | */ | |
72fe4858 | 706 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 707 | TRACE_IRQS_IRETQ |
2a23c6b8 AL |
708 | |
709 | /* | |
710 | * Try to use SYSRET instead of IRET if we're returning to | |
711 | * a completely clean 64-bit userspace context. | |
712 | */ | |
f2db9382 DV |
713 | movq RCX(%rsp),%rcx |
714 | cmpq %rcx,RIP(%rsp) /* RCX == RIP */ | |
2a23c6b8 AL |
715 | jne opportunistic_sysret_failed |
716 | ||
717 | /* | |
718 | * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP | |
719 | * in kernel space. This essentially lets the user take over | |
720 | * the kernel, since userspace controls RSP. It's not worth | |
721 | * testing for canonicalness exactly -- this check detects any | |
722 | * of the 17 high bits set, which is true for non-canonical | |
723 | * or kernel addresses. (This will pessimize vsyscall=native. | |
724 | * Big deal.) | |
725 | * | |
726 | * If virtual addresses ever become wider, this will need | |
727 | * to be updated to remain correct on both old and new CPUs. | |
728 | */ | |
729 | .ifne __VIRTUAL_MASK_SHIFT - 47 | |
730 | .error "virtual address width changed -- sysret checks need update" | |
731 | .endif | |
732 | shr $__VIRTUAL_MASK_SHIFT, %rcx | |
733 | jnz opportunistic_sysret_failed | |
734 | ||
f2db9382 | 735 | cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */ |
2a23c6b8 AL |
736 | jne opportunistic_sysret_failed |
737 | ||
f2db9382 DV |
738 | movq R11(%rsp),%r11 |
739 | cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */ | |
2a23c6b8 AL |
740 | jne opportunistic_sysret_failed |
741 | ||
f2db9382 | 742 | testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */ |
2a23c6b8 AL |
743 | jnz opportunistic_sysret_failed |
744 | ||
745 | /* nothing to check for RSP */ | |
746 | ||
f2db9382 | 747 | cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */ |
2a23c6b8 AL |
748 | jne opportunistic_sysret_failed |
749 | ||
750 | /* | |
751 | * We win! This label is here just for ease of understanding | |
752 | * perf profiles. Nothing jumps here. | |
753 | */ | |
754 | irq_return_via_sysret: | |
755 | CFI_REMEMBER_STATE | |
76f5df43 DV |
756 | RESTORE_C_REGS |
757 | REMOVE_PT_GPREGS_FROM_STACK 8 | |
2a23c6b8 AL |
758 | movq (RSP-RIP)(%rsp),%rsp |
759 | USERGS_SYSRET64 | |
760 | CFI_RESTORE_STATE | |
761 | ||
762 | opportunistic_sysret_failed: | |
72fe4858 | 763 | SWAPGS |
2601e64d IM |
764 | jmp restore_args |
765 | ||
10cd706d | 766 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 767 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
768 | /* |
769 | * The iretq could re-enable interrupts: | |
770 | */ | |
771 | TRACE_IRQS_IRETQ | |
772 | restore_args: | |
76f5df43 DV |
773 | RESTORE_C_REGS |
774 | REMOVE_PT_GPREGS_FROM_STACK 8 | |
3701d863 | 775 | |
f7f3d791 | 776 | irq_return: |
7209a75d AL |
777 | INTERRUPT_RETURN |
778 | ||
779 | ENTRY(native_iret) | |
3891a04a PA |
780 | /* |
781 | * Are we returning to a stack segment from the LDT? Note: in | |
782 | * 64-bit mode SS:RSP on the exception stack is always valid. | |
783 | */ | |
34273f41 | 784 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a | 785 | testb $4,(SS-RIP)(%rsp) |
7209a75d | 786 | jnz native_irq_return_ldt |
34273f41 | 787 | #endif |
3891a04a | 788 | |
af726f21 | 789 | .global native_irq_return_iret |
7209a75d | 790 | native_irq_return_iret: |
b645af2d AL |
791 | /* |
792 | * This may fault. Non-paranoid faults on return to userspace are | |
793 | * handled by fixup_bad_iret. These include #SS, #GP, and #NP. | |
794 | * Double-faults due to espfix64 are handled in do_double_fault. | |
795 | * Other faults here are fatal. | |
796 | */ | |
1da177e4 | 797 | iretq |
3701d863 | 798 | |
34273f41 | 799 | #ifdef CONFIG_X86_ESPFIX64 |
7209a75d | 800 | native_irq_return_ldt: |
3891a04a PA |
801 | pushq_cfi %rax |
802 | pushq_cfi %rdi | |
803 | SWAPGS | |
804 | movq PER_CPU_VAR(espfix_waddr),%rdi | |
805 | movq %rax,(0*8)(%rdi) /* RAX */ | |
806 | movq (2*8)(%rsp),%rax /* RIP */ | |
807 | movq %rax,(1*8)(%rdi) | |
808 | movq (3*8)(%rsp),%rax /* CS */ | |
809 | movq %rax,(2*8)(%rdi) | |
810 | movq (4*8)(%rsp),%rax /* RFLAGS */ | |
811 | movq %rax,(3*8)(%rdi) | |
812 | movq (6*8)(%rsp),%rax /* SS */ | |
813 | movq %rax,(5*8)(%rdi) | |
814 | movq (5*8)(%rsp),%rax /* RSP */ | |
815 | movq %rax,(4*8)(%rdi) | |
816 | andl $0xffff0000,%eax | |
817 | popq_cfi %rdi | |
818 | orq PER_CPU_VAR(espfix_stack),%rax | |
819 | SWAPGS | |
820 | movq %rax,%rsp | |
821 | popq_cfi %rax | |
7209a75d | 822 | jmp native_irq_return_iret |
34273f41 | 823 | #endif |
3891a04a | 824 | |
7effaa88 | 825 | /* edi: workmask, edx: work */ |
1da177e4 | 826 | retint_careful: |
7effaa88 | 827 | CFI_RESTORE_STATE |
1da177e4 LT |
828 | bt $TIF_NEED_RESCHED,%edx |
829 | jnc retint_signal | |
2601e64d | 830 | TRACE_IRQS_ON |
72fe4858 | 831 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 832 | pushq_cfi %rdi |
0430499c | 833 | SCHEDULE_USER |
df5d1874 | 834 | popq_cfi %rdi |
1da177e4 | 835 | GET_THREAD_INFO(%rcx) |
72fe4858 | 836 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 837 | TRACE_IRQS_OFF |
1da177e4 | 838 | jmp retint_check |
0bd7b798 | 839 | |
1da177e4 | 840 | retint_signal: |
8f4d37ec | 841 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 842 | jz retint_swapgs |
2601e64d | 843 | TRACE_IRQS_ON |
72fe4858 | 844 | ENABLE_INTERRUPTS(CLBR_NONE) |
76f5df43 | 845 | SAVE_EXTRA_REGS |
0bd7b798 | 846 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 847 | xorl %esi,%esi # oldset |
1da177e4 LT |
848 | movq %rsp,%rdi # &pt_regs |
849 | call do_notify_resume | |
76f5df43 | 850 | RESTORE_EXTRA_REGS |
72fe4858 | 851 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 852 | TRACE_IRQS_OFF |
be9e6870 | 853 | GET_THREAD_INFO(%rcx) |
eca91e78 | 854 | jmp retint_with_reschedule |
1da177e4 LT |
855 | |
856 | #ifdef CONFIG_PREEMPT | |
857 | /* Returning to kernel space. Check if we need preemption */ | |
858 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 859 | ENTRY(retint_kernel) |
c2daa3be | 860 | cmpl $0,PER_CPU_VAR(__preempt_count) |
1da177e4 | 861 | jnz retint_restore_args |
f2db9382 | 862 | bt $9,EFLAGS(%rsp) /* interrupts off? */ |
1da177e4 LT |
863 | jnc retint_restore_args |
864 | call preempt_schedule_irq | |
865 | jmp exit_intr | |
0bd7b798 | 866 | #endif |
1da177e4 | 867 | CFI_ENDPROC |
4b787e0b | 868 | END(common_interrupt) |
3891a04a | 869 | |
1da177e4 LT |
870 | /* |
871 | * APIC interrupts. | |
0bd7b798 | 872 | */ |
cf910e83 | 873 | .macro apicinterrupt3 num sym do_sym |
322648d1 | 874 | ENTRY(\sym) |
7effaa88 | 875 | INTR_FRAME |
ee4eb87b | 876 | ASM_CLAC |
df5d1874 | 877 | pushq_cfi $~(\num) |
39e95433 | 878 | .Lcommon_\sym: |
322648d1 | 879 | interrupt \do_sym |
1da177e4 LT |
880 | jmp ret_from_intr |
881 | CFI_ENDPROC | |
322648d1 AH |
882 | END(\sym) |
883 | .endm | |
1da177e4 | 884 | |
cf910e83 SA |
885 | #ifdef CONFIG_TRACING |
886 | #define trace(sym) trace_##sym | |
887 | #define smp_trace(sym) smp_trace_##sym | |
888 | ||
889 | .macro trace_apicinterrupt num sym | |
890 | apicinterrupt3 \num trace(\sym) smp_trace(\sym) | |
891 | .endm | |
892 | #else | |
893 | .macro trace_apicinterrupt num sym do_sym | |
894 | .endm | |
895 | #endif | |
896 | ||
897 | .macro apicinterrupt num sym do_sym | |
898 | apicinterrupt3 \num \sym \do_sym | |
899 | trace_apicinterrupt \num \sym | |
900 | .endm | |
901 | ||
322648d1 | 902 | #ifdef CONFIG_SMP |
cf910e83 | 903 | apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \ |
322648d1 | 904 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
cf910e83 | 905 | apicinterrupt3 REBOOT_VECTOR \ |
4ef702c1 | 906 | reboot_interrupt smp_reboot_interrupt |
322648d1 | 907 | #endif |
1da177e4 | 908 | |
03b48632 | 909 | #ifdef CONFIG_X86_UV |
cf910e83 | 910 | apicinterrupt3 UV_BAU_MESSAGE \ |
322648d1 | 911 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 912 | #endif |
322648d1 AH |
913 | apicinterrupt LOCAL_TIMER_VECTOR \ |
914 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
915 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
916 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 917 | |
d78f2664 | 918 | #ifdef CONFIG_HAVE_KVM |
cf910e83 | 919 | apicinterrupt3 POSTED_INTR_VECTOR \ |
d78f2664 YZ |
920 | kvm_posted_intr_ipi smp_kvm_posted_intr_ipi |
921 | #endif | |
922 | ||
33e5ff63 | 923 | #ifdef CONFIG_X86_MCE_THRESHOLD |
322648d1 | 924 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 925 | threshold_interrupt smp_threshold_interrupt |
33e5ff63 SA |
926 | #endif |
927 | ||
928 | #ifdef CONFIG_X86_THERMAL_VECTOR | |
322648d1 AH |
929 | apicinterrupt THERMAL_APIC_VECTOR \ |
930 | thermal_interrupt smp_thermal_interrupt | |
33e5ff63 | 931 | #endif |
1812924b | 932 | |
322648d1 AH |
933 | #ifdef CONFIG_SMP |
934 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
935 | call_function_single_interrupt smp_call_function_single_interrupt | |
936 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
937 | call_function_interrupt smp_call_function_interrupt | |
938 | apicinterrupt RESCHEDULE_VECTOR \ | |
939 | reschedule_interrupt smp_reschedule_interrupt | |
940 | #endif | |
1da177e4 | 941 | |
322648d1 AH |
942 | apicinterrupt ERROR_APIC_VECTOR \ |
943 | error_interrupt smp_error_interrupt | |
944 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
945 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 946 | |
e360adbe PZ |
947 | #ifdef CONFIG_IRQ_WORK |
948 | apicinterrupt IRQ_WORK_VECTOR \ | |
949 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
950 | #endif |
951 | ||
1da177e4 LT |
952 | /* |
953 | * Exception entry points. | |
0bd7b798 | 954 | */ |
577ed45e AL |
955 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
956 | ||
957 | .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 | |
322648d1 | 958 | ENTRY(\sym) |
577ed45e AL |
959 | /* Sanity check */ |
960 | .if \shift_ist != -1 && \paranoid == 0 | |
961 | .error "using shift_ist requires paranoid=1" | |
962 | .endif | |
963 | ||
cb5dd2c5 AL |
964 | .if \has_error_code |
965 | XCPT_FRAME | |
966 | .else | |
7effaa88 | 967 | INTR_FRAME |
cb5dd2c5 | 968 | .endif |
1da177e4 | 969 | |
ee4eb87b | 970 | ASM_CLAC |
b8b1d08b | 971 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
cb5dd2c5 AL |
972 | |
973 | .ifeq \has_error_code | |
974 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | |
975 | .endif | |
976 | ||
76f5df43 | 977 | ALLOC_PT_GPREGS_ON_STACK |
cb5dd2c5 AL |
978 | |
979 | .if \paranoid | |
48e08d0f AL |
980 | .if \paranoid == 1 |
981 | CFI_REMEMBER_STATE | |
982 | testl $3, CS(%rsp) /* If coming from userspace, switch */ | |
983 | jnz 1f /* stacks. */ | |
984 | .endif | |
b8b1d08b | 985 | call save_paranoid |
cb5dd2c5 AL |
986 | .else |
987 | call error_entry | |
988 | .endif | |
989 | ||
1bd24efc | 990 | DEFAULT_FRAME 0 |
cb5dd2c5 AL |
991 | |
992 | .if \paranoid | |
577ed45e AL |
993 | .if \shift_ist != -1 |
994 | TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ | |
995 | .else | |
b8b1d08b | 996 | TRACE_IRQS_OFF |
cb5dd2c5 | 997 | .endif |
577ed45e | 998 | .endif |
cb5dd2c5 AL |
999 | |
1000 | movq %rsp,%rdi /* pt_regs pointer */ | |
1001 | ||
1002 | .if \has_error_code | |
1003 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1004 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1005 | .else | |
1006 | xorl %esi,%esi /* no error code */ | |
1007 | .endif | |
1008 | ||
577ed45e AL |
1009 | .if \shift_ist != -1 |
1010 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1011 | .endif | |
1012 | ||
322648d1 | 1013 | call \do_sym |
cb5dd2c5 | 1014 | |
577ed45e AL |
1015 | .if \shift_ist != -1 |
1016 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1017 | .endif | |
1018 | ||
cb5dd2c5 AL |
1019 | .if \paranoid |
1020 | jmp paranoid_exit /* %ebx: no swapgs flag */ | |
1021 | .else | |
1022 | jmp error_exit /* %ebx: no swapgs flag */ | |
1023 | .endif | |
1024 | ||
48e08d0f AL |
1025 | .if \paranoid == 1 |
1026 | CFI_RESTORE_STATE | |
1027 | /* | |
1028 | * Paranoid entry from userspace. Switch stacks and treat it | |
1029 | * as a normal entry. This means that paranoid handlers | |
1030 | * run in real process context if user_mode(regs). | |
1031 | */ | |
1032 | 1: | |
1033 | call error_entry | |
1034 | ||
1035 | DEFAULT_FRAME 0 | |
1036 | ||
1037 | movq %rsp,%rdi /* pt_regs pointer */ | |
1038 | call sync_regs | |
1039 | movq %rax,%rsp /* switch stack */ | |
1040 | ||
1041 | movq %rsp,%rdi /* pt_regs pointer */ | |
1042 | ||
1043 | .if \has_error_code | |
1044 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1045 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1046 | .else | |
1047 | xorl %esi,%esi /* no error code */ | |
1048 | .endif | |
1049 | ||
1050 | call \do_sym | |
1051 | ||
1052 | jmp error_exit /* %ebx: no swapgs flag */ | |
1053 | .endif | |
1054 | ||
b8b1d08b | 1055 | CFI_ENDPROC |
ddeb8f21 | 1056 | END(\sym) |
322648d1 | 1057 | .endm |
b8b1d08b | 1058 | |
25c74b10 | 1059 | #ifdef CONFIG_TRACING |
cb5dd2c5 AL |
1060 | .macro trace_idtentry sym do_sym has_error_code:req |
1061 | idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code | |
1062 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1063 | .endm |
1064 | #else | |
cb5dd2c5 AL |
1065 | .macro trace_idtentry sym do_sym has_error_code:req |
1066 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1067 | .endm |
1068 | #endif | |
1069 | ||
cb5dd2c5 AL |
1070 | idtentry divide_error do_divide_error has_error_code=0 |
1071 | idtentry overflow do_overflow has_error_code=0 | |
1072 | idtentry bounds do_bounds has_error_code=0 | |
1073 | idtentry invalid_op do_invalid_op has_error_code=0 | |
1074 | idtentry device_not_available do_device_not_available has_error_code=0 | |
48e08d0f | 1075 | idtentry double_fault do_double_fault has_error_code=1 paranoid=2 |
cb5dd2c5 AL |
1076 | idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 |
1077 | idtentry invalid_TSS do_invalid_TSS has_error_code=1 | |
1078 | idtentry segment_not_present do_segment_not_present has_error_code=1 | |
1079 | idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 | |
1080 | idtentry coprocessor_error do_coprocessor_error has_error_code=0 | |
1081 | idtentry alignment_check do_alignment_check has_error_code=1 | |
1082 | idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 | |
5cec93c2 | 1083 | |
2601e64d | 1084 | |
9f1e87ea CG |
1085 | /* Reload gs selector with exception handling */ |
1086 | /* edi: new selector */ | |
9f9d489a | 1087 | ENTRY(native_load_gs_index) |
7effaa88 | 1088 | CFI_STARTPROC |
df5d1874 | 1089 | pushfq_cfi |
b8aa287f | 1090 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1091 | SWAPGS |
0bd7b798 | 1092 | gs_change: |
9f1e87ea | 1093 | movl %edi,%gs |
1da177e4 | 1094 | 2: mfence /* workaround */ |
72fe4858 | 1095 | SWAPGS |
df5d1874 | 1096 | popfq_cfi |
9f1e87ea | 1097 | ret |
7effaa88 | 1098 | CFI_ENDPROC |
6efdcfaf | 1099 | END(native_load_gs_index) |
0bd7b798 | 1100 | |
d7abc0fa | 1101 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1102 | .section .fixup,"ax" |
1da177e4 | 1103 | /* running with kernelgs */ |
0bd7b798 | 1104 | bad_gs: |
72fe4858 | 1105 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1106 | xorl %eax,%eax |
9f1e87ea CG |
1107 | movl %eax,%gs |
1108 | jmp 2b | |
1109 | .previous | |
0bd7b798 | 1110 | |
2699500b | 1111 | /* Call softirq on interrupt stack. Interrupts are off. */ |
7d65f4a6 | 1112 | ENTRY(do_softirq_own_stack) |
7effaa88 | 1113 | CFI_STARTPROC |
df5d1874 | 1114 | pushq_cfi %rbp |
2699500b AK |
1115 | CFI_REL_OFFSET rbp,0 |
1116 | mov %rsp,%rbp | |
1117 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1118 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1119 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1120 | push %rbp # backlink for old unwinder |
ed6b676c | 1121 | call __do_softirq |
2699500b | 1122 | leaveq |
df5d1874 | 1123 | CFI_RESTORE rbp |
7effaa88 | 1124 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1125 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1126 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1127 | ret |
7effaa88 | 1128 | CFI_ENDPROC |
7d65f4a6 | 1129 | END(do_softirq_own_stack) |
75154f40 | 1130 | |
3d75e1b8 | 1131 | #ifdef CONFIG_XEN |
cb5dd2c5 | 1132 | idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 |
3d75e1b8 JF |
1133 | |
1134 | /* | |
9f1e87ea CG |
1135 | * A note on the "critical region" in our callback handler. |
1136 | * We want to avoid stacking callback handlers due to events occurring | |
1137 | * during handling of the last event. To do this, we keep events disabled | |
1138 | * until we've done all processing. HOWEVER, we must enable events before | |
1139 | * popping the stack frame (can't be done atomically) and so it would still | |
1140 | * be possible to get enough handler activations to overflow the stack. | |
1141 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1142 | * like to avoid the possibility. | |
1143 | * So, on entry to the handler we detect whether we interrupted an | |
1144 | * existing activation in its critical region -- if so, we pop the current | |
1145 | * activation and restart the handler using the previous one. | |
1146 | */ | |
3d75e1b8 JF |
1147 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1148 | CFI_STARTPROC | |
9f1e87ea CG |
1149 | /* |
1150 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1151 | * see the correct pointer to the pt_regs | |
1152 | */ | |
3d75e1b8 JF |
1153 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1154 | CFI_ENDPROC | |
dcd072e2 | 1155 | DEFAULT_FRAME |
56895530 | 1156 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1157 | movq %rsp,%rbp |
1158 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1159 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1160 | pushq %rbp # backlink for old unwinder |
1161 | call xen_evtchn_do_upcall | |
1162 | popq %rsp | |
1163 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1164 | decl PER_CPU_VAR(irq_count) |
fdfd811d DV |
1165 | #ifndef CONFIG_PREEMPT |
1166 | call xen_maybe_preempt_hcall | |
1167 | #endif | |
3d75e1b8 JF |
1168 | jmp error_exit |
1169 | CFI_ENDPROC | |
371c394a | 1170 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1171 | |
1172 | /* | |
9f1e87ea CG |
1173 | * Hypervisor uses this for application faults while it executes. |
1174 | * We get here for two reasons: | |
1175 | * 1. Fault while reloading DS, ES, FS or GS | |
1176 | * 2. Fault while executing IRET | |
1177 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1178 | * registers that could be reloaded and zeroed the others. | |
1179 | * Category 2 we fix up by killing the current process. We cannot use the | |
1180 | * normal Linux return path in this case because if we use the IRET hypercall | |
1181 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1182 | * We distinguish between categories by comparing each saved segment register | |
1183 | * with its current contents: any discrepancy means we in category 1. | |
1184 | */ | |
3d75e1b8 | 1185 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1186 | INTR_FRAME 1 (6*8) |
1187 | /*CFI_REL_OFFSET gs,GS*/ | |
1188 | /*CFI_REL_OFFSET fs,FS*/ | |
1189 | /*CFI_REL_OFFSET es,ES*/ | |
1190 | /*CFI_REL_OFFSET ds,DS*/ | |
1191 | CFI_REL_OFFSET r11,8 | |
1192 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1193 | movw %ds,%cx |
1194 | cmpw %cx,0x10(%rsp) | |
1195 | CFI_REMEMBER_STATE | |
1196 | jne 1f | |
1197 | movw %es,%cx | |
1198 | cmpw %cx,0x18(%rsp) | |
1199 | jne 1f | |
1200 | movw %fs,%cx | |
1201 | cmpw %cx,0x20(%rsp) | |
1202 | jne 1f | |
1203 | movw %gs,%cx | |
1204 | cmpw %cx,0x28(%rsp) | |
1205 | jne 1f | |
1206 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1207 | movq (%rsp),%rcx | |
1208 | CFI_RESTORE rcx | |
1209 | movq 8(%rsp),%r11 | |
1210 | CFI_RESTORE r11 | |
1211 | addq $0x30,%rsp | |
1212 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1213 | pushq_cfi $0 /* RIP */ |
1214 | pushq_cfi %r11 | |
1215 | pushq_cfi %rcx | |
4a5c3e77 | 1216 | jmp general_protection |
3d75e1b8 JF |
1217 | CFI_RESTORE_STATE |
1218 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1219 | movq (%rsp),%rcx | |
1220 | CFI_RESTORE rcx | |
1221 | movq 8(%rsp),%r11 | |
1222 | CFI_RESTORE r11 | |
1223 | addq $0x30,%rsp | |
1224 | CFI_ADJUST_CFA_OFFSET -0x30 | |
a349e23d | 1225 | pushq_cfi $-1 /* orig_ax = -1 => not a system call */ |
76f5df43 DV |
1226 | ALLOC_PT_GPREGS_ON_STACK |
1227 | SAVE_C_REGS | |
1228 | SAVE_EXTRA_REGS | |
3d75e1b8 JF |
1229 | jmp error_exit |
1230 | CFI_ENDPROC | |
3d75e1b8 JF |
1231 | END(xen_failsafe_callback) |
1232 | ||
cf910e83 | 1233 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
38e20b07 SY |
1234 | xen_hvm_callback_vector xen_evtchn_do_upcall |
1235 | ||
3d75e1b8 | 1236 | #endif /* CONFIG_XEN */ |
ddeb8f21 | 1237 | |
bc2b0331 | 1238 | #if IS_ENABLED(CONFIG_HYPERV) |
cf910e83 | 1239 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
bc2b0331 S |
1240 | hyperv_callback_vector hyperv_vector_handler |
1241 | #endif /* CONFIG_HYPERV */ | |
1242 | ||
577ed45e AL |
1243 | idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK |
1244 | idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK | |
6f442be2 | 1245 | idtentry stack_segment do_stack_segment has_error_code=1 |
6cac5a92 | 1246 | #ifdef CONFIG_XEN |
cb5dd2c5 AL |
1247 | idtentry xen_debug do_debug has_error_code=0 |
1248 | idtentry xen_int3 do_int3 has_error_code=0 | |
1249 | idtentry xen_stack_segment do_stack_segment has_error_code=1 | |
6cac5a92 | 1250 | #endif |
cb5dd2c5 AL |
1251 | idtentry general_protection do_general_protection has_error_code=1 |
1252 | trace_idtentry page_fault do_page_fault has_error_code=1 | |
631bc487 | 1253 | #ifdef CONFIG_KVM_GUEST |
cb5dd2c5 | 1254 | idtentry async_page_fault do_async_page_fault has_error_code=1 |
631bc487 | 1255 | #endif |
ddeb8f21 | 1256 | #ifdef CONFIG_X86_MCE |
cb5dd2c5 | 1257 | idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) |
ddeb8f21 AH |
1258 | #endif |
1259 | ||
1eeb207f DV |
1260 | ENTRY(save_paranoid) |
1261 | XCPT_FRAME 1 RDI+8 | |
1262 | cld | |
1263 | SAVE_C_REGS 8 | |
1264 | SAVE_EXTRA_REGS 8 | |
1265 | movl $1,%ebx | |
1266 | movl $MSR_GS_BASE,%ecx | |
1267 | rdmsr | |
1268 | testl %edx,%edx | |
1269 | js 1f /* negative -> in kernel */ | |
1270 | SWAPGS | |
1271 | xorl %ebx,%ebx | |
1272 | 1: ret | |
1273 | CFI_ENDPROC | |
1274 | END(save_paranoid) | |
1275 | ||
ddeb8f21 | 1276 | /* |
48e08d0f AL |
1277 | * "Paranoid" exit path from exception stack. This is invoked |
1278 | * only on return from non-NMI IST interrupts that came | |
1279 | * from kernel space. | |
ddeb8f21 | 1280 | * |
48e08d0f AL |
1281 | * We may be returning to very strange contexts (e.g. very early |
1282 | * in syscall entry), so checking for preemption here would | |
1283 | * be complicated. Fortunately, we there's no good reason | |
1284 | * to try to handle preemption here. | |
ddeb8f21 AH |
1285 | */ |
1286 | ||
1287 | /* ebx: no swapgs flag */ | |
1288 | ENTRY(paranoid_exit) | |
1f130a78 | 1289 | DEFAULT_FRAME |
ddeb8f21 | 1290 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1291 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 | 1292 | testl %ebx,%ebx /* swapgs needed? */ |
0d550836 | 1293 | jnz paranoid_exit_no_swapgs |
f2db9382 | 1294 | TRACE_IRQS_IRETQ |
ddeb8f21 | 1295 | SWAPGS_UNSAFE_STACK |
0d550836 DV |
1296 | jmp paranoid_exit_restore |
1297 | paranoid_exit_no_swapgs: | |
f2db9382 | 1298 | TRACE_IRQS_IRETQ_DEBUG |
0d550836 | 1299 | paranoid_exit_restore: |
76f5df43 DV |
1300 | RESTORE_EXTRA_REGS |
1301 | RESTORE_C_REGS | |
1302 | REMOVE_PT_GPREGS_FROM_STACK 8 | |
48e08d0f | 1303 | INTERRUPT_RETURN |
ddeb8f21 AH |
1304 | CFI_ENDPROC |
1305 | END(paranoid_exit) | |
1306 | ||
1307 | /* | |
1308 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1309 | * returns in "no swapgs flag" in %ebx. | |
1310 | */ | |
1311 | ENTRY(error_entry) | |
1312 | XCPT_FRAME | |
1313 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1314 | /* oldrax contains error code */ | |
1315 | cld | |
76f5df43 DV |
1316 | SAVE_C_REGS 8 |
1317 | SAVE_EXTRA_REGS 8 | |
ddeb8f21 AH |
1318 | xorl %ebx,%ebx |
1319 | testl $3,CS+8(%rsp) | |
1320 | je error_kernelspace | |
1321 | error_swapgs: | |
1322 | SWAPGS | |
1323 | error_sti: | |
1324 | TRACE_IRQS_OFF | |
1325 | ret | |
ddeb8f21 AH |
1326 | |
1327 | /* | |
1328 | * There are two places in the kernel that can potentially fault with | |
b645af2d AL |
1329 | * usergs. Handle them here. B stepping K8s sometimes report a |
1330 | * truncated RIP for IRET exceptions returning to compat mode. Check | |
1331 | * for these here too. | |
ddeb8f21 AH |
1332 | */ |
1333 | error_kernelspace: | |
3bab13b0 | 1334 | CFI_REL_OFFSET rcx, RCX+8 |
ddeb8f21 | 1335 | incl %ebx |
7209a75d | 1336 | leaq native_irq_return_iret(%rip),%rcx |
ddeb8f21 | 1337 | cmpq %rcx,RIP+8(%rsp) |
b645af2d | 1338 | je error_bad_iret |
ae24ffe5 BG |
1339 | movl %ecx,%eax /* zero extend */ |
1340 | cmpq %rax,RIP+8(%rsp) | |
1341 | je bstep_iret | |
ddeb8f21 | 1342 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1343 | je error_swapgs |
ddeb8f21 | 1344 | jmp error_sti |
ae24ffe5 BG |
1345 | |
1346 | bstep_iret: | |
1347 | /* Fix truncated RIP */ | |
1348 | movq %rcx,RIP+8(%rsp) | |
b645af2d AL |
1349 | /* fall through */ |
1350 | ||
1351 | error_bad_iret: | |
1352 | SWAPGS | |
1353 | mov %rsp,%rdi | |
1354 | call fixup_bad_iret | |
1355 | mov %rax,%rsp | |
1356 | decl %ebx /* Return to usergs */ | |
1357 | jmp error_sti | |
e6b04b6b | 1358 | CFI_ENDPROC |
ddeb8f21 AH |
1359 | END(error_entry) |
1360 | ||
1361 | ||
1362 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1363 | ENTRY(error_exit) | |
1364 | DEFAULT_FRAME | |
1365 | movl %ebx,%eax | |
76f5df43 | 1366 | RESTORE_EXTRA_REGS |
ddeb8f21 AH |
1367 | DISABLE_INTERRUPTS(CLBR_NONE) |
1368 | TRACE_IRQS_OFF | |
1369 | GET_THREAD_INFO(%rcx) | |
1370 | testl %eax,%eax | |
1371 | jne retint_kernel | |
1372 | LOCKDEP_SYS_EXIT_IRQ | |
1373 | movl TI_flags(%rcx),%edx | |
1374 | movl $_TIF_WORK_MASK,%edi | |
1375 | andl %edi,%edx | |
1376 | jnz retint_careful | |
1377 | jmp retint_swapgs | |
1378 | CFI_ENDPROC | |
1379 | END(error_exit) | |
1380 | ||
3f3c8b8c SR |
1381 | /* |
1382 | * Test if a given stack is an NMI stack or not. | |
1383 | */ | |
1384 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1385 | cmpq %\reg, \stack | |
1386 | ja \normal_ret | |
1387 | subq $EXCEPTION_STKSZ, %\reg | |
1388 | cmpq %\reg, \stack | |
1389 | jb \normal_ret | |
1390 | jmp \nmi_ret | |
1391 | .endm | |
ddeb8f21 AH |
1392 | |
1393 | /* runs on exception stack */ | |
1394 | ENTRY(nmi) | |
1395 | INTR_FRAME | |
1396 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1397 | /* |
1398 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1399 | * the iretq it performs will take us out of NMI context. | |
1400 | * This means that we can have nested NMIs where the next | |
1401 | * NMI is using the top of the stack of the previous NMI. We | |
1402 | * can't let it execute because the nested NMI will corrupt the | |
1403 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1404 | * anyway. | |
1405 | * | |
1406 | * To handle this case we do the following: | |
1407 | * Check the a special location on the stack that contains | |
1408 | * a variable that is set when NMIs are executing. | |
1409 | * The interrupted task's stack is also checked to see if it | |
1410 | * is an NMI stack. | |
1411 | * If the variable is not set and the stack is not the NMI | |
1412 | * stack then: | |
1413 | * o Set the special variable on the stack | |
1414 | * o Copy the interrupt frame into a "saved" location on the stack | |
1415 | * o Copy the interrupt frame into a "copy" location on the stack | |
1416 | * o Continue processing the NMI | |
1417 | * If the variable is set or the previous stack is the NMI stack: | |
1418 | * o Modify the "copy" location to jump to the repeate_nmi | |
1419 | * o return back to the first NMI | |
1420 | * | |
1421 | * Now on exit of the first NMI, we first clear the stack variable | |
1422 | * The NMI stack will tell any nested NMIs at that point that it is | |
1423 | * nested. Then we pop the stack normally with iret, and if there was | |
1424 | * a nested NMI that updated the copy interrupt stack frame, a | |
1425 | * jump will be made to the repeat_nmi code that will handle the second | |
1426 | * NMI. | |
1427 | */ | |
1428 | ||
1429 | /* Use %rdx as out temp variable throughout */ | |
1430 | pushq_cfi %rdx | |
62610913 | 1431 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1432 | |
45d5a168 SR |
1433 | /* |
1434 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1435 | * space, which means it is definitely not nested. | |
1436 | */ | |
a38449ef | 1437 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1438 | jne first_nmi |
1439 | ||
3f3c8b8c SR |
1440 | /* |
1441 | * Check the special variable on the stack to see if NMIs are | |
1442 | * executing. | |
1443 | */ | |
a38449ef | 1444 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1445 | je nested_nmi |
1446 | ||
1447 | /* | |
1448 | * Now test if the previous stack was an NMI stack. | |
1449 | * We need the double check. We check the NMI stack to satisfy the | |
1450 | * race when the first NMI clears the variable before returning. | |
1451 | * We check the variable because the first NMI could be in a | |
1452 | * breakpoint routine using a breakpoint stack. | |
1453 | */ | |
1454 | lea 6*8(%rsp), %rdx | |
1455 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1456 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1457 | |
1458 | nested_nmi: | |
1459 | /* | |
1460 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1461 | * It's about to repeat the NMI handler, so we are fine | |
1462 | * with ignoring this one. | |
1463 | */ | |
1464 | movq $repeat_nmi, %rdx | |
1465 | cmpq 8(%rsp), %rdx | |
1466 | ja 1f | |
1467 | movq $end_repeat_nmi, %rdx | |
1468 | cmpq 8(%rsp), %rdx | |
1469 | ja nested_nmi_out | |
1470 | ||
1471 | 1: | |
1472 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
28696f43 | 1473 | leaq -1*8(%rsp), %rdx |
3f3c8b8c | 1474 | movq %rdx, %rsp |
28696f43 SQ |
1475 | CFI_ADJUST_CFA_OFFSET 1*8 |
1476 | leaq -10*8(%rsp), %rdx | |
3f3c8b8c SR |
1477 | pushq_cfi $__KERNEL_DS |
1478 | pushq_cfi %rdx | |
1479 | pushfq_cfi | |
1480 | pushq_cfi $__KERNEL_CS | |
1481 | pushq_cfi $repeat_nmi | |
1482 | ||
1483 | /* Put stack back */ | |
28696f43 SQ |
1484 | addq $(6*8), %rsp |
1485 | CFI_ADJUST_CFA_OFFSET -6*8 | |
3f3c8b8c SR |
1486 | |
1487 | nested_nmi_out: | |
1488 | popq_cfi %rdx | |
62610913 | 1489 | CFI_RESTORE rdx |
3f3c8b8c SR |
1490 | |
1491 | /* No need to check faults here */ | |
1492 | INTERRUPT_RETURN | |
1493 | ||
62610913 | 1494 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1495 | first_nmi: |
1496 | /* | |
1497 | * Because nested NMIs will use the pushed location that we | |
1498 | * stored in rdx, we must keep that space available. | |
1499 | * Here's what our stack frame will look like: | |
1500 | * +-------------------------+ | |
1501 | * | original SS | | |
1502 | * | original Return RSP | | |
1503 | * | original RFLAGS | | |
1504 | * | original CS | | |
1505 | * | original RIP | | |
1506 | * +-------------------------+ | |
1507 | * | temp storage for rdx | | |
1508 | * +-------------------------+ | |
1509 | * | NMI executing variable | | |
1510 | * +-------------------------+ | |
3f3c8b8c SR |
1511 | * | copied SS | |
1512 | * | copied Return RSP | | |
1513 | * | copied RFLAGS | | |
1514 | * | copied CS | | |
1515 | * | copied RIP | | |
1516 | * +-------------------------+ | |
28696f43 SQ |
1517 | * | Saved SS | |
1518 | * | Saved Return RSP | | |
1519 | * | Saved RFLAGS | | |
1520 | * | Saved CS | | |
1521 | * | Saved RIP | | |
1522 | * +-------------------------+ | |
3f3c8b8c SR |
1523 | * | pt_regs | |
1524 | * +-------------------------+ | |
1525 | * | |
79fb4ad6 SR |
1526 | * The saved stack frame is used to fix up the copied stack frame |
1527 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1528 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1529 | * is also used by nested NMIs and can not be trusted on exit. |
1530 | */ | |
79fb4ad6 | 1531 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1532 | movq (%rsp), %rdx |
1533 | CFI_RESTORE rdx | |
1534 | ||
3f3c8b8c SR |
1535 | /* Set the NMI executing variable on the stack. */ |
1536 | pushq_cfi $1 | |
1537 | ||
28696f43 SQ |
1538 | /* |
1539 | * Leave room for the "copied" frame | |
1540 | */ | |
1541 | subq $(5*8), %rsp | |
444723dc | 1542 | CFI_ADJUST_CFA_OFFSET 5*8 |
28696f43 | 1543 | |
3f3c8b8c SR |
1544 | /* Copy the stack frame to the Saved frame */ |
1545 | .rept 5 | |
28696f43 | 1546 | pushq_cfi 11*8(%rsp) |
3f3c8b8c | 1547 | .endr |
62610913 JB |
1548 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1549 | ||
79fb4ad6 SR |
1550 | /* Everything up to here is safe from nested NMIs */ |
1551 | ||
62610913 JB |
1552 | /* |
1553 | * If there was a nested NMI, the first NMI's iret will return | |
1554 | * here. But NMIs are still enabled and we can take another | |
1555 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1556 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1557 | * it will just return, as we are about to repeat an NMI anyway. | |
1558 | * This makes it safe to copy to the stack frame that a nested | |
1559 | * NMI will update. | |
1560 | */ | |
1561 | repeat_nmi: | |
1562 | /* | |
1563 | * Update the stack variable to say we are still in NMI (the update | |
1564 | * is benign for the non-repeat case, where 1 was pushed just above | |
1565 | * to this very stack slot). | |
1566 | */ | |
28696f43 | 1567 | movq $1, 10*8(%rsp) |
3f3c8b8c SR |
1568 | |
1569 | /* Make another copy, this one may be modified by nested NMIs */ | |
28696f43 SQ |
1570 | addq $(10*8), %rsp |
1571 | CFI_ADJUST_CFA_OFFSET -10*8 | |
3f3c8b8c | 1572 | .rept 5 |
28696f43 | 1573 | pushq_cfi -6*8(%rsp) |
3f3c8b8c | 1574 | .endr |
28696f43 | 1575 | subq $(5*8), %rsp |
62610913 JB |
1576 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1577 | end_repeat_nmi: | |
3f3c8b8c SR |
1578 | |
1579 | /* | |
1580 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1581 | * NMI if the first NMI took an exception and reset our iret stack |
1582 | * so that we repeat another NMI. | |
3f3c8b8c | 1583 | */ |
1fd466ef | 1584 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
76f5df43 DV |
1585 | ALLOC_PT_GPREGS_ON_STACK |
1586 | ||
1fd466ef SR |
1587 | /* |
1588 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1589 | * as we should not be calling schedule in NMI context. | |
1590 | * Even with normal interrupts enabled. An NMI should not be | |
1591 | * setting NEED_RESCHED or anything that normal interrupts and | |
1592 | * exceptions might do. | |
1593 | */ | |
ddeb8f21 AH |
1594 | call save_paranoid |
1595 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1596 | |
1597 | /* | |
1598 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1599 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1600 | * handler before it was able to read the CR2 register, and then the | |
1601 | * NMI itself takes a page fault, the page fault that was preempted | |
1602 | * will read the information from the NMI page fault and not the | |
1603 | * origin fault. Save it off and restore it if it changes. | |
1604 | * Use the r12 callee-saved register. | |
1605 | */ | |
1606 | movq %cr2, %r12 | |
1607 | ||
ddeb8f21 AH |
1608 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1609 | movq %rsp,%rdi | |
1610 | movq $-1,%rsi | |
1611 | call do_nmi | |
7fbb98c5 SR |
1612 | |
1613 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1614 | movq %cr2, %rcx | |
1615 | cmpq %rcx, %r12 | |
1616 | je 1f | |
1617 | movq %r12, %cr2 | |
1618 | 1: | |
1619 | ||
ddeb8f21 AH |
1620 | testl %ebx,%ebx /* swapgs needed? */ |
1621 | jnz nmi_restore | |
ddeb8f21 AH |
1622 | nmi_swapgs: |
1623 | SWAPGS_UNSAFE_STACK | |
1624 | nmi_restore: | |
76f5df43 DV |
1625 | RESTORE_EXTRA_REGS |
1626 | RESTORE_C_REGS | |
444723dc | 1627 | /* Pop the extra iret frame at once */ |
76f5df43 | 1628 | REMOVE_PT_GPREGS_FROM_STACK 6*8 |
28696f43 | 1629 | |
3f3c8b8c | 1630 | /* Clear the NMI executing stack variable */ |
28696f43 | 1631 | movq $0, 5*8(%rsp) |
ddeb8f21 | 1632 | jmp irq_return |
9f1e87ea | 1633 | CFI_ENDPROC |
ddeb8f21 AH |
1634 | END(nmi) |
1635 | ||
1636 | ENTRY(ignore_sysret) | |
1637 | CFI_STARTPROC | |
1638 | mov $-ENOSYS,%eax | |
1639 | sysret | |
1640 | CFI_ENDPROC | |
1641 | END(ignore_sysret) | |
1642 |