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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 | 16 | * |
0bd7b798 AH |
17 | * A note on terminology: |
18 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
19 | * at the top of the kernel process stack. | |
0d2eb44f | 20 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 21 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
22 | * |
23 | * Some macro usage: | |
24 | * - CFI macros are used to generate dwarf2 unwind information for better | |
25 | * backtraces. They don't change any code. | |
2e91a17b AK |
26 | * - ENTRY/END Define functions in the symbol table. |
27 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
28 | * frame that is otherwise undefined after a SYSCALL | |
29 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
cb5dd2c5 | 30 | * - idtentry - Define exception entry points. |
1da177e4 LT |
31 | */ |
32 | ||
1da177e4 LT |
33 | #include <linux/linkage.h> |
34 | #include <asm/segment.h> | |
1da177e4 LT |
35 | #include <asm/cache.h> |
36 | #include <asm/errno.h> | |
37 | #include <asm/dwarf2.h> | |
38 | #include <asm/calling.h> | |
e2d5df93 | 39 | #include <asm/asm-offsets.h> |
1da177e4 LT |
40 | #include <asm/msr.h> |
41 | #include <asm/unistd.h> | |
42 | #include <asm/thread_info.h> | |
43 | #include <asm/hw_irq.h> | |
0341c14d | 44 | #include <asm/page_types.h> |
2601e64d | 45 | #include <asm/irqflags.h> |
72fe4858 | 46 | #include <asm/paravirt.h> |
9939ddaf | 47 | #include <asm/percpu.h> |
d7abc0fa | 48 | #include <asm/asm.h> |
91d1aa43 | 49 | #include <asm/context_tracking.h> |
63bcff2a | 50 | #include <asm/smap.h> |
3891a04a | 51 | #include <asm/pgtable_types.h> |
d7e7528b | 52 | #include <linux/err.h> |
1da177e4 | 53 | |
86a1c34a RM |
54 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
55 | #include <linux/elf-em.h> | |
56 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
57 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
58 | #define __AUDIT_ARCH_LE 0x40000000 | |
59 | ||
1da177e4 | 60 | .code64 |
ea714547 JO |
61 | .section .entry.text, "ax" |
62 | ||
16444a8a | 63 | |
dc37db4d | 64 | #ifndef CONFIG_PREEMPT |
1da177e4 | 65 | #define retint_kernel retint_restore_args |
0bd7b798 | 66 | #endif |
2601e64d | 67 | |
72fe4858 | 68 | #ifdef CONFIG_PARAVIRT |
2be29982 | 69 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
70 | swapgs |
71 | sysretq | |
b3baaa13 | 72 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
73 | #endif /* CONFIG_PARAVIRT */ |
74 | ||
2601e64d | 75 | |
f2db9382 | 76 | .macro TRACE_IRQS_IRETQ |
2601e64d | 77 | #ifdef CONFIG_TRACE_IRQFLAGS |
f2db9382 | 78 | bt $9,EFLAGS(%rsp) /* interrupts off? */ |
2601e64d IM |
79 | jnc 1f |
80 | TRACE_IRQS_ON | |
81 | 1: | |
82 | #endif | |
83 | .endm | |
84 | ||
5963e317 SR |
85 | /* |
86 | * When dynamic function tracer is enabled it will add a breakpoint | |
87 | * to all locations that it is about to modify, sync CPUs, update | |
88 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
89 | * if lockdep is enabled, it might jump back into the debug handler | |
90 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
91 | * | |
92 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
93 | * make sure the stack pointer does not get reset back to the top | |
94 | * of the debug stack, and instead just reuses the current stack. | |
95 | */ | |
96 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
97 | ||
98 | .macro TRACE_IRQS_OFF_DEBUG | |
99 | call debug_stack_set_zero | |
100 | TRACE_IRQS_OFF | |
101 | call debug_stack_reset | |
102 | .endm | |
103 | ||
104 | .macro TRACE_IRQS_ON_DEBUG | |
105 | call debug_stack_set_zero | |
106 | TRACE_IRQS_ON | |
107 | call debug_stack_reset | |
108 | .endm | |
109 | ||
f2db9382 DV |
110 | .macro TRACE_IRQS_IRETQ_DEBUG |
111 | bt $9,EFLAGS(%rsp) /* interrupts off? */ | |
5963e317 SR |
112 | jnc 1f |
113 | TRACE_IRQS_ON_DEBUG | |
114 | 1: | |
115 | .endm | |
116 | ||
117 | #else | |
118 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
119 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
120 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
121 | #endif | |
122 | ||
1da177e4 | 123 | /* |
29722cd4 DV |
124 | * C code is not supposed to know that the iret frame is not populated. |
125 | * Every time a C function with an pt_regs argument is called from | |
126 | * the SYSCALL based fast path FIXUP_TOP_OF_STACK is needed. | |
1da177e4 LT |
127 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs |
128 | * manipulation. | |
0bd7b798 | 129 | */ |
c002a1e6 | 130 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
c002a1e6 AH |
131 | movq $__USER_DS,SS+\offset(%rsp) |
132 | movq $__USER_CS,CS+\offset(%rsp) | |
0fcedc86 AL |
133 | movq RIP+\offset(%rsp),\tmp /* get rip */ |
134 | movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */ | |
29722cd4 DV |
135 | movq EFLAGS+\offset(%rsp),\tmp /* ditto for rflags->r11 */ |
136 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
137 | .endm |
138 | ||
c002a1e6 | 139 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
263042e4 | 140 | /* nothing to do */ |
1da177e4 LT |
141 | .endm |
142 | ||
dcd072e2 | 143 | /* |
e90e147c | 144 | * empty frame |
dcd072e2 AH |
145 | */ |
146 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 147 | .if \start |
dcd072e2 | 148 | CFI_STARTPROC simple |
adf14236 | 149 | CFI_SIGNAL_FRAME |
dcd072e2 | 150 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 151 | .else |
dcd072e2 | 152 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 153 | .endif |
1da177e4 | 154 | .endm |
d99015b1 AH |
155 | |
156 | /* | |
dcd072e2 | 157 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 158 | */ |
dcd072e2 | 159 | .macro INTR_FRAME start=1 offset=0 |
911d2bb5 DV |
160 | EMPTY_FRAME \start, 5*8+\offset |
161 | /*CFI_REL_OFFSET ss, 4*8+\offset*/ | |
162 | CFI_REL_OFFSET rsp, 3*8+\offset | |
163 | /*CFI_REL_OFFSET rflags, 2*8+\offset*/ | |
164 | /*CFI_REL_OFFSET cs, 1*8+\offset*/ | |
165 | CFI_REL_OFFSET rip, 0*8+\offset | |
d99015b1 AH |
166 | .endm |
167 | ||
d99015b1 AH |
168 | /* |
169 | * initial frame state for exceptions with error code (and interrupts | |
170 | * with vector already pushed) | |
171 | */ | |
dcd072e2 | 172 | .macro XCPT_FRAME start=1 offset=0 |
911d2bb5 | 173 | INTR_FRAME \start, 1*8+\offset |
dcd072e2 AH |
174 | .endm |
175 | ||
176 | /* | |
76f5df43 | 177 | * frame that enables passing a complete pt_regs to a C function. |
dcd072e2 | 178 | */ |
76f5df43 | 179 | .macro DEFAULT_FRAME start=1 offset=0 |
f2db9382 DV |
180 | XCPT_FRAME \start, ORIG_RAX+\offset |
181 | CFI_REL_OFFSET rdi, RDI+\offset | |
182 | CFI_REL_OFFSET rsi, RSI+\offset | |
183 | CFI_REL_OFFSET rdx, RDX+\offset | |
184 | CFI_REL_OFFSET rcx, RCX+\offset | |
185 | CFI_REL_OFFSET rax, RAX+\offset | |
186 | CFI_REL_OFFSET r8, R8+\offset | |
187 | CFI_REL_OFFSET r9, R9+\offset | |
188 | CFI_REL_OFFSET r10, R10+\offset | |
189 | CFI_REL_OFFSET r11, R11+\offset | |
dcd072e2 AH |
190 | CFI_REL_OFFSET rbx, RBX+\offset |
191 | CFI_REL_OFFSET rbp, RBP+\offset | |
192 | CFI_REL_OFFSET r12, R12+\offset | |
193 | CFI_REL_OFFSET r13, R13+\offset | |
194 | CFI_REL_OFFSET r14, R14+\offset | |
195 | CFI_REL_OFFSET r15, R15+\offset | |
196 | .endm | |
d99015b1 | 197 | |
1da177e4 | 198 | /* |
b87cf63e | 199 | * 64bit SYSCALL instruction entry. Up to 6 arguments in registers. |
1da177e4 | 200 | * |
b87cf63e DV |
201 | * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11, |
202 | * then loads new ss, cs, and rip from previously programmed MSRs. | |
203 | * rflags gets masked by a value from another MSR (so CLD and CLAC | |
204 | * are not needed). SYSCALL does not save anything on the stack | |
205 | * and does not change rsp. | |
206 | * | |
207 | * Registers on entry: | |
1da177e4 | 208 | * rax system call number |
b87cf63e DV |
209 | * rcx return address |
210 | * r11 saved rflags (note: r11 is callee-clobbered register in C ABI) | |
1da177e4 | 211 | * rdi arg0 |
1da177e4 | 212 | * rsi arg1 |
0bd7b798 | 213 | * rdx arg2 |
b87cf63e | 214 | * r10 arg3 (needs to be moved to rcx to conform to C ABI) |
1da177e4 LT |
215 | * r8 arg4 |
216 | * r9 arg5 | |
b87cf63e | 217 | * (note: r12-r15,rbp,rbx are callee-preserved in C ABI) |
0bd7b798 | 218 | * |
1da177e4 LT |
219 | * Interrupts are off on entry. |
220 | * Only called from user space. | |
221 | * | |
7bf36bbc AK |
222 | * When user can change the frames always force IRET. That is because |
223 | * it deals with uncanonical addresses better. SYSRET has trouble | |
224 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 225 | */ |
1da177e4 LT |
226 | |
227 | ENTRY(system_call) | |
7effaa88 | 228 | CFI_STARTPROC simple |
adf14236 | 229 | CFI_SIGNAL_FRAME |
9af45651 | 230 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
231 | CFI_REGISTER rip,rcx |
232 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
233 | SWAPGS_UNSAFE_STACK |
234 | /* | |
235 | * A hypervisor implementation might want to use a label | |
236 | * after the swapgs, so that it can do the swapgs | |
237 | * for the guest and jump here on syscall. | |
238 | */ | |
f6b2bc84 | 239 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 240 | |
3d1e42a7 | 241 | movq %rsp,PER_CPU_VAR(old_rsp) |
b87cf63e | 242 | /* kernel_stack is set so that 5 slots (iret frame) are preallocated */ |
9af45651 | 243 | movq PER_CPU_VAR(kernel_stack),%rsp |
b87cf63e | 244 | ALLOC_PT_GPREGS_ON_STACK 8 /* +8: space for orig_ax */ |
263042e4 DV |
245 | movq %rcx,RIP(%rsp) |
246 | movq PER_CPU_VAR(old_rsp),%rcx | |
247 | movq %r11,EFLAGS(%rsp) | |
248 | movq %rcx,RSP(%rsp) | |
33db1fd4 DV |
249 | /* |
250 | * No need to follow this irqs off/on section - it's straight | |
251 | * and short: | |
252 | */ | |
253 | ENABLE_INTERRUPTS(CLBR_NONE) | |
263042e4 | 254 | movq_cfi rax,ORIG_RAX |
29722cd4 | 255 | SAVE_C_REGS_EXCEPT_RAX_RCX_R11 |
f2db9382 | 256 | movq $-ENOSYS,RAX(%rsp) |
f2db9382 DV |
257 | CFI_REL_OFFSET rip,RIP |
258 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP) | |
1da177e4 | 259 | jnz tracesys |
86a1c34a | 260 | system_call_fastpath: |
fca460f9 | 261 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 262 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
263 | #else |
264 | andl $__SYSCALL_MASK,%eax | |
265 | cmpl $__NR_syscall_max,%eax | |
266 | #endif | |
54eea995 | 267 | ja ret_from_sys_call /* and return regs->ax */ |
1da177e4 LT |
268 | movq %r10,%rcx |
269 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
f2db9382 | 270 | movq %rax,RAX(%rsp) |
1da177e4 LT |
271 | /* |
272 | * Syscall return path ending with SYSRET (fast path) | |
29722cd4 | 273 | * Has incompletely filled pt_regs, iret frame is also incomplete. |
0bd7b798 | 274 | */ |
1da177e4 | 275 | ret_from_sys_call: |
f2db9382 | 276 | testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP) |
96b6352c AL |
277 | jnz int_ret_from_sys_call_fixup /* Go the the slow path */ |
278 | ||
10cd706d | 279 | LOCKDEP_SYS_EXIT |
72fe4858 | 280 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 281 | TRACE_IRQS_OFF |
bcddc015 | 282 | CFI_REMEMBER_STATE |
2601e64d IM |
283 | /* |
284 | * sysretq will re-enable interrupts: | |
285 | */ | |
286 | TRACE_IRQS_ON | |
29722cd4 DV |
287 | RESTORE_C_REGS_EXCEPT_RCX_R11 |
288 | movq RIP(%rsp),%rcx | |
7effaa88 | 289 | CFI_REGISTER rip,rcx |
29722cd4 | 290 | movq EFLAGS(%rsp),%r11 |
7effaa88 | 291 | /*CFI_REGISTER rflags,r11*/ |
263042e4 | 292 | movq RSP(%rsp),%rsp |
b87cf63e DV |
293 | /* |
294 | * 64bit SYSRET restores rip from rcx, | |
295 | * rflags from r11 (but RF and VM bits are forced to 0), | |
296 | * cs and ss are loaded from MSRs. | |
297 | */ | |
2be29982 | 298 | USERGS_SYSRET64 |
1da177e4 | 299 | |
bcddc015 | 300 | CFI_RESTORE_STATE |
1da177e4 | 301 | |
96b6352c | 302 | int_ret_from_sys_call_fixup: |
f2db9382 | 303 | FIXUP_TOP_OF_STACK %r11 |
96b6352c | 304 | jmp int_ret_from_sys_call |
86a1c34a | 305 | |
1da177e4 | 306 | /* Do syscall tracing */ |
0bd7b798 | 307 | tracesys: |
76f5df43 | 308 | movq %rsp, %rdi |
1dcf74f6 AL |
309 | movq $AUDIT_ARCH_X86_64, %rsi |
310 | call syscall_trace_enter_phase1 | |
311 | test %rax, %rax | |
312 | jnz tracesys_phase2 /* if needed, run the slow path */ | |
76f5df43 | 313 | RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */ |
f2db9382 | 314 | movq ORIG_RAX(%rsp), %rax |
1dcf74f6 AL |
315 | jmp system_call_fastpath /* and return to the fast path */ |
316 | ||
317 | tracesys_phase2: | |
76f5df43 | 318 | SAVE_EXTRA_REGS |
1da177e4 | 319 | FIXUP_TOP_OF_STACK %rdi |
1dcf74f6 AL |
320 | movq %rsp, %rdi |
321 | movq $AUDIT_ARCH_X86_64, %rsi | |
322 | movq %rax,%rdx | |
323 | call syscall_trace_enter_phase2 | |
324 | ||
d4d67150 | 325 | /* |
e90e147c | 326 | * Reload registers from stack in case ptrace changed them. |
1dcf74f6 | 327 | * We don't reload %rax because syscall_trace_entry_phase2() returned |
d4d67150 RM |
328 | * the value it wants us to use in the table lookup. |
329 | */ | |
76f5df43 DV |
330 | RESTORE_C_REGS_EXCEPT_RAX |
331 | RESTORE_EXTRA_REGS | |
fca460f9 | 332 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 333 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
334 | #else |
335 | andl $__SYSCALL_MASK,%eax | |
336 | cmpl $__NR_syscall_max,%eax | |
337 | #endif | |
54eea995 | 338 | ja int_ret_from_sys_call /* RAX(%rsp) is already set */ |
1da177e4 LT |
339 | movq %r10,%rcx /* fixup for C */ |
340 | call *sys_call_table(,%rax,8) | |
f2db9382 | 341 | movq %rax,RAX(%rsp) |
7bf36bbc | 342 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
343 | |
344 | /* | |
1da177e4 LT |
345 | * Syscall return path ending with IRET. |
346 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 347 | */ |
bc8b2b92 | 348 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 349 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 350 | TRACE_IRQS_OFF |
1da177e4 LT |
351 | movl $_TIF_ALLWORK_MASK,%edi |
352 | /* edi: mask to check */ | |
bc8b2b92 | 353 | GLOBAL(int_with_check) |
10cd706d | 354 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 355 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 356 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
357 | andl %edi,%edx |
358 | jnz int_careful | |
26ccb8a7 | 359 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
360 | jmp retint_swapgs |
361 | ||
362 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
363 | /* First do a reschedule test. */ | |
364 | /* edx: work, edi: workmask */ | |
365 | int_careful: | |
366 | bt $TIF_NEED_RESCHED,%edx | |
367 | jnc int_very_careful | |
2601e64d | 368 | TRACE_IRQS_ON |
72fe4858 | 369 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 370 | pushq_cfi %rdi |
0430499c | 371 | SCHEDULE_USER |
df5d1874 | 372 | popq_cfi %rdi |
72fe4858 | 373 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 374 | TRACE_IRQS_OFF |
1da177e4 LT |
375 | jmp int_with_check |
376 | ||
377 | /* handle signals and tracing -- both require a full stack frame */ | |
378 | int_very_careful: | |
2601e64d | 379 | TRACE_IRQS_ON |
72fe4858 | 380 | ENABLE_INTERRUPTS(CLBR_NONE) |
76f5df43 | 381 | SAVE_EXTRA_REGS |
0bd7b798 | 382 | /* Check for syscall exit trace */ |
d4d67150 | 383 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 384 | jz int_signal |
df5d1874 | 385 | pushq_cfi %rdi |
0bd7b798 | 386 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 387 | call syscall_trace_leave |
df5d1874 | 388 | popq_cfi %rdi |
d4d67150 | 389 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 390 | jmp int_restore_rest |
0bd7b798 | 391 | |
1da177e4 | 392 | int_signal: |
8f4d37ec | 393 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
394 | jz 1f |
395 | movq %rsp,%rdi # &ptregs -> arg1 | |
396 | xorl %esi,%esi # oldset -> arg2 | |
397 | call do_notify_resume | |
eca91e78 | 398 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 | 399 | int_restore_rest: |
76f5df43 | 400 | RESTORE_EXTRA_REGS |
72fe4858 | 401 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 402 | TRACE_IRQS_OFF |
1da177e4 LT |
403 | jmp int_with_check |
404 | CFI_ENDPROC | |
bcddc015 | 405 | END(system_call) |
0bd7b798 | 406 | |
1d4b4b29 AV |
407 | .macro FORK_LIKE func |
408 | ENTRY(stub_\func) | |
409 | CFI_STARTPROC | |
76f5df43 DV |
410 | DEFAULT_FRAME 0, 8 /* offset 8: return address */ |
411 | SAVE_EXTRA_REGS 8 | |
1d4b4b29 | 412 | FIXUP_TOP_OF_STACK %r11, 8 |
1d4b4b29 AV |
413 | call sys_\func |
414 | RESTORE_TOP_OF_STACK %r11, 8 | |
76f5df43 | 415 | ret |
1d4b4b29 AV |
416 | CFI_ENDPROC |
417 | END(stub_\func) | |
418 | .endm | |
419 | ||
420 | FORK_LIKE clone | |
421 | FORK_LIKE fork | |
422 | FORK_LIKE vfork | |
1da177e4 | 423 | |
1da177e4 LT |
424 | ENTRY(stub_execve) |
425 | CFI_STARTPROC | |
e6b04b6b | 426 | addq $8, %rsp |
76f5df43 DV |
427 | DEFAULT_FRAME 0 |
428 | SAVE_EXTRA_REGS | |
1da177e4 LT |
429 | FIXUP_TOP_OF_STACK %r11 |
430 | call sys_execve | |
1da177e4 | 431 | movq %rax,RAX(%rsp) |
76f5df43 | 432 | RESTORE_EXTRA_REGS |
1da177e4 LT |
433 | jmp int_ret_from_sys_call |
434 | CFI_ENDPROC | |
4b787e0b | 435 | END(stub_execve) |
0bd7b798 | 436 | |
27d6ec7a DD |
437 | ENTRY(stub_execveat) |
438 | CFI_STARTPROC | |
439 | addq $8, %rsp | |
76f5df43 DV |
440 | DEFAULT_FRAME 0 |
441 | SAVE_EXTRA_REGS | |
27d6ec7a DD |
442 | FIXUP_TOP_OF_STACK %r11 |
443 | call sys_execveat | |
444 | RESTORE_TOP_OF_STACK %r11 | |
445 | movq %rax,RAX(%rsp) | |
76f5df43 | 446 | RESTORE_EXTRA_REGS |
27d6ec7a DD |
447 | jmp int_ret_from_sys_call |
448 | CFI_ENDPROC | |
449 | END(stub_execveat) | |
450 | ||
1da177e4 LT |
451 | /* |
452 | * sigreturn is special because it needs to restore all registers on return. | |
453 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 454 | */ |
1da177e4 LT |
455 | ENTRY(stub_rt_sigreturn) |
456 | CFI_STARTPROC | |
7effaa88 | 457 | addq $8, %rsp |
76f5df43 DV |
458 | DEFAULT_FRAME 0 |
459 | SAVE_EXTRA_REGS | |
1da177e4 LT |
460 | FIXUP_TOP_OF_STACK %r11 |
461 | call sys_rt_sigreturn | |
462 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
76f5df43 | 463 | RESTORE_EXTRA_REGS |
1da177e4 LT |
464 | jmp int_ret_from_sys_call |
465 | CFI_ENDPROC | |
4b787e0b | 466 | END(stub_rt_sigreturn) |
1da177e4 | 467 | |
c5a37394 | 468 | #ifdef CONFIG_X86_X32_ABI |
c5a37394 PA |
469 | ENTRY(stub_x32_rt_sigreturn) |
470 | CFI_STARTPROC | |
471 | addq $8, %rsp | |
76f5df43 DV |
472 | DEFAULT_FRAME 0 |
473 | SAVE_EXTRA_REGS | |
c5a37394 PA |
474 | FIXUP_TOP_OF_STACK %r11 |
475 | call sys32_x32_rt_sigreturn | |
476 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
76f5df43 | 477 | RESTORE_EXTRA_REGS |
c5a37394 PA |
478 | jmp int_ret_from_sys_call |
479 | CFI_ENDPROC | |
480 | END(stub_x32_rt_sigreturn) | |
481 | ||
d1a797f3 PA |
482 | ENTRY(stub_x32_execve) |
483 | CFI_STARTPROC | |
484 | addq $8, %rsp | |
76f5df43 DV |
485 | DEFAULT_FRAME 0 |
486 | SAVE_EXTRA_REGS | |
d1a797f3 | 487 | FIXUP_TOP_OF_STACK %r11 |
6783eaa2 | 488 | call compat_sys_execve |
d1a797f3 PA |
489 | RESTORE_TOP_OF_STACK %r11 |
490 | movq %rax,RAX(%rsp) | |
76f5df43 | 491 | RESTORE_EXTRA_REGS |
d1a797f3 PA |
492 | jmp int_ret_from_sys_call |
493 | CFI_ENDPROC | |
494 | END(stub_x32_execve) | |
495 | ||
27d6ec7a DD |
496 | ENTRY(stub_x32_execveat) |
497 | CFI_STARTPROC | |
498 | addq $8, %rsp | |
76f5df43 DV |
499 | DEFAULT_FRAME 0 |
500 | SAVE_EXTRA_REGS | |
27d6ec7a DD |
501 | FIXUP_TOP_OF_STACK %r11 |
502 | call compat_sys_execveat | |
503 | RESTORE_TOP_OF_STACK %r11 | |
504 | movq %rax,RAX(%rsp) | |
76f5df43 | 505 | RESTORE_EXTRA_REGS |
27d6ec7a DD |
506 | jmp int_ret_from_sys_call |
507 | CFI_ENDPROC | |
508 | END(stub_x32_execveat) | |
509 | ||
c5a37394 PA |
510 | #endif |
511 | ||
1eeb207f DV |
512 | /* |
513 | * A newly forked process directly context switches into this address. | |
514 | * | |
515 | * rdi: prev task we switched from | |
516 | */ | |
517 | ENTRY(ret_from_fork) | |
518 | DEFAULT_FRAME | |
519 | ||
520 | LOCK ; btr $TIF_FORK,TI_flags(%r8) | |
521 | ||
522 | pushq_cfi $0x0002 | |
523 | popfq_cfi # reset kernel eflags | |
524 | ||
525 | call schedule_tail # rdi: 'prev' task parameter | |
526 | ||
527 | GET_THREAD_INFO(%rcx) | |
528 | ||
529 | RESTORE_EXTRA_REGS | |
530 | ||
531 | testl $3,CS(%rsp) # from kernel_thread? | |
532 | jz 1f | |
533 | ||
1e3fbb8a AL |
534 | /* |
535 | * By the time we get here, we have no idea whether our pt_regs, | |
536 | * ti flags, and ti status came from the 64-bit SYSCALL fast path, | |
537 | * the slow path, or one of the ia32entry paths. | |
538 | * Use int_ret_from_sys_call to return, since it can safely handle | |
539 | * all of the above. | |
540 | */ | |
541 | jmp int_ret_from_sys_call | |
1eeb207f DV |
542 | |
543 | 1: | |
544 | movq %rbp, %rdi | |
545 | call *%rbx | |
546 | movl $0, RAX(%rsp) | |
547 | RESTORE_EXTRA_REGS | |
548 | jmp int_ret_from_sys_call | |
549 | CFI_ENDPROC | |
550 | END(ret_from_fork) | |
551 | ||
939b7871 PA |
552 | /* |
553 | * Build the entry stubs and pointer table with some assembler magic. | |
554 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
555 | * single cache line on all modern x86 implementations. | |
556 | */ | |
557 | .section .init.rodata,"a" | |
558 | ENTRY(interrupt) | |
ea714547 | 559 | .section .entry.text |
939b7871 PA |
560 | .p2align 5 |
561 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
562 | ENTRY(irq_entries_start) | |
563 | INTR_FRAME | |
564 | vector=FIRST_EXTERNAL_VECTOR | |
2414e021 | 565 | .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7 |
939b7871 PA |
566 | .balign 32 |
567 | .rept 7 | |
2414e021 | 568 | .if vector < FIRST_SYSTEM_VECTOR |
8665596e | 569 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
570 | CFI_ADJUST_CFA_OFFSET -8 |
571 | .endif | |
df5d1874 | 572 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 573 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
574 | jmp 2f |
575 | .endif | |
576 | .previous | |
577 | .quad 1b | |
ea714547 | 578 | .section .entry.text |
939b7871 PA |
579 | vector=vector+1 |
580 | .endif | |
581 | .endr | |
582 | 2: jmp common_interrupt | |
583 | .endr | |
584 | CFI_ENDPROC | |
585 | END(irq_entries_start) | |
586 | ||
587 | .previous | |
588 | END(interrupt) | |
589 | .previous | |
590 | ||
d99015b1 | 591 | /* |
1da177e4 LT |
592 | * Interrupt entry/exit. |
593 | * | |
594 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
595 | * |
596 | * Entry runs with interrupts off. | |
597 | */ | |
1da177e4 | 598 | |
722024db | 599 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 600 | .macro interrupt func |
f6f64681 | 601 | cld |
e90e147c DV |
602 | /* |
603 | * Since nothing in interrupt handling code touches r12...r15 members | |
604 | * of "struct pt_regs", and since interrupts can nest, we can save | |
605 | * four stack slots and simultaneously provide | |
606 | * an unwind-friendly stack layout by saving "truncated" pt_regs | |
607 | * exactly up to rbp slot, without these members. | |
608 | */ | |
76f5df43 DV |
609 | ALLOC_PT_GPREGS_ON_STACK -RBP |
610 | SAVE_C_REGS -RBP | |
611 | /* this goes to 0(%rsp) for unwinder, not for saving the value: */ | |
612 | SAVE_EXTRA_REGS_RBP -RBP | |
613 | ||
614 | leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */ | |
f6f64681 | 615 | |
76f5df43 | 616 | testl $3, CS-RBP(%rsp) |
f6f64681 DV |
617 | je 1f |
618 | SWAPGS | |
76f5df43 | 619 | 1: |
f6f64681 | 620 | /* |
e90e147c | 621 | * Save previous stack pointer, optionally switch to interrupt stack. |
f6f64681 DV |
622 | * irq_count is used to check if a CPU is already on an interrupt stack |
623 | * or not. While this is essentially redundant with preempt_count it is | |
624 | * a little cheaper to use a separate counter in the PDA (short of | |
625 | * moving irq_enter into assembly, which would be too much work) | |
626 | */ | |
76f5df43 DV |
627 | movq %rsp, %rsi |
628 | incl PER_CPU_VAR(irq_count) | |
f6f64681 DV |
629 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
630 | CFI_DEF_CFA_REGISTER rsi | |
f6f64681 | 631 | pushq %rsi |
911d2bb5 DV |
632 | /* |
633 | * For debugger: | |
634 | * "CFA (Current Frame Address) is the value on stack + offset" | |
635 | */ | |
f6f64681 | 636 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ |
911d2bb5 | 637 | 0x77 /* DW_OP_breg7 (rsp) */, 0, \ |
f6f64681 | 638 | 0x06 /* DW_OP_deref */, \ |
911d2bb5 | 639 | 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \ |
f6f64681 DV |
640 | 0x22 /* DW_OP_plus */ |
641 | /* We entered an interrupt context - irqs are off: */ | |
642 | TRACE_IRQS_OFF | |
643 | ||
1da177e4 LT |
644 | call \func |
645 | .endm | |
646 | ||
722024db AH |
647 | /* |
648 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
649 | * then jump to common_interrupt. | |
650 | */ | |
939b7871 PA |
651 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
652 | common_interrupt: | |
7effaa88 | 653 | XCPT_FRAME |
ee4eb87b | 654 | ASM_CLAC |
722024db | 655 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 656 | interrupt do_IRQ |
f2db9382 | 657 | /* 0(%rsp): old_rsp */ |
7effaa88 | 658 | ret_from_intr: |
72fe4858 | 659 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 660 | TRACE_IRQS_OFF |
56895530 | 661 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 662 | |
a2bbe750 FW |
663 | /* Restore saved previous stack */ |
664 | popq %rsi | |
911d2bb5 | 665 | CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */ |
e90e147c | 666 | /* return code expects complete pt_regs - adjust rsp accordingly: */ |
f2db9382 | 667 | leaq -RBP(%rsi),%rsp |
7effaa88 | 668 | CFI_DEF_CFA_REGISTER rsp |
f2db9382 | 669 | CFI_ADJUST_CFA_OFFSET RBP |
625dbc3b | 670 | |
7effaa88 | 671 | exit_intr: |
1da177e4 | 672 | GET_THREAD_INFO(%rcx) |
f2db9382 | 673 | testl $3,CS(%rsp) |
1da177e4 | 674 | je retint_kernel |
0bd7b798 | 675 | |
1da177e4 LT |
676 | /* Interrupt came from user space */ |
677 | /* | |
e90e147c | 678 | * Has a correct top of stack. |
1da177e4 | 679 | * %rcx: thread info. Interrupts off. |
0bd7b798 | 680 | */ |
1da177e4 LT |
681 | retint_with_reschedule: |
682 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 683 | retint_check: |
10cd706d | 684 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 685 | movl TI_flags(%rcx),%edx |
1da177e4 | 686 | andl %edi,%edx |
7effaa88 | 687 | CFI_REMEMBER_STATE |
1da177e4 | 688 | jnz retint_careful |
10cd706d PZ |
689 | |
690 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
691 | /* |
692 | * The iretq could re-enable interrupts: | |
693 | */ | |
72fe4858 | 694 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 695 | TRACE_IRQS_IRETQ |
2a23c6b8 AL |
696 | |
697 | /* | |
698 | * Try to use SYSRET instead of IRET if we're returning to | |
699 | * a completely clean 64-bit userspace context. | |
700 | */ | |
f2db9382 DV |
701 | movq RCX(%rsp),%rcx |
702 | cmpq %rcx,RIP(%rsp) /* RCX == RIP */ | |
2a23c6b8 AL |
703 | jne opportunistic_sysret_failed |
704 | ||
705 | /* | |
706 | * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP | |
707 | * in kernel space. This essentially lets the user take over | |
708 | * the kernel, since userspace controls RSP. It's not worth | |
709 | * testing for canonicalness exactly -- this check detects any | |
710 | * of the 17 high bits set, which is true for non-canonical | |
711 | * or kernel addresses. (This will pessimize vsyscall=native. | |
712 | * Big deal.) | |
713 | * | |
714 | * If virtual addresses ever become wider, this will need | |
715 | * to be updated to remain correct on both old and new CPUs. | |
716 | */ | |
717 | .ifne __VIRTUAL_MASK_SHIFT - 47 | |
718 | .error "virtual address width changed -- sysret checks need update" | |
719 | .endif | |
720 | shr $__VIRTUAL_MASK_SHIFT, %rcx | |
721 | jnz opportunistic_sysret_failed | |
722 | ||
f2db9382 | 723 | cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */ |
2a23c6b8 AL |
724 | jne opportunistic_sysret_failed |
725 | ||
f2db9382 DV |
726 | movq R11(%rsp),%r11 |
727 | cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */ | |
2a23c6b8 AL |
728 | jne opportunistic_sysret_failed |
729 | ||
f2db9382 | 730 | testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */ |
2a23c6b8 AL |
731 | jnz opportunistic_sysret_failed |
732 | ||
733 | /* nothing to check for RSP */ | |
734 | ||
f2db9382 | 735 | cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */ |
2a23c6b8 AL |
736 | jne opportunistic_sysret_failed |
737 | ||
738 | /* | |
739 | * We win! This label is here just for ease of understanding | |
740 | * perf profiles. Nothing jumps here. | |
741 | */ | |
742 | irq_return_via_sysret: | |
743 | CFI_REMEMBER_STATE | |
d441c1f2 DV |
744 | /* r11 is already restored (see code above) */ |
745 | RESTORE_C_REGS_EXCEPT_R11 | |
746 | movq RSP(%rsp),%rsp | |
2a23c6b8 AL |
747 | USERGS_SYSRET64 |
748 | CFI_RESTORE_STATE | |
749 | ||
750 | opportunistic_sysret_failed: | |
72fe4858 | 751 | SWAPGS |
2601e64d IM |
752 | jmp restore_args |
753 | ||
10cd706d | 754 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 755 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
756 | /* |
757 | * The iretq could re-enable interrupts: | |
758 | */ | |
759 | TRACE_IRQS_IRETQ | |
760 | restore_args: | |
76f5df43 DV |
761 | RESTORE_C_REGS |
762 | REMOVE_PT_GPREGS_FROM_STACK 8 | |
3701d863 | 763 | |
f7f3d791 | 764 | irq_return: |
7209a75d AL |
765 | INTERRUPT_RETURN |
766 | ||
767 | ENTRY(native_iret) | |
3891a04a PA |
768 | /* |
769 | * Are we returning to a stack segment from the LDT? Note: in | |
770 | * 64-bit mode SS:RSP on the exception stack is always valid. | |
771 | */ | |
34273f41 | 772 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a | 773 | testb $4,(SS-RIP)(%rsp) |
7209a75d | 774 | jnz native_irq_return_ldt |
34273f41 | 775 | #endif |
3891a04a | 776 | |
af726f21 | 777 | .global native_irq_return_iret |
7209a75d | 778 | native_irq_return_iret: |
b645af2d AL |
779 | /* |
780 | * This may fault. Non-paranoid faults on return to userspace are | |
781 | * handled by fixup_bad_iret. These include #SS, #GP, and #NP. | |
782 | * Double-faults due to espfix64 are handled in do_double_fault. | |
783 | * Other faults here are fatal. | |
784 | */ | |
1da177e4 | 785 | iretq |
3701d863 | 786 | |
34273f41 | 787 | #ifdef CONFIG_X86_ESPFIX64 |
7209a75d | 788 | native_irq_return_ldt: |
3891a04a PA |
789 | pushq_cfi %rax |
790 | pushq_cfi %rdi | |
791 | SWAPGS | |
792 | movq PER_CPU_VAR(espfix_waddr),%rdi | |
793 | movq %rax,(0*8)(%rdi) /* RAX */ | |
794 | movq (2*8)(%rsp),%rax /* RIP */ | |
795 | movq %rax,(1*8)(%rdi) | |
796 | movq (3*8)(%rsp),%rax /* CS */ | |
797 | movq %rax,(2*8)(%rdi) | |
798 | movq (4*8)(%rsp),%rax /* RFLAGS */ | |
799 | movq %rax,(3*8)(%rdi) | |
800 | movq (6*8)(%rsp),%rax /* SS */ | |
801 | movq %rax,(5*8)(%rdi) | |
802 | movq (5*8)(%rsp),%rax /* RSP */ | |
803 | movq %rax,(4*8)(%rdi) | |
804 | andl $0xffff0000,%eax | |
805 | popq_cfi %rdi | |
806 | orq PER_CPU_VAR(espfix_stack),%rax | |
807 | SWAPGS | |
808 | movq %rax,%rsp | |
809 | popq_cfi %rax | |
7209a75d | 810 | jmp native_irq_return_iret |
34273f41 | 811 | #endif |
3891a04a | 812 | |
7effaa88 | 813 | /* edi: workmask, edx: work */ |
1da177e4 | 814 | retint_careful: |
7effaa88 | 815 | CFI_RESTORE_STATE |
1da177e4 LT |
816 | bt $TIF_NEED_RESCHED,%edx |
817 | jnc retint_signal | |
2601e64d | 818 | TRACE_IRQS_ON |
72fe4858 | 819 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 820 | pushq_cfi %rdi |
0430499c | 821 | SCHEDULE_USER |
df5d1874 | 822 | popq_cfi %rdi |
1da177e4 | 823 | GET_THREAD_INFO(%rcx) |
72fe4858 | 824 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 825 | TRACE_IRQS_OFF |
1da177e4 | 826 | jmp retint_check |
0bd7b798 | 827 | |
1da177e4 | 828 | retint_signal: |
8f4d37ec | 829 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 830 | jz retint_swapgs |
2601e64d | 831 | TRACE_IRQS_ON |
72fe4858 | 832 | ENABLE_INTERRUPTS(CLBR_NONE) |
76f5df43 | 833 | SAVE_EXTRA_REGS |
0bd7b798 | 834 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 835 | xorl %esi,%esi # oldset |
1da177e4 LT |
836 | movq %rsp,%rdi # &pt_regs |
837 | call do_notify_resume | |
76f5df43 | 838 | RESTORE_EXTRA_REGS |
72fe4858 | 839 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 840 | TRACE_IRQS_OFF |
be9e6870 | 841 | GET_THREAD_INFO(%rcx) |
eca91e78 | 842 | jmp retint_with_reschedule |
1da177e4 LT |
843 | |
844 | #ifdef CONFIG_PREEMPT | |
845 | /* Returning to kernel space. Check if we need preemption */ | |
846 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 847 | ENTRY(retint_kernel) |
c2daa3be | 848 | cmpl $0,PER_CPU_VAR(__preempt_count) |
1da177e4 | 849 | jnz retint_restore_args |
f2db9382 | 850 | bt $9,EFLAGS(%rsp) /* interrupts off? */ |
1da177e4 LT |
851 | jnc retint_restore_args |
852 | call preempt_schedule_irq | |
853 | jmp exit_intr | |
0bd7b798 | 854 | #endif |
1da177e4 | 855 | CFI_ENDPROC |
4b787e0b | 856 | END(common_interrupt) |
3891a04a | 857 | |
1da177e4 LT |
858 | /* |
859 | * APIC interrupts. | |
0bd7b798 | 860 | */ |
cf910e83 | 861 | .macro apicinterrupt3 num sym do_sym |
322648d1 | 862 | ENTRY(\sym) |
7effaa88 | 863 | INTR_FRAME |
ee4eb87b | 864 | ASM_CLAC |
df5d1874 | 865 | pushq_cfi $~(\num) |
39e95433 | 866 | .Lcommon_\sym: |
322648d1 | 867 | interrupt \do_sym |
1da177e4 LT |
868 | jmp ret_from_intr |
869 | CFI_ENDPROC | |
322648d1 AH |
870 | END(\sym) |
871 | .endm | |
1da177e4 | 872 | |
cf910e83 SA |
873 | #ifdef CONFIG_TRACING |
874 | #define trace(sym) trace_##sym | |
875 | #define smp_trace(sym) smp_trace_##sym | |
876 | ||
877 | .macro trace_apicinterrupt num sym | |
878 | apicinterrupt3 \num trace(\sym) smp_trace(\sym) | |
879 | .endm | |
880 | #else | |
881 | .macro trace_apicinterrupt num sym do_sym | |
882 | .endm | |
883 | #endif | |
884 | ||
885 | .macro apicinterrupt num sym do_sym | |
886 | apicinterrupt3 \num \sym \do_sym | |
887 | trace_apicinterrupt \num \sym | |
888 | .endm | |
889 | ||
322648d1 | 890 | #ifdef CONFIG_SMP |
cf910e83 | 891 | apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \ |
322648d1 | 892 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
cf910e83 | 893 | apicinterrupt3 REBOOT_VECTOR \ |
4ef702c1 | 894 | reboot_interrupt smp_reboot_interrupt |
322648d1 | 895 | #endif |
1da177e4 | 896 | |
03b48632 | 897 | #ifdef CONFIG_X86_UV |
cf910e83 | 898 | apicinterrupt3 UV_BAU_MESSAGE \ |
322648d1 | 899 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 900 | #endif |
322648d1 AH |
901 | apicinterrupt LOCAL_TIMER_VECTOR \ |
902 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
903 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
904 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 905 | |
d78f2664 | 906 | #ifdef CONFIG_HAVE_KVM |
cf910e83 | 907 | apicinterrupt3 POSTED_INTR_VECTOR \ |
d78f2664 YZ |
908 | kvm_posted_intr_ipi smp_kvm_posted_intr_ipi |
909 | #endif | |
910 | ||
33e5ff63 | 911 | #ifdef CONFIG_X86_MCE_THRESHOLD |
322648d1 | 912 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 913 | threshold_interrupt smp_threshold_interrupt |
33e5ff63 SA |
914 | #endif |
915 | ||
916 | #ifdef CONFIG_X86_THERMAL_VECTOR | |
322648d1 AH |
917 | apicinterrupt THERMAL_APIC_VECTOR \ |
918 | thermal_interrupt smp_thermal_interrupt | |
33e5ff63 | 919 | #endif |
1812924b | 920 | |
322648d1 AH |
921 | #ifdef CONFIG_SMP |
922 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
923 | call_function_single_interrupt smp_call_function_single_interrupt | |
924 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
925 | call_function_interrupt smp_call_function_interrupt | |
926 | apicinterrupt RESCHEDULE_VECTOR \ | |
927 | reschedule_interrupt smp_reschedule_interrupt | |
928 | #endif | |
1da177e4 | 929 | |
322648d1 AH |
930 | apicinterrupt ERROR_APIC_VECTOR \ |
931 | error_interrupt smp_error_interrupt | |
932 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
933 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 934 | |
e360adbe PZ |
935 | #ifdef CONFIG_IRQ_WORK |
936 | apicinterrupt IRQ_WORK_VECTOR \ | |
937 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
938 | #endif |
939 | ||
1da177e4 LT |
940 | /* |
941 | * Exception entry points. | |
0bd7b798 | 942 | */ |
9b476688 | 943 | #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8) |
577ed45e AL |
944 | |
945 | .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 | |
322648d1 | 946 | ENTRY(\sym) |
577ed45e AL |
947 | /* Sanity check */ |
948 | .if \shift_ist != -1 && \paranoid == 0 | |
949 | .error "using shift_ist requires paranoid=1" | |
950 | .endif | |
951 | ||
cb5dd2c5 AL |
952 | .if \has_error_code |
953 | XCPT_FRAME | |
954 | .else | |
7effaa88 | 955 | INTR_FRAME |
cb5dd2c5 | 956 | .endif |
1da177e4 | 957 | |
ee4eb87b | 958 | ASM_CLAC |
b8b1d08b | 959 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
cb5dd2c5 AL |
960 | |
961 | .ifeq \has_error_code | |
962 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | |
963 | .endif | |
964 | ||
76f5df43 | 965 | ALLOC_PT_GPREGS_ON_STACK |
cb5dd2c5 AL |
966 | |
967 | .if \paranoid | |
48e08d0f AL |
968 | .if \paranoid == 1 |
969 | CFI_REMEMBER_STATE | |
970 | testl $3, CS(%rsp) /* If coming from userspace, switch */ | |
971 | jnz 1f /* stacks. */ | |
972 | .endif | |
ebfc453e | 973 | call paranoid_entry |
cb5dd2c5 AL |
974 | .else |
975 | call error_entry | |
976 | .endif | |
ebfc453e | 977 | /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */ |
cb5dd2c5 | 978 | |
1bd24efc | 979 | DEFAULT_FRAME 0 |
cb5dd2c5 AL |
980 | |
981 | .if \paranoid | |
577ed45e AL |
982 | .if \shift_ist != -1 |
983 | TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ | |
984 | .else | |
b8b1d08b | 985 | TRACE_IRQS_OFF |
cb5dd2c5 | 986 | .endif |
577ed45e | 987 | .endif |
cb5dd2c5 AL |
988 | |
989 | movq %rsp,%rdi /* pt_regs pointer */ | |
990 | ||
991 | .if \has_error_code | |
992 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
993 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
994 | .else | |
995 | xorl %esi,%esi /* no error code */ | |
996 | .endif | |
997 | ||
577ed45e | 998 | .if \shift_ist != -1 |
9b476688 | 999 | subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) |
577ed45e AL |
1000 | .endif |
1001 | ||
322648d1 | 1002 | call \do_sym |
cb5dd2c5 | 1003 | |
577ed45e | 1004 | .if \shift_ist != -1 |
9b476688 | 1005 | addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist) |
577ed45e AL |
1006 | .endif |
1007 | ||
ebfc453e | 1008 | /* these procedures expect "no swapgs" flag in ebx */ |
cb5dd2c5 | 1009 | .if \paranoid |
ebfc453e | 1010 | jmp paranoid_exit |
cb5dd2c5 | 1011 | .else |
ebfc453e | 1012 | jmp error_exit |
cb5dd2c5 AL |
1013 | .endif |
1014 | ||
48e08d0f AL |
1015 | .if \paranoid == 1 |
1016 | CFI_RESTORE_STATE | |
1017 | /* | |
1018 | * Paranoid entry from userspace. Switch stacks and treat it | |
1019 | * as a normal entry. This means that paranoid handlers | |
1020 | * run in real process context if user_mode(regs). | |
1021 | */ | |
1022 | 1: | |
1023 | call error_entry | |
1024 | ||
1025 | DEFAULT_FRAME 0 | |
1026 | ||
1027 | movq %rsp,%rdi /* pt_regs pointer */ | |
1028 | call sync_regs | |
1029 | movq %rax,%rsp /* switch stack */ | |
1030 | ||
1031 | movq %rsp,%rdi /* pt_regs pointer */ | |
1032 | ||
1033 | .if \has_error_code | |
1034 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1035 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1036 | .else | |
1037 | xorl %esi,%esi /* no error code */ | |
1038 | .endif | |
1039 | ||
1040 | call \do_sym | |
1041 | ||
1042 | jmp error_exit /* %ebx: no swapgs flag */ | |
1043 | .endif | |
1044 | ||
b8b1d08b | 1045 | CFI_ENDPROC |
ddeb8f21 | 1046 | END(\sym) |
322648d1 | 1047 | .endm |
b8b1d08b | 1048 | |
25c74b10 | 1049 | #ifdef CONFIG_TRACING |
cb5dd2c5 AL |
1050 | .macro trace_idtentry sym do_sym has_error_code:req |
1051 | idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code | |
1052 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1053 | .endm |
1054 | #else | |
cb5dd2c5 AL |
1055 | .macro trace_idtentry sym do_sym has_error_code:req |
1056 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1057 | .endm |
1058 | #endif | |
1059 | ||
cb5dd2c5 AL |
1060 | idtentry divide_error do_divide_error has_error_code=0 |
1061 | idtentry overflow do_overflow has_error_code=0 | |
1062 | idtentry bounds do_bounds has_error_code=0 | |
1063 | idtentry invalid_op do_invalid_op has_error_code=0 | |
1064 | idtentry device_not_available do_device_not_available has_error_code=0 | |
48e08d0f | 1065 | idtentry double_fault do_double_fault has_error_code=1 paranoid=2 |
cb5dd2c5 AL |
1066 | idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 |
1067 | idtentry invalid_TSS do_invalid_TSS has_error_code=1 | |
1068 | idtentry segment_not_present do_segment_not_present has_error_code=1 | |
1069 | idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 | |
1070 | idtentry coprocessor_error do_coprocessor_error has_error_code=0 | |
1071 | idtentry alignment_check do_alignment_check has_error_code=1 | |
1072 | idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 | |
5cec93c2 | 1073 | |
2601e64d | 1074 | |
9f1e87ea CG |
1075 | /* Reload gs selector with exception handling */ |
1076 | /* edi: new selector */ | |
9f9d489a | 1077 | ENTRY(native_load_gs_index) |
7effaa88 | 1078 | CFI_STARTPROC |
df5d1874 | 1079 | pushfq_cfi |
b8aa287f | 1080 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1081 | SWAPGS |
0bd7b798 | 1082 | gs_change: |
9f1e87ea | 1083 | movl %edi,%gs |
1da177e4 | 1084 | 2: mfence /* workaround */ |
72fe4858 | 1085 | SWAPGS |
df5d1874 | 1086 | popfq_cfi |
9f1e87ea | 1087 | ret |
7effaa88 | 1088 | CFI_ENDPROC |
6efdcfaf | 1089 | END(native_load_gs_index) |
0bd7b798 | 1090 | |
d7abc0fa | 1091 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1092 | .section .fixup,"ax" |
1da177e4 | 1093 | /* running with kernelgs */ |
0bd7b798 | 1094 | bad_gs: |
72fe4858 | 1095 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1096 | xorl %eax,%eax |
9f1e87ea CG |
1097 | movl %eax,%gs |
1098 | jmp 2b | |
1099 | .previous | |
0bd7b798 | 1100 | |
2699500b | 1101 | /* Call softirq on interrupt stack. Interrupts are off. */ |
7d65f4a6 | 1102 | ENTRY(do_softirq_own_stack) |
7effaa88 | 1103 | CFI_STARTPROC |
df5d1874 | 1104 | pushq_cfi %rbp |
2699500b AK |
1105 | CFI_REL_OFFSET rbp,0 |
1106 | mov %rsp,%rbp | |
1107 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1108 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1109 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1110 | push %rbp # backlink for old unwinder |
ed6b676c | 1111 | call __do_softirq |
2699500b | 1112 | leaveq |
df5d1874 | 1113 | CFI_RESTORE rbp |
7effaa88 | 1114 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1115 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1116 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1117 | ret |
7effaa88 | 1118 | CFI_ENDPROC |
7d65f4a6 | 1119 | END(do_softirq_own_stack) |
75154f40 | 1120 | |
3d75e1b8 | 1121 | #ifdef CONFIG_XEN |
cb5dd2c5 | 1122 | idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 |
3d75e1b8 JF |
1123 | |
1124 | /* | |
9f1e87ea CG |
1125 | * A note on the "critical region" in our callback handler. |
1126 | * We want to avoid stacking callback handlers due to events occurring | |
1127 | * during handling of the last event. To do this, we keep events disabled | |
1128 | * until we've done all processing. HOWEVER, we must enable events before | |
1129 | * popping the stack frame (can't be done atomically) and so it would still | |
1130 | * be possible to get enough handler activations to overflow the stack. | |
1131 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1132 | * like to avoid the possibility. | |
1133 | * So, on entry to the handler we detect whether we interrupted an | |
1134 | * existing activation in its critical region -- if so, we pop the current | |
1135 | * activation and restart the handler using the previous one. | |
1136 | */ | |
3d75e1b8 JF |
1137 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1138 | CFI_STARTPROC | |
9f1e87ea CG |
1139 | /* |
1140 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1141 | * see the correct pointer to the pt_regs | |
1142 | */ | |
3d75e1b8 JF |
1143 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1144 | CFI_ENDPROC | |
dcd072e2 | 1145 | DEFAULT_FRAME |
56895530 | 1146 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1147 | movq %rsp,%rbp |
1148 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1149 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1150 | pushq %rbp # backlink for old unwinder |
1151 | call xen_evtchn_do_upcall | |
1152 | popq %rsp | |
1153 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1154 | decl PER_CPU_VAR(irq_count) |
fdfd811d DV |
1155 | #ifndef CONFIG_PREEMPT |
1156 | call xen_maybe_preempt_hcall | |
1157 | #endif | |
3d75e1b8 JF |
1158 | jmp error_exit |
1159 | CFI_ENDPROC | |
371c394a | 1160 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1161 | |
1162 | /* | |
9f1e87ea CG |
1163 | * Hypervisor uses this for application faults while it executes. |
1164 | * We get here for two reasons: | |
1165 | * 1. Fault while reloading DS, ES, FS or GS | |
1166 | * 2. Fault while executing IRET | |
1167 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1168 | * registers that could be reloaded and zeroed the others. | |
1169 | * Category 2 we fix up by killing the current process. We cannot use the | |
1170 | * normal Linux return path in this case because if we use the IRET hypercall | |
1171 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1172 | * We distinguish between categories by comparing each saved segment register | |
1173 | * with its current contents: any discrepancy means we in category 1. | |
1174 | */ | |
3d75e1b8 | 1175 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1176 | INTR_FRAME 1 (6*8) |
1177 | /*CFI_REL_OFFSET gs,GS*/ | |
1178 | /*CFI_REL_OFFSET fs,FS*/ | |
1179 | /*CFI_REL_OFFSET es,ES*/ | |
1180 | /*CFI_REL_OFFSET ds,DS*/ | |
1181 | CFI_REL_OFFSET r11,8 | |
1182 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1183 | movw %ds,%cx |
1184 | cmpw %cx,0x10(%rsp) | |
1185 | CFI_REMEMBER_STATE | |
1186 | jne 1f | |
1187 | movw %es,%cx | |
1188 | cmpw %cx,0x18(%rsp) | |
1189 | jne 1f | |
1190 | movw %fs,%cx | |
1191 | cmpw %cx,0x20(%rsp) | |
1192 | jne 1f | |
1193 | movw %gs,%cx | |
1194 | cmpw %cx,0x28(%rsp) | |
1195 | jne 1f | |
1196 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1197 | movq (%rsp),%rcx | |
1198 | CFI_RESTORE rcx | |
1199 | movq 8(%rsp),%r11 | |
1200 | CFI_RESTORE r11 | |
1201 | addq $0x30,%rsp | |
1202 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1203 | pushq_cfi $0 /* RIP */ |
1204 | pushq_cfi %r11 | |
1205 | pushq_cfi %rcx | |
4a5c3e77 | 1206 | jmp general_protection |
3d75e1b8 JF |
1207 | CFI_RESTORE_STATE |
1208 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1209 | movq (%rsp),%rcx | |
1210 | CFI_RESTORE rcx | |
1211 | movq 8(%rsp),%r11 | |
1212 | CFI_RESTORE r11 | |
1213 | addq $0x30,%rsp | |
1214 | CFI_ADJUST_CFA_OFFSET -0x30 | |
a349e23d | 1215 | pushq_cfi $-1 /* orig_ax = -1 => not a system call */ |
76f5df43 DV |
1216 | ALLOC_PT_GPREGS_ON_STACK |
1217 | SAVE_C_REGS | |
1218 | SAVE_EXTRA_REGS | |
3d75e1b8 JF |
1219 | jmp error_exit |
1220 | CFI_ENDPROC | |
3d75e1b8 JF |
1221 | END(xen_failsafe_callback) |
1222 | ||
cf910e83 | 1223 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
38e20b07 SY |
1224 | xen_hvm_callback_vector xen_evtchn_do_upcall |
1225 | ||
3d75e1b8 | 1226 | #endif /* CONFIG_XEN */ |
ddeb8f21 | 1227 | |
bc2b0331 | 1228 | #if IS_ENABLED(CONFIG_HYPERV) |
cf910e83 | 1229 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
bc2b0331 S |
1230 | hyperv_callback_vector hyperv_vector_handler |
1231 | #endif /* CONFIG_HYPERV */ | |
1232 | ||
577ed45e AL |
1233 | idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK |
1234 | idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK | |
6f442be2 | 1235 | idtentry stack_segment do_stack_segment has_error_code=1 |
6cac5a92 | 1236 | #ifdef CONFIG_XEN |
cb5dd2c5 AL |
1237 | idtentry xen_debug do_debug has_error_code=0 |
1238 | idtentry xen_int3 do_int3 has_error_code=0 | |
1239 | idtentry xen_stack_segment do_stack_segment has_error_code=1 | |
6cac5a92 | 1240 | #endif |
cb5dd2c5 AL |
1241 | idtentry general_protection do_general_protection has_error_code=1 |
1242 | trace_idtentry page_fault do_page_fault has_error_code=1 | |
631bc487 | 1243 | #ifdef CONFIG_KVM_GUEST |
cb5dd2c5 | 1244 | idtentry async_page_fault do_async_page_fault has_error_code=1 |
631bc487 | 1245 | #endif |
ddeb8f21 | 1246 | #ifdef CONFIG_X86_MCE |
cb5dd2c5 | 1247 | idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) |
ddeb8f21 AH |
1248 | #endif |
1249 | ||
ebfc453e DV |
1250 | /* |
1251 | * Save all registers in pt_regs, and switch gs if needed. | |
1252 | * Use slow, but surefire "are we in kernel?" check. | |
1253 | * Return: ebx=0: need swapgs on exit, ebx=1: otherwise | |
1254 | */ | |
1255 | ENTRY(paranoid_entry) | |
1256 | XCPT_FRAME 1 15*8 | |
1eeb207f DV |
1257 | cld |
1258 | SAVE_C_REGS 8 | |
1259 | SAVE_EXTRA_REGS 8 | |
1260 | movl $1,%ebx | |
1261 | movl $MSR_GS_BASE,%ecx | |
1262 | rdmsr | |
1263 | testl %edx,%edx | |
1264 | js 1f /* negative -> in kernel */ | |
1265 | SWAPGS | |
1266 | xorl %ebx,%ebx | |
1267 | 1: ret | |
1268 | CFI_ENDPROC | |
ebfc453e | 1269 | END(paranoid_entry) |
ddeb8f21 | 1270 | |
ebfc453e DV |
1271 | /* |
1272 | * "Paranoid" exit path from exception stack. This is invoked | |
1273 | * only on return from non-NMI IST interrupts that came | |
1274 | * from kernel space. | |
1275 | * | |
1276 | * We may be returning to very strange contexts (e.g. very early | |
1277 | * in syscall entry), so checking for preemption here would | |
1278 | * be complicated. Fortunately, we there's no good reason | |
1279 | * to try to handle preemption here. | |
1280 | */ | |
1281 | /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */ | |
ddeb8f21 | 1282 | ENTRY(paranoid_exit) |
1f130a78 | 1283 | DEFAULT_FRAME |
ddeb8f21 | 1284 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1285 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 | 1286 | testl %ebx,%ebx /* swapgs needed? */ |
0d550836 | 1287 | jnz paranoid_exit_no_swapgs |
f2db9382 | 1288 | TRACE_IRQS_IRETQ |
ddeb8f21 | 1289 | SWAPGS_UNSAFE_STACK |
0d550836 DV |
1290 | jmp paranoid_exit_restore |
1291 | paranoid_exit_no_swapgs: | |
f2db9382 | 1292 | TRACE_IRQS_IRETQ_DEBUG |
0d550836 | 1293 | paranoid_exit_restore: |
76f5df43 DV |
1294 | RESTORE_EXTRA_REGS |
1295 | RESTORE_C_REGS | |
1296 | REMOVE_PT_GPREGS_FROM_STACK 8 | |
48e08d0f | 1297 | INTERRUPT_RETURN |
ddeb8f21 AH |
1298 | CFI_ENDPROC |
1299 | END(paranoid_exit) | |
1300 | ||
1301 | /* | |
ebfc453e DV |
1302 | * Save all registers in pt_regs, and switch gs if needed. |
1303 | * Return: ebx=0: need swapgs on exit, ebx=1: otherwise | |
ddeb8f21 AH |
1304 | */ |
1305 | ENTRY(error_entry) | |
ebfc453e | 1306 | XCPT_FRAME 1 15*8 |
ddeb8f21 | 1307 | cld |
76f5df43 DV |
1308 | SAVE_C_REGS 8 |
1309 | SAVE_EXTRA_REGS 8 | |
ddeb8f21 AH |
1310 | xorl %ebx,%ebx |
1311 | testl $3,CS+8(%rsp) | |
1312 | je error_kernelspace | |
1313 | error_swapgs: | |
1314 | SWAPGS | |
1315 | error_sti: | |
1316 | TRACE_IRQS_OFF | |
1317 | ret | |
ddeb8f21 | 1318 | |
ebfc453e DV |
1319 | /* |
1320 | * There are two places in the kernel that can potentially fault with | |
1321 | * usergs. Handle them here. B stepping K8s sometimes report a | |
1322 | * truncated RIP for IRET exceptions returning to compat mode. Check | |
1323 | * for these here too. | |
1324 | */ | |
ddeb8f21 | 1325 | error_kernelspace: |
3bab13b0 | 1326 | CFI_REL_OFFSET rcx, RCX+8 |
ddeb8f21 | 1327 | incl %ebx |
7209a75d | 1328 | leaq native_irq_return_iret(%rip),%rcx |
ddeb8f21 | 1329 | cmpq %rcx,RIP+8(%rsp) |
b645af2d | 1330 | je error_bad_iret |
ae24ffe5 BG |
1331 | movl %ecx,%eax /* zero extend */ |
1332 | cmpq %rax,RIP+8(%rsp) | |
1333 | je bstep_iret | |
ddeb8f21 | 1334 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1335 | je error_swapgs |
ddeb8f21 | 1336 | jmp error_sti |
ae24ffe5 BG |
1337 | |
1338 | bstep_iret: | |
1339 | /* Fix truncated RIP */ | |
1340 | movq %rcx,RIP+8(%rsp) | |
b645af2d AL |
1341 | /* fall through */ |
1342 | ||
1343 | error_bad_iret: | |
1344 | SWAPGS | |
1345 | mov %rsp,%rdi | |
1346 | call fixup_bad_iret | |
1347 | mov %rax,%rsp | |
1348 | decl %ebx /* Return to usergs */ | |
1349 | jmp error_sti | |
e6b04b6b | 1350 | CFI_ENDPROC |
ddeb8f21 AH |
1351 | END(error_entry) |
1352 | ||
1353 | ||
ebfc453e | 1354 | /* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */ |
ddeb8f21 AH |
1355 | ENTRY(error_exit) |
1356 | DEFAULT_FRAME | |
1357 | movl %ebx,%eax | |
76f5df43 | 1358 | RESTORE_EXTRA_REGS |
ddeb8f21 AH |
1359 | DISABLE_INTERRUPTS(CLBR_NONE) |
1360 | TRACE_IRQS_OFF | |
1361 | GET_THREAD_INFO(%rcx) | |
1362 | testl %eax,%eax | |
1363 | jne retint_kernel | |
1364 | LOCKDEP_SYS_EXIT_IRQ | |
1365 | movl TI_flags(%rcx),%edx | |
1366 | movl $_TIF_WORK_MASK,%edi | |
1367 | andl %edi,%edx | |
1368 | jnz retint_careful | |
1369 | jmp retint_swapgs | |
1370 | CFI_ENDPROC | |
1371 | END(error_exit) | |
1372 | ||
3f3c8b8c SR |
1373 | /* |
1374 | * Test if a given stack is an NMI stack or not. | |
1375 | */ | |
1376 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1377 | cmpq %\reg, \stack | |
1378 | ja \normal_ret | |
1379 | subq $EXCEPTION_STKSZ, %\reg | |
1380 | cmpq %\reg, \stack | |
1381 | jb \normal_ret | |
1382 | jmp \nmi_ret | |
1383 | .endm | |
ddeb8f21 AH |
1384 | |
1385 | /* runs on exception stack */ | |
1386 | ENTRY(nmi) | |
1387 | INTR_FRAME | |
1388 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1389 | /* |
1390 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1391 | * the iretq it performs will take us out of NMI context. | |
1392 | * This means that we can have nested NMIs where the next | |
1393 | * NMI is using the top of the stack of the previous NMI. We | |
1394 | * can't let it execute because the nested NMI will corrupt the | |
1395 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1396 | * anyway. | |
1397 | * | |
1398 | * To handle this case we do the following: | |
1399 | * Check the a special location on the stack that contains | |
1400 | * a variable that is set when NMIs are executing. | |
1401 | * The interrupted task's stack is also checked to see if it | |
1402 | * is an NMI stack. | |
1403 | * If the variable is not set and the stack is not the NMI | |
1404 | * stack then: | |
1405 | * o Set the special variable on the stack | |
1406 | * o Copy the interrupt frame into a "saved" location on the stack | |
1407 | * o Copy the interrupt frame into a "copy" location on the stack | |
1408 | * o Continue processing the NMI | |
1409 | * If the variable is set or the previous stack is the NMI stack: | |
1410 | * o Modify the "copy" location to jump to the repeate_nmi | |
1411 | * o return back to the first NMI | |
1412 | * | |
1413 | * Now on exit of the first NMI, we first clear the stack variable | |
1414 | * The NMI stack will tell any nested NMIs at that point that it is | |
1415 | * nested. Then we pop the stack normally with iret, and if there was | |
1416 | * a nested NMI that updated the copy interrupt stack frame, a | |
1417 | * jump will be made to the repeat_nmi code that will handle the second | |
1418 | * NMI. | |
1419 | */ | |
1420 | ||
1421 | /* Use %rdx as out temp variable throughout */ | |
1422 | pushq_cfi %rdx | |
62610913 | 1423 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1424 | |
45d5a168 SR |
1425 | /* |
1426 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1427 | * space, which means it is definitely not nested. | |
1428 | */ | |
a38449ef | 1429 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1430 | jne first_nmi |
1431 | ||
3f3c8b8c SR |
1432 | /* |
1433 | * Check the special variable on the stack to see if NMIs are | |
1434 | * executing. | |
1435 | */ | |
a38449ef | 1436 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1437 | je nested_nmi |
1438 | ||
1439 | /* | |
1440 | * Now test if the previous stack was an NMI stack. | |
1441 | * We need the double check. We check the NMI stack to satisfy the | |
1442 | * race when the first NMI clears the variable before returning. | |
1443 | * We check the variable because the first NMI could be in a | |
1444 | * breakpoint routine using a breakpoint stack. | |
1445 | */ | |
1446 | lea 6*8(%rsp), %rdx | |
1447 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1448 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1449 | |
1450 | nested_nmi: | |
1451 | /* | |
1452 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1453 | * It's about to repeat the NMI handler, so we are fine | |
1454 | * with ignoring this one. | |
1455 | */ | |
1456 | movq $repeat_nmi, %rdx | |
1457 | cmpq 8(%rsp), %rdx | |
1458 | ja 1f | |
1459 | movq $end_repeat_nmi, %rdx | |
1460 | cmpq 8(%rsp), %rdx | |
1461 | ja nested_nmi_out | |
1462 | ||
1463 | 1: | |
1464 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
28696f43 | 1465 | leaq -1*8(%rsp), %rdx |
3f3c8b8c | 1466 | movq %rdx, %rsp |
28696f43 SQ |
1467 | CFI_ADJUST_CFA_OFFSET 1*8 |
1468 | leaq -10*8(%rsp), %rdx | |
3f3c8b8c SR |
1469 | pushq_cfi $__KERNEL_DS |
1470 | pushq_cfi %rdx | |
1471 | pushfq_cfi | |
1472 | pushq_cfi $__KERNEL_CS | |
1473 | pushq_cfi $repeat_nmi | |
1474 | ||
1475 | /* Put stack back */ | |
28696f43 SQ |
1476 | addq $(6*8), %rsp |
1477 | CFI_ADJUST_CFA_OFFSET -6*8 | |
3f3c8b8c SR |
1478 | |
1479 | nested_nmi_out: | |
1480 | popq_cfi %rdx | |
62610913 | 1481 | CFI_RESTORE rdx |
3f3c8b8c SR |
1482 | |
1483 | /* No need to check faults here */ | |
1484 | INTERRUPT_RETURN | |
1485 | ||
62610913 | 1486 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1487 | first_nmi: |
1488 | /* | |
1489 | * Because nested NMIs will use the pushed location that we | |
1490 | * stored in rdx, we must keep that space available. | |
1491 | * Here's what our stack frame will look like: | |
1492 | * +-------------------------+ | |
1493 | * | original SS | | |
1494 | * | original Return RSP | | |
1495 | * | original RFLAGS | | |
1496 | * | original CS | | |
1497 | * | original RIP | | |
1498 | * +-------------------------+ | |
1499 | * | temp storage for rdx | | |
1500 | * +-------------------------+ | |
1501 | * | NMI executing variable | | |
1502 | * +-------------------------+ | |
3f3c8b8c SR |
1503 | * | copied SS | |
1504 | * | copied Return RSP | | |
1505 | * | copied RFLAGS | | |
1506 | * | copied CS | | |
1507 | * | copied RIP | | |
1508 | * +-------------------------+ | |
28696f43 SQ |
1509 | * | Saved SS | |
1510 | * | Saved Return RSP | | |
1511 | * | Saved RFLAGS | | |
1512 | * | Saved CS | | |
1513 | * | Saved RIP | | |
1514 | * +-------------------------+ | |
3f3c8b8c SR |
1515 | * | pt_regs | |
1516 | * +-------------------------+ | |
1517 | * | |
79fb4ad6 SR |
1518 | * The saved stack frame is used to fix up the copied stack frame |
1519 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1520 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1521 | * is also used by nested NMIs and can not be trusted on exit. |
1522 | */ | |
79fb4ad6 | 1523 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1524 | movq (%rsp), %rdx |
1525 | CFI_RESTORE rdx | |
1526 | ||
3f3c8b8c SR |
1527 | /* Set the NMI executing variable on the stack. */ |
1528 | pushq_cfi $1 | |
1529 | ||
28696f43 SQ |
1530 | /* |
1531 | * Leave room for the "copied" frame | |
1532 | */ | |
1533 | subq $(5*8), %rsp | |
444723dc | 1534 | CFI_ADJUST_CFA_OFFSET 5*8 |
28696f43 | 1535 | |
3f3c8b8c SR |
1536 | /* Copy the stack frame to the Saved frame */ |
1537 | .rept 5 | |
28696f43 | 1538 | pushq_cfi 11*8(%rsp) |
3f3c8b8c | 1539 | .endr |
911d2bb5 | 1540 | CFI_DEF_CFA_OFFSET 5*8 |
62610913 | 1541 | |
79fb4ad6 SR |
1542 | /* Everything up to here is safe from nested NMIs */ |
1543 | ||
62610913 JB |
1544 | /* |
1545 | * If there was a nested NMI, the first NMI's iret will return | |
1546 | * here. But NMIs are still enabled and we can take another | |
1547 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1548 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1549 | * it will just return, as we are about to repeat an NMI anyway. | |
1550 | * This makes it safe to copy to the stack frame that a nested | |
1551 | * NMI will update. | |
1552 | */ | |
1553 | repeat_nmi: | |
1554 | /* | |
1555 | * Update the stack variable to say we are still in NMI (the update | |
1556 | * is benign for the non-repeat case, where 1 was pushed just above | |
1557 | * to this very stack slot). | |
1558 | */ | |
28696f43 | 1559 | movq $1, 10*8(%rsp) |
3f3c8b8c SR |
1560 | |
1561 | /* Make another copy, this one may be modified by nested NMIs */ | |
28696f43 SQ |
1562 | addq $(10*8), %rsp |
1563 | CFI_ADJUST_CFA_OFFSET -10*8 | |
3f3c8b8c | 1564 | .rept 5 |
28696f43 | 1565 | pushq_cfi -6*8(%rsp) |
3f3c8b8c | 1566 | .endr |
28696f43 | 1567 | subq $(5*8), %rsp |
911d2bb5 | 1568 | CFI_DEF_CFA_OFFSET 5*8 |
62610913 | 1569 | end_repeat_nmi: |
3f3c8b8c SR |
1570 | |
1571 | /* | |
1572 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1573 | * NMI if the first NMI took an exception and reset our iret stack |
1574 | * so that we repeat another NMI. | |
3f3c8b8c | 1575 | */ |
1fd466ef | 1576 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
76f5df43 DV |
1577 | ALLOC_PT_GPREGS_ON_STACK |
1578 | ||
1fd466ef | 1579 | /* |
ebfc453e | 1580 | * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit |
1fd466ef SR |
1581 | * as we should not be calling schedule in NMI context. |
1582 | * Even with normal interrupts enabled. An NMI should not be | |
1583 | * setting NEED_RESCHED or anything that normal interrupts and | |
1584 | * exceptions might do. | |
1585 | */ | |
ebfc453e | 1586 | call paranoid_entry |
ddeb8f21 | 1587 | DEFAULT_FRAME 0 |
7fbb98c5 SR |
1588 | |
1589 | /* | |
1590 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1591 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1592 | * handler before it was able to read the CR2 register, and then the | |
1593 | * NMI itself takes a page fault, the page fault that was preempted | |
1594 | * will read the information from the NMI page fault and not the | |
1595 | * origin fault. Save it off and restore it if it changes. | |
1596 | * Use the r12 callee-saved register. | |
1597 | */ | |
1598 | movq %cr2, %r12 | |
1599 | ||
ddeb8f21 AH |
1600 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1601 | movq %rsp,%rdi | |
1602 | movq $-1,%rsi | |
1603 | call do_nmi | |
7fbb98c5 SR |
1604 | |
1605 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1606 | movq %cr2, %rcx | |
1607 | cmpq %rcx, %r12 | |
1608 | je 1f | |
1609 | movq %r12, %cr2 | |
1610 | 1: | |
1611 | ||
ddeb8f21 AH |
1612 | testl %ebx,%ebx /* swapgs needed? */ |
1613 | jnz nmi_restore | |
ddeb8f21 AH |
1614 | nmi_swapgs: |
1615 | SWAPGS_UNSAFE_STACK | |
1616 | nmi_restore: | |
76f5df43 DV |
1617 | RESTORE_EXTRA_REGS |
1618 | RESTORE_C_REGS | |
444723dc | 1619 | /* Pop the extra iret frame at once */ |
76f5df43 | 1620 | REMOVE_PT_GPREGS_FROM_STACK 6*8 |
28696f43 | 1621 | |
3f3c8b8c | 1622 | /* Clear the NMI executing stack variable */ |
28696f43 | 1623 | movq $0, 5*8(%rsp) |
ddeb8f21 | 1624 | jmp irq_return |
9f1e87ea | 1625 | CFI_ENDPROC |
ddeb8f21 AH |
1626 | END(nmi) |
1627 | ||
1628 | ENTRY(ignore_sysret) | |
1629 | CFI_STARTPROC | |
1630 | mov $-ENOSYS,%eax | |
1631 | sysret | |
1632 | CFI_ENDPROC | |
1633 | END(ignore_sysret) | |
1634 |