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Commit | Line | Data |
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b992c660 IM |
1 | /* |
2 | * FPU signal frame handling routines. | |
3 | */ | |
4 | ||
5 | #include <linux/compat.h> | |
6 | #include <linux/cpu.h> | |
7 | ||
8 | #include <asm/fpu/internal.h> | |
9 | #include <asm/fpu/signal.h> | |
10 | #include <asm/fpu/regset.h> | |
99aa22d0 | 11 | #include <asm/fpu/xstate.h> |
b992c660 IM |
12 | |
13 | #include <asm/sigframe.h> | |
d1898b73 | 14 | #include <asm/trace/fpu.h> |
b992c660 IM |
15 | |
16 | static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32; | |
17 | ||
18 | /* | |
19 | * Check for the presence of extended state information in the | |
20 | * user fpstate pointer in the sigcontext. | |
21 | */ | |
c47ada30 | 22 | static inline int check_for_xstate(struct fxregs_state __user *buf, |
b992c660 IM |
23 | void __user *fpstate, |
24 | struct _fpx_sw_bytes *fx_sw) | |
25 | { | |
c47ada30 | 26 | int min_xstate_size = sizeof(struct fxregs_state) + |
b992c660 IM |
27 | sizeof(struct xstate_header); |
28 | unsigned int magic2; | |
29 | ||
30 | if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw))) | |
31 | return -1; | |
32 | ||
33 | /* Check for the first magic field and other error scenarios. */ | |
34 | if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || | |
35 | fx_sw->xstate_size < min_xstate_size || | |
a1141e0b | 36 | fx_sw->xstate_size > fpu_user_xstate_size || |
b992c660 IM |
37 | fx_sw->xstate_size > fx_sw->extended_size) |
38 | return -1; | |
39 | ||
40 | /* | |
41 | * Check for the presence of second magic word at the end of memory | |
42 | * layout. This detects the case where the user just copied the legacy | |
43 | * fpstate layout with out copying the extended state information | |
44 | * in the memory layout. | |
45 | */ | |
46 | if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)) | |
47 | || magic2 != FP_XSTATE_MAGIC2) | |
48 | return -1; | |
49 | ||
50 | return 0; | |
51 | } | |
52 | ||
53 | /* | |
54 | * Signal frame handlers. | |
55 | */ | |
56 | static inline int save_fsave_header(struct task_struct *tsk, void __user *buf) | |
57 | { | |
58 | if (use_fxsr()) { | |
c47ada30 | 59 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 | 60 | struct user_i387_ia32_struct env; |
86e9fc3a | 61 | struct _fpstate_32 __user *fp = buf; |
b992c660 IM |
62 | |
63 | convert_from_fxsr(&env, tsk); | |
64 | ||
65 | if (__copy_to_user(buf, &env, sizeof(env)) || | |
66 | __put_user(xsave->i387.swd, &fp->status) || | |
67 | __put_user(X86_FXSR_MAGIC, &fp->magic)) | |
68 | return -1; | |
69 | } else { | |
c47ada30 | 70 | struct fregs_state __user *fp = buf; |
b992c660 IM |
71 | u32 swd; |
72 | if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) | |
73 | return -1; | |
74 | } | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
79 | static inline int save_xstate_epilog(void __user *buf, int ia32_frame) | |
80 | { | |
c47ada30 | 81 | struct xregs_state __user *x = buf; |
b992c660 IM |
82 | struct _fpx_sw_bytes *sw_bytes; |
83 | u32 xfeatures; | |
84 | int err; | |
85 | ||
86 | /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ | |
87 | sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved; | |
88 | err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); | |
89 | ||
90 | if (!use_xsave()) | |
91 | return err; | |
92 | ||
a1141e0b FY |
93 | err |= __put_user(FP_XSTATE_MAGIC2, |
94 | (__u32 *)(buf + fpu_user_xstate_size)); | |
b992c660 IM |
95 | |
96 | /* | |
97 | * Read the xfeatures which we copied (directly from the cpu or | |
98 | * from the state in task struct) to the user buffers. | |
99 | */ | |
100 | err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
101 | ||
102 | /* | |
103 | * For legacy compatible, we always set FP/SSE bits in the bit | |
104 | * vector while saving the state to the user context. This will | |
105 | * enable us capturing any changes(during sigreturn) to | |
106 | * the FP/SSE bits by the legacy applications which don't touch | |
107 | * xfeatures in the xsave header. | |
108 | * | |
109 | * xsave aware apps can change the xfeatures in the xsave | |
110 | * header as well as change any contents in the memory layout. | |
111 | * xrestore as part of sigreturn will capture all the changes. | |
112 | */ | |
d91cab78 | 113 | xfeatures |= XFEATURE_MASK_FPSSE; |
b992c660 IM |
114 | |
115 | err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
116 | ||
117 | return err; | |
118 | } | |
119 | ||
c47ada30 | 120 | static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) |
b992c660 IM |
121 | { |
122 | int err; | |
123 | ||
124 | if (use_xsave()) | |
125 | err = copy_xregs_to_user(buf); | |
126 | else if (use_fxsr()) | |
c47ada30 | 127 | err = copy_fxregs_to_user((struct fxregs_state __user *) buf); |
b992c660 | 128 | else |
c47ada30 | 129 | err = copy_fregs_to_user((struct fregs_state __user *) buf); |
b992c660 | 130 | |
a1141e0b | 131 | if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size)) |
b992c660 IM |
132 | err = -EFAULT; |
133 | return err; | |
134 | } | |
135 | ||
136 | /* | |
137 | * Save the fpu, extended register state to the user signal frame. | |
138 | * | |
139 | * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save | |
140 | * state is copied. | |
141 | * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. | |
142 | * | |
143 | * buf == buf_fx for 64-bit frames and 32-bit fsave frame. | |
144 | * buf != buf_fx for 32-bit frames with fxstate. | |
145 | * | |
146 | * If the fpu, extended register state is live, save the state directly | |
147 | * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise, | |
148 | * copy the thread's fpu state to the user frame starting at 'buf_fx'. | |
149 | * | |
150 | * If this is a 32-bit frame with fxstate, put a fsave header before | |
151 | * the aligned state at 'buf_fx'. | |
152 | * | |
153 | * For [f]xsave state, update the SW reserved fields in the [f]xsave frame | |
154 | * indicating the absence/presence of the extended state to the user. | |
155 | */ | |
156 | int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) | |
157 | { | |
b3a16308 IM |
158 | struct fpu *fpu = ¤t->thread.fpu; |
159 | struct xregs_state *xsave = &fpu->state.xsave; | |
b992c660 IM |
160 | struct task_struct *tsk = current; |
161 | int ia32_fxstate = (buf != buf_fx); | |
162 | ||
97f2645f MY |
163 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
164 | IS_ENABLED(CONFIG_IA32_EMULATION)); | |
b992c660 IM |
165 | |
166 | if (!access_ok(VERIFY_WRITE, buf, size)) | |
167 | return -EACCES; | |
168 | ||
169 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
170 | return fpregs_soft_get(current, NULL, 0, | |
171 | sizeof(struct user_i387_ia32_struct), NULL, | |
86e9fc3a | 172 | (struct _fpstate_32 __user *) buf) ? -1 : 1; |
b992c660 | 173 | |
f1c8cd01 | 174 | if (fpu->fpstate_active || using_compacted_format()) { |
b992c660 IM |
175 | /* Save the live register state to the user directly. */ |
176 | if (copy_fpregs_to_sigframe(buf_fx)) | |
177 | return -1; | |
178 | /* Update the thread's fxstate to save the fsave header. */ | |
179 | if (ia32_fxstate) | |
b3a16308 | 180 | copy_fxregs_to_kernel(fpu); |
b992c660 | 181 | } else { |
a1141e0b FY |
182 | /* |
183 | * It is a *bug* if kernel uses compacted-format for xsave | |
184 | * area and we copy it out directly to a signal frame. It | |
185 | * should have been handled above by saving the registers | |
186 | * directly. | |
187 | */ | |
188 | if (boot_cpu_has(X86_FEATURE_XSAVES)) { | |
189 | WARN_ONCE(1, "x86/fpu: saving compacted-format xsave area to a signal frame!\n"); | |
190 | return -1; | |
191 | } | |
192 | ||
b3a16308 | 193 | fpstate_sanitize_xstate(fpu); |
a1141e0b | 194 | if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size)) |
b992c660 IM |
195 | return -1; |
196 | } | |
197 | ||
198 | /* Save the fsave header for the 32-bit frames. */ | |
199 | if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf)) | |
200 | return -1; | |
201 | ||
202 | if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate)) | |
203 | return -1; | |
204 | ||
205 | return 0; | |
206 | } | |
207 | ||
208 | static inline void | |
209 | sanitize_restored_xstate(struct task_struct *tsk, | |
210 | struct user_i387_ia32_struct *ia32_env, | |
211 | u64 xfeatures, int fx_only) | |
212 | { | |
c47ada30 | 213 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 IM |
214 | struct xstate_header *header = &xsave->header; |
215 | ||
216 | if (use_xsave()) { | |
217 | /* These bits must be zero. */ | |
218 | memset(header->reserved, 0, 48); | |
219 | ||
220 | /* | |
221 | * Init the state that is not present in the memory | |
222 | * layout and not enabled by the OS. | |
223 | */ | |
224 | if (fx_only) | |
d91cab78 | 225 | header->xfeatures = XFEATURE_MASK_FPSSE; |
b992c660 IM |
226 | else |
227 | header->xfeatures &= (xfeatures_mask & xfeatures); | |
228 | } | |
229 | ||
230 | if (use_fxsr()) { | |
231 | /* | |
232 | * mscsr reserved bits must be masked to zero for security | |
233 | * reasons. | |
234 | */ | |
235 | xsave->i387.mxcsr &= mxcsr_feature_mask; | |
236 | ||
237 | convert_to_fxsr(tsk, ia32_env); | |
238 | } | |
239 | } | |
240 | ||
241 | /* | |
242 | * Restore the extended state if present. Otherwise, restore the FP/SSE state. | |
243 | */ | |
244 | static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only) | |
245 | { | |
246 | if (use_xsave()) { | |
247 | if ((unsigned long)buf % 64 || fx_only) { | |
d91cab78 | 248 | u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE; |
b992c660 IM |
249 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
250 | return copy_user_to_fxregs(buf); | |
251 | } else { | |
252 | u64 init_bv = xfeatures_mask & ~xbv; | |
253 | if (unlikely(init_bv)) | |
254 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); | |
255 | return copy_user_to_xregs(buf, xbv); | |
256 | } | |
257 | } else if (use_fxsr()) { | |
258 | return copy_user_to_fxregs(buf); | |
259 | } else | |
260 | return copy_user_to_fregs(buf); | |
261 | } | |
262 | ||
263 | static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size) | |
264 | { | |
265 | int ia32_fxstate = (buf != buf_fx); | |
266 | struct task_struct *tsk = current; | |
267 | struct fpu *fpu = &tsk->thread.fpu; | |
bf15a8cf | 268 | int state_size = fpu_kernel_xstate_size; |
b992c660 IM |
269 | u64 xfeatures = 0; |
270 | int fx_only = 0; | |
271 | ||
97f2645f MY |
272 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
273 | IS_ENABLED(CONFIG_IA32_EMULATION)); | |
b992c660 IM |
274 | |
275 | if (!buf) { | |
276 | fpu__clear(fpu); | |
277 | return 0; | |
278 | } | |
279 | ||
280 | if (!access_ok(VERIFY_READ, buf, size)) | |
281 | return -EACCES; | |
282 | ||
283 | fpu__activate_curr(fpu); | |
284 | ||
285 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
286 | return fpregs_soft_set(current, NULL, | |
287 | 0, sizeof(struct user_i387_ia32_struct), | |
288 | NULL, buf) != 0; | |
289 | ||
290 | if (use_xsave()) { | |
291 | struct _fpx_sw_bytes fx_sw_user; | |
292 | if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) { | |
293 | /* | |
294 | * Couldn't find the extended state information in the | |
295 | * memory layout. Restore just the FP/SSE and init all | |
296 | * the other extended state. | |
297 | */ | |
c47ada30 | 298 | state_size = sizeof(struct fxregs_state); |
b992c660 | 299 | fx_only = 1; |
d1898b73 | 300 | trace_x86_fpu_xstate_check_failed(fpu); |
b992c660 IM |
301 | } else { |
302 | state_size = fx_sw_user.xstate_size; | |
303 | xfeatures = fx_sw_user.xfeatures; | |
304 | } | |
305 | } | |
306 | ||
307 | if (ia32_fxstate) { | |
308 | /* | |
309 | * For 32-bit frames with fxstate, copy the user state to the | |
310 | * thread's fpu state, reconstruct fxstate from the fsave | |
311 | * header. Sanitize the copied state etc. | |
312 | */ | |
313 | struct fpu *fpu = &tsk->thread.fpu; | |
314 | struct user_i387_ia32_struct env; | |
315 | int err = 0; | |
316 | ||
317 | /* | |
318 | * Drop the current fpu which clears fpu->fpstate_active. This ensures | |
319 | * that any context-switch during the copy of the new state, | |
320 | * avoids the intermediate state from getting restored/saved. | |
321 | * Thus avoiding the new restored state from getting corrupted. | |
322 | * We will be ready to restore/save the state only after | |
323 | * fpu->fpstate_active is again set. | |
324 | */ | |
325 | fpu__drop(fpu); | |
326 | ||
7b9094c6 | 327 | if (using_compacted_format()) |
6d7f7da5 | 328 | err = copy_user_to_xstate(&fpu->state.xsave, buf_fx); |
7b9094c6 IM |
329 | else |
330 | err = __copy_from_user(&fpu->state.xsave, buf_fx, state_size); | |
1fc2b67b YY |
331 | |
332 | if (err || __copy_from_user(&env, buf, sizeof(env))) { | |
b992c660 | 333 | fpstate_init(&fpu->state); |
d1898b73 | 334 | trace_x86_fpu_init_state(fpu); |
b992c660 IM |
335 | err = -1; |
336 | } else { | |
337 | sanitize_restored_xstate(tsk, &env, xfeatures, fx_only); | |
338 | } | |
339 | ||
340 | fpu->fpstate_active = 1; | |
c592b573 AL |
341 | preempt_disable(); |
342 | fpu__restore(fpu); | |
343 | preempt_enable(); | |
b992c660 IM |
344 | |
345 | return err; | |
346 | } else { | |
347 | /* | |
348 | * For 64-bit frames and 32-bit fsave frames, restore the user | |
349 | * state to the registers directly (with exceptions handled). | |
350 | */ | |
351 | user_fpu_begin(); | |
352 | if (copy_user_to_fpregs_zeroing(buf_fx, xfeatures, fx_only)) { | |
353 | fpu__clear(fpu); | |
354 | return -1; | |
355 | } | |
356 | } | |
357 | ||
358 | return 0; | |
359 | } | |
360 | ||
361 | static inline int xstate_sigframe_size(void) | |
362 | { | |
a1141e0b FY |
363 | return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE : |
364 | fpu_user_xstate_size; | |
b992c660 IM |
365 | } |
366 | ||
367 | /* | |
368 | * Restore FPU state from a sigframe: | |
369 | */ | |
370 | int fpu__restore_sig(void __user *buf, int ia32_frame) | |
371 | { | |
372 | void __user *buf_fx = buf; | |
373 | int size = xstate_sigframe_size(); | |
374 | ||
375 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
376 | buf_fx = buf + sizeof(struct fregs_state); |
377 | size += sizeof(struct fregs_state); | |
b992c660 IM |
378 | } |
379 | ||
380 | return __fpu__restore_sig(buf, buf_fx, size); | |
381 | } | |
382 | ||
383 | unsigned long | |
384 | fpu__alloc_mathframe(unsigned long sp, int ia32_frame, | |
385 | unsigned long *buf_fx, unsigned long *size) | |
386 | { | |
387 | unsigned long frame_size = xstate_sigframe_size(); | |
388 | ||
389 | *buf_fx = sp = round_down(sp - frame_size, 64); | |
390 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
391 | frame_size += sizeof(struct fregs_state); |
392 | sp -= sizeof(struct fregs_state); | |
b992c660 IM |
393 | } |
394 | ||
395 | *size = frame_size; | |
396 | ||
397 | return sp; | |
398 | } | |
399 | /* | |
400 | * Prepare the SW reserved portion of the fxsave memory layout, indicating | |
401 | * the presence of the extended state information in the memory layout | |
402 | * pointed by the fpstate pointer in the sigcontext. | |
403 | * This will be saved when ever the FP and extended state context is | |
404 | * saved on the user stack during the signal handler delivery to the user. | |
405 | */ | |
406 | void fpu__init_prepare_fx_sw_frame(void) | |
407 | { | |
a1141e0b | 408 | int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE; |
b992c660 | 409 | |
b992c660 IM |
410 | fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1; |
411 | fx_sw_reserved.extended_size = size; | |
412 | fx_sw_reserved.xfeatures = xfeatures_mask; | |
a1141e0b | 413 | fx_sw_reserved.xstate_size = fpu_user_xstate_size; |
b992c660 | 414 | |
97f2645f MY |
415 | if (IS_ENABLED(CONFIG_IA32_EMULATION) || |
416 | IS_ENABLED(CONFIG_X86_32)) { | |
ab6b5294 DH |
417 | int fsave_header_size = sizeof(struct fregs_state); |
418 | ||
b992c660 | 419 | fx_sw_reserved_ia32 = fx_sw_reserved; |
ab6b5294 | 420 | fx_sw_reserved_ia32.extended_size = size + fsave_header_size; |
b992c660 IM |
421 | } |
422 | } | |
423 |