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b992c660 IM |
1 | /* |
2 | * FPU signal frame handling routines. | |
3 | */ | |
4 | ||
5 | #include <linux/compat.h> | |
6 | #include <linux/cpu.h> | |
7 | ||
8 | #include <asm/fpu/internal.h> | |
9 | #include <asm/fpu/signal.h> | |
10 | #include <asm/fpu/regset.h> | |
11 | ||
12 | #include <asm/sigframe.h> | |
13 | ||
14 | static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32; | |
15 | ||
16 | /* | |
17 | * Check for the presence of extended state information in the | |
18 | * user fpstate pointer in the sigcontext. | |
19 | */ | |
c47ada30 | 20 | static inline int check_for_xstate(struct fxregs_state __user *buf, |
b992c660 IM |
21 | void __user *fpstate, |
22 | struct _fpx_sw_bytes *fx_sw) | |
23 | { | |
c47ada30 | 24 | int min_xstate_size = sizeof(struct fxregs_state) + |
b992c660 IM |
25 | sizeof(struct xstate_header); |
26 | unsigned int magic2; | |
27 | ||
28 | if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw))) | |
29 | return -1; | |
30 | ||
31 | /* Check for the first magic field and other error scenarios. */ | |
32 | if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || | |
33 | fx_sw->xstate_size < min_xstate_size || | |
34 | fx_sw->xstate_size > xstate_size || | |
35 | fx_sw->xstate_size > fx_sw->extended_size) | |
36 | return -1; | |
37 | ||
38 | /* | |
39 | * Check for the presence of second magic word at the end of memory | |
40 | * layout. This detects the case where the user just copied the legacy | |
41 | * fpstate layout with out copying the extended state information | |
42 | * in the memory layout. | |
43 | */ | |
44 | if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)) | |
45 | || magic2 != FP_XSTATE_MAGIC2) | |
46 | return -1; | |
47 | ||
48 | return 0; | |
49 | } | |
50 | ||
51 | /* | |
52 | * Signal frame handlers. | |
53 | */ | |
54 | static inline int save_fsave_header(struct task_struct *tsk, void __user *buf) | |
55 | { | |
56 | if (use_fxsr()) { | |
c47ada30 | 57 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 | 58 | struct user_i387_ia32_struct env; |
86e9fc3a | 59 | struct _fpstate_32 __user *fp = buf; |
b992c660 IM |
60 | |
61 | convert_from_fxsr(&env, tsk); | |
62 | ||
63 | if (__copy_to_user(buf, &env, sizeof(env)) || | |
64 | __put_user(xsave->i387.swd, &fp->status) || | |
65 | __put_user(X86_FXSR_MAGIC, &fp->magic)) | |
66 | return -1; | |
67 | } else { | |
c47ada30 | 68 | struct fregs_state __user *fp = buf; |
b992c660 IM |
69 | u32 swd; |
70 | if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) | |
71 | return -1; | |
72 | } | |
73 | ||
74 | return 0; | |
75 | } | |
76 | ||
77 | static inline int save_xstate_epilog(void __user *buf, int ia32_frame) | |
78 | { | |
c47ada30 | 79 | struct xregs_state __user *x = buf; |
b992c660 IM |
80 | struct _fpx_sw_bytes *sw_bytes; |
81 | u32 xfeatures; | |
82 | int err; | |
83 | ||
84 | /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ | |
85 | sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved; | |
86 | err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); | |
87 | ||
88 | if (!use_xsave()) | |
89 | return err; | |
90 | ||
91 | err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size)); | |
92 | ||
93 | /* | |
94 | * Read the xfeatures which we copied (directly from the cpu or | |
95 | * from the state in task struct) to the user buffers. | |
96 | */ | |
97 | err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
98 | ||
99 | /* | |
100 | * For legacy compatible, we always set FP/SSE bits in the bit | |
101 | * vector while saving the state to the user context. This will | |
102 | * enable us capturing any changes(during sigreturn) to | |
103 | * the FP/SSE bits by the legacy applications which don't touch | |
104 | * xfeatures in the xsave header. | |
105 | * | |
106 | * xsave aware apps can change the xfeatures in the xsave | |
107 | * header as well as change any contents in the memory layout. | |
108 | * xrestore as part of sigreturn will capture all the changes. | |
109 | */ | |
d91cab78 | 110 | xfeatures |= XFEATURE_MASK_FPSSE; |
b992c660 IM |
111 | |
112 | err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
113 | ||
114 | return err; | |
115 | } | |
116 | ||
c47ada30 | 117 | static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) |
b992c660 IM |
118 | { |
119 | int err; | |
120 | ||
121 | if (use_xsave()) | |
122 | err = copy_xregs_to_user(buf); | |
123 | else if (use_fxsr()) | |
c47ada30 | 124 | err = copy_fxregs_to_user((struct fxregs_state __user *) buf); |
b992c660 | 125 | else |
c47ada30 | 126 | err = copy_fregs_to_user((struct fregs_state __user *) buf); |
b992c660 IM |
127 | |
128 | if (unlikely(err) && __clear_user(buf, xstate_size)) | |
129 | err = -EFAULT; | |
130 | return err; | |
131 | } | |
132 | ||
133 | /* | |
134 | * Save the fpu, extended register state to the user signal frame. | |
135 | * | |
136 | * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save | |
137 | * state is copied. | |
138 | * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. | |
139 | * | |
140 | * buf == buf_fx for 64-bit frames and 32-bit fsave frame. | |
141 | * buf != buf_fx for 32-bit frames with fxstate. | |
142 | * | |
143 | * If the fpu, extended register state is live, save the state directly | |
144 | * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise, | |
145 | * copy the thread's fpu state to the user frame starting at 'buf_fx'. | |
146 | * | |
147 | * If this is a 32-bit frame with fxstate, put a fsave header before | |
148 | * the aligned state at 'buf_fx'. | |
149 | * | |
150 | * For [f]xsave state, update the SW reserved fields in the [f]xsave frame | |
151 | * indicating the absence/presence of the extended state to the user. | |
152 | */ | |
153 | int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) | |
154 | { | |
c47ada30 | 155 | struct xregs_state *xsave = ¤t->thread.fpu.state.xsave; |
b992c660 IM |
156 | struct task_struct *tsk = current; |
157 | int ia32_fxstate = (buf != buf_fx); | |
158 | ||
159 | ia32_fxstate &= (config_enabled(CONFIG_X86_32) || | |
160 | config_enabled(CONFIG_IA32_EMULATION)); | |
161 | ||
162 | if (!access_ok(VERIFY_WRITE, buf, size)) | |
163 | return -EACCES; | |
164 | ||
165 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
166 | return fpregs_soft_get(current, NULL, 0, | |
167 | sizeof(struct user_i387_ia32_struct), NULL, | |
86e9fc3a | 168 | (struct _fpstate_32 __user *) buf) ? -1 : 1; |
b992c660 IM |
169 | |
170 | if (fpregs_active()) { | |
171 | /* Save the live register state to the user directly. */ | |
172 | if (copy_fpregs_to_sigframe(buf_fx)) | |
173 | return -1; | |
174 | /* Update the thread's fxstate to save the fsave header. */ | |
175 | if (ia32_fxstate) | |
176 | copy_fxregs_to_kernel(&tsk->thread.fpu); | |
177 | } else { | |
178 | fpstate_sanitize_xstate(&tsk->thread.fpu); | |
179 | if (__copy_to_user(buf_fx, xsave, xstate_size)) | |
180 | return -1; | |
181 | } | |
182 | ||
183 | /* Save the fsave header for the 32-bit frames. */ | |
184 | if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf)) | |
185 | return -1; | |
186 | ||
187 | if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate)) | |
188 | return -1; | |
189 | ||
190 | return 0; | |
191 | } | |
192 | ||
193 | static inline void | |
194 | sanitize_restored_xstate(struct task_struct *tsk, | |
195 | struct user_i387_ia32_struct *ia32_env, | |
196 | u64 xfeatures, int fx_only) | |
197 | { | |
c47ada30 | 198 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 IM |
199 | struct xstate_header *header = &xsave->header; |
200 | ||
201 | if (use_xsave()) { | |
202 | /* These bits must be zero. */ | |
203 | memset(header->reserved, 0, 48); | |
204 | ||
205 | /* | |
206 | * Init the state that is not present in the memory | |
207 | * layout and not enabled by the OS. | |
208 | */ | |
209 | if (fx_only) | |
d91cab78 | 210 | header->xfeatures = XFEATURE_MASK_FPSSE; |
b992c660 IM |
211 | else |
212 | header->xfeatures &= (xfeatures_mask & xfeatures); | |
213 | } | |
214 | ||
215 | if (use_fxsr()) { | |
216 | /* | |
217 | * mscsr reserved bits must be masked to zero for security | |
218 | * reasons. | |
219 | */ | |
220 | xsave->i387.mxcsr &= mxcsr_feature_mask; | |
221 | ||
222 | convert_to_fxsr(tsk, ia32_env); | |
223 | } | |
224 | } | |
225 | ||
226 | /* | |
227 | * Restore the extended state if present. Otherwise, restore the FP/SSE state. | |
228 | */ | |
229 | static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only) | |
230 | { | |
231 | if (use_xsave()) { | |
232 | if ((unsigned long)buf % 64 || fx_only) { | |
d91cab78 | 233 | u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE; |
b992c660 IM |
234 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
235 | return copy_user_to_fxregs(buf); | |
236 | } else { | |
237 | u64 init_bv = xfeatures_mask & ~xbv; | |
238 | if (unlikely(init_bv)) | |
239 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); | |
240 | return copy_user_to_xregs(buf, xbv); | |
241 | } | |
242 | } else if (use_fxsr()) { | |
243 | return copy_user_to_fxregs(buf); | |
244 | } else | |
245 | return copy_user_to_fregs(buf); | |
246 | } | |
247 | ||
248 | static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size) | |
249 | { | |
250 | int ia32_fxstate = (buf != buf_fx); | |
251 | struct task_struct *tsk = current; | |
252 | struct fpu *fpu = &tsk->thread.fpu; | |
253 | int state_size = xstate_size; | |
254 | u64 xfeatures = 0; | |
255 | int fx_only = 0; | |
256 | ||
257 | ia32_fxstate &= (config_enabled(CONFIG_X86_32) || | |
258 | config_enabled(CONFIG_IA32_EMULATION)); | |
259 | ||
260 | if (!buf) { | |
261 | fpu__clear(fpu); | |
262 | return 0; | |
263 | } | |
264 | ||
265 | if (!access_ok(VERIFY_READ, buf, size)) | |
266 | return -EACCES; | |
267 | ||
268 | fpu__activate_curr(fpu); | |
269 | ||
270 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
271 | return fpregs_soft_set(current, NULL, | |
272 | 0, sizeof(struct user_i387_ia32_struct), | |
273 | NULL, buf) != 0; | |
274 | ||
275 | if (use_xsave()) { | |
276 | struct _fpx_sw_bytes fx_sw_user; | |
277 | if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) { | |
278 | /* | |
279 | * Couldn't find the extended state information in the | |
280 | * memory layout. Restore just the FP/SSE and init all | |
281 | * the other extended state. | |
282 | */ | |
c47ada30 | 283 | state_size = sizeof(struct fxregs_state); |
b992c660 IM |
284 | fx_only = 1; |
285 | } else { | |
286 | state_size = fx_sw_user.xstate_size; | |
287 | xfeatures = fx_sw_user.xfeatures; | |
288 | } | |
289 | } | |
290 | ||
291 | if (ia32_fxstate) { | |
292 | /* | |
293 | * For 32-bit frames with fxstate, copy the user state to the | |
294 | * thread's fpu state, reconstruct fxstate from the fsave | |
295 | * header. Sanitize the copied state etc. | |
296 | */ | |
297 | struct fpu *fpu = &tsk->thread.fpu; | |
298 | struct user_i387_ia32_struct env; | |
299 | int err = 0; | |
300 | ||
301 | /* | |
302 | * Drop the current fpu which clears fpu->fpstate_active. This ensures | |
303 | * that any context-switch during the copy of the new state, | |
304 | * avoids the intermediate state from getting restored/saved. | |
305 | * Thus avoiding the new restored state from getting corrupted. | |
306 | * We will be ready to restore/save the state only after | |
307 | * fpu->fpstate_active is again set. | |
308 | */ | |
309 | fpu__drop(fpu); | |
310 | ||
311 | if (__copy_from_user(&fpu->state.xsave, buf_fx, state_size) || | |
312 | __copy_from_user(&env, buf, sizeof(env))) { | |
313 | fpstate_init(&fpu->state); | |
314 | err = -1; | |
315 | } else { | |
316 | sanitize_restored_xstate(tsk, &env, xfeatures, fx_only); | |
317 | } | |
318 | ||
319 | fpu->fpstate_active = 1; | |
320 | if (use_eager_fpu()) { | |
321 | preempt_disable(); | |
e1884d69 | 322 | fpu__restore(fpu); |
b992c660 IM |
323 | preempt_enable(); |
324 | } | |
325 | ||
326 | return err; | |
327 | } else { | |
328 | /* | |
329 | * For 64-bit frames and 32-bit fsave frames, restore the user | |
330 | * state to the registers directly (with exceptions handled). | |
331 | */ | |
332 | user_fpu_begin(); | |
333 | if (copy_user_to_fpregs_zeroing(buf_fx, xfeatures, fx_only)) { | |
334 | fpu__clear(fpu); | |
335 | return -1; | |
336 | } | |
337 | } | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static inline int xstate_sigframe_size(void) | |
343 | { | |
344 | return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size; | |
345 | } | |
346 | ||
347 | /* | |
348 | * Restore FPU state from a sigframe: | |
349 | */ | |
350 | int fpu__restore_sig(void __user *buf, int ia32_frame) | |
351 | { | |
352 | void __user *buf_fx = buf; | |
353 | int size = xstate_sigframe_size(); | |
354 | ||
355 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
356 | buf_fx = buf + sizeof(struct fregs_state); |
357 | size += sizeof(struct fregs_state); | |
b992c660 IM |
358 | } |
359 | ||
360 | return __fpu__restore_sig(buf, buf_fx, size); | |
361 | } | |
362 | ||
363 | unsigned long | |
364 | fpu__alloc_mathframe(unsigned long sp, int ia32_frame, | |
365 | unsigned long *buf_fx, unsigned long *size) | |
366 | { | |
367 | unsigned long frame_size = xstate_sigframe_size(); | |
368 | ||
369 | *buf_fx = sp = round_down(sp - frame_size, 64); | |
370 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
371 | frame_size += sizeof(struct fregs_state); |
372 | sp -= sizeof(struct fregs_state); | |
b992c660 IM |
373 | } |
374 | ||
375 | *size = frame_size; | |
376 | ||
377 | return sp; | |
378 | } | |
379 | /* | |
380 | * Prepare the SW reserved portion of the fxsave memory layout, indicating | |
381 | * the presence of the extended state information in the memory layout | |
382 | * pointed by the fpstate pointer in the sigcontext. | |
383 | * This will be saved when ever the FP and extended state context is | |
384 | * saved on the user stack during the signal handler delivery to the user. | |
385 | */ | |
386 | void fpu__init_prepare_fx_sw_frame(void) | |
387 | { | |
c47ada30 | 388 | int fsave_header_size = sizeof(struct fregs_state); |
b992c660 IM |
389 | int size = xstate_size + FP_XSTATE_MAGIC2_SIZE; |
390 | ||
391 | if (config_enabled(CONFIG_X86_32)) | |
392 | size += fsave_header_size; | |
393 | ||
394 | fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1; | |
395 | fx_sw_reserved.extended_size = size; | |
396 | fx_sw_reserved.xfeatures = xfeatures_mask; | |
397 | fx_sw_reserved.xstate_size = xstate_size; | |
398 | ||
399 | if (config_enabled(CONFIG_IA32_EMULATION)) { | |
400 | fx_sw_reserved_ia32 = fx_sw_reserved; | |
401 | fx_sw_reserved_ia32.extended_size += fsave_header_size; | |
402 | } | |
403 | } | |
404 |