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Commit | Line | Data |
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dc1e35c6 SS |
1 | /* |
2 | * xsave/xrstor support. | |
3 | * | |
4 | * Author: Suresh Siddha <suresh.b.siddha@intel.com> | |
5 | */ | |
dc1e35c6 | 6 | #include <linux/compat.h> |
7e7ce87f | 7 | #include <linux/cpu.h> |
e8c24d3a | 8 | #include <linux/mman.h> |
84594296 | 9 | #include <linux/pkeys.h> |
59a36d16 | 10 | |
df6b35f4 | 11 | #include <asm/fpu/api.h> |
78f7f1e5 | 12 | #include <asm/fpu/internal.h> |
fcbc99c4 | 13 | #include <asm/fpu/signal.h> |
59a36d16 | 14 | #include <asm/fpu/regset.h> |
91c3dba7 | 15 | #include <asm/fpu/xstate.h> |
b992c660 | 16 | |
375074cc | 17 | #include <asm/tlbflush.h> |
ccb18db2 | 18 | #include <asm/cpufeature.h> |
dc1e35c6 | 19 | |
1f96b1ef DH |
20 | /* |
21 | * Although we spell it out in here, the Processor Trace | |
22 | * xfeature is completely unused. We use other mechanisms | |
23 | * to save/restore PT state in Linux. | |
24 | */ | |
5b073430 IM |
25 | static const char *xfeature_names[] = |
26 | { | |
27 | "x87 floating point registers" , | |
28 | "SSE registers" , | |
29 | "AVX registers" , | |
30 | "MPX bounds registers" , | |
31 | "MPX CSR" , | |
32 | "AVX-512 opmask" , | |
33 | "AVX-512 Hi256" , | |
34 | "AVX-512 ZMM_Hi256" , | |
1f96b1ef | 35 | "Processor Trace (unused)" , |
c8df4009 | 36 | "Protection Keys User registers", |
5b073430 IM |
37 | "unknown xstate feature" , |
38 | }; | |
39 | ||
ccb18db2 AK |
40 | static short xsave_cpuid_features[] __initdata = { |
41 | X86_FEATURE_FPU, | |
42 | X86_FEATURE_XMM, | |
43 | X86_FEATURE_AVX, | |
44 | X86_FEATURE_MPX, | |
45 | X86_FEATURE_MPX, | |
46 | X86_FEATURE_AVX512F, | |
47 | X86_FEATURE_AVX512F, | |
48 | X86_FEATURE_AVX512F, | |
49 | X86_FEATURE_INTEL_PT, | |
50 | X86_FEATURE_PKU, | |
51 | }; | |
52 | ||
dc1e35c6 | 53 | /* |
614df7fb | 54 | * Mask of xstate features supported by the CPU and the kernel: |
dc1e35c6 | 55 | */ |
5b073430 | 56 | u64 xfeatures_mask __read_mostly; |
dc1e35c6 | 57 | |
dad8c4fe DH |
58 | static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; |
59 | static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; | |
614df7fb | 60 | static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8]; |
84246fe4 | 61 | |
a1141e0b FY |
62 | /* |
63 | * The XSAVE area of kernel can be in standard or compacted format; | |
64 | * it is always in standard format for user mode. This is the user | |
65 | * mode standard format size used for signal and ptrace frames. | |
66 | */ | |
67 | unsigned int fpu_user_xstate_size; | |
68 | ||
0a265375 DH |
69 | /* |
70 | * Clear all of the X86_FEATURE_* bits that are unavailable | |
71 | * when the CPU has no XSAVE support. | |
72 | */ | |
73 | void fpu__xstate_clear_all_cpu_caps(void) | |
74 | { | |
75 | setup_clear_cpu_cap(X86_FEATURE_XSAVE); | |
0a265375 DH |
76 | } |
77 | ||
5b073430 IM |
78 | /* |
79 | * Return whether the system supports a given xfeature. | |
80 | * | |
81 | * Also return the name of the (most advanced) feature that the caller requested: | |
82 | */ | |
83 | int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) | |
84 | { | |
85 | u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask; | |
86 | ||
87 | if (unlikely(feature_name)) { | |
88 | long xfeature_idx, max_idx; | |
89 | u64 xfeatures_print; | |
90 | /* | |
91 | * So we use FLS here to be able to print the most advanced | |
92 | * feature that was requested but is missing. So if a driver | |
d91cab78 | 93 | * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the |
5b073430 IM |
94 | * missing AVX feature - this is the most informative message |
95 | * to users: | |
96 | */ | |
97 | if (xfeatures_missing) | |
98 | xfeatures_print = xfeatures_missing; | |
99 | else | |
100 | xfeatures_print = xfeatures_needed; | |
101 | ||
102 | xfeature_idx = fls64(xfeatures_print)-1; | |
103 | max_idx = ARRAY_SIZE(xfeature_names)-1; | |
104 | xfeature_idx = min(xfeature_idx, max_idx); | |
105 | ||
106 | *feature_name = xfeature_names[xfeature_idx]; | |
107 | } | |
108 | ||
109 | if (xfeatures_missing) | |
110 | return 0; | |
111 | ||
112 | return 1; | |
113 | } | |
114 | EXPORT_SYMBOL_GPL(cpu_has_xfeatures); | |
115 | ||
1499ce2d YY |
116 | static int xfeature_is_supervisor(int xfeature_nr) |
117 | { | |
118 | /* | |
119 | * We currently do not support supervisor states, but if | |
120 | * we did, we could find out like this. | |
121 | * | |
122 | * SDM says: If state component 'i' is a user state component, | |
123 | * ECX[0] return 0; if state component i is a supervisor | |
124 | * state component, ECX[0] returns 1. | |
125 | */ | |
126 | u32 eax, ebx, ecx, edx; | |
127 | ||
128 | cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); | |
129 | return !!(ecx & 1); | |
130 | } | |
131 | ||
132 | static int xfeature_is_user(int xfeature_nr) | |
133 | { | |
134 | return !xfeature_is_supervisor(xfeature_nr); | |
135 | } | |
136 | ||
29104e10 | 137 | /* |
aeb997b9 IM |
138 | * When executing XSAVEOPT (or other optimized XSAVE instructions), if |
139 | * a processor implementation detects that an FPU state component is still | |
140 | * (or is again) in its initialized state, it may clear the corresponding | |
141 | * bit in the header.xfeatures field, and can skip the writeout of registers | |
142 | * to the corresponding memory layout. | |
73a3aeb3 IM |
143 | * |
144 | * This means that when the bit is zero, the state component might still contain | |
145 | * some previous - non-initialized register state. | |
146 | * | |
147 | * Before writing xstate information to user-space we sanitize those components, | |
148 | * to always ensure that the memory layout of a feature will be in the init state | |
149 | * if the corresponding header bit is zero. This is to ensure that user-space doesn't | |
150 | * see some stale state in the memory layout during signal handling, debugging etc. | |
29104e10 | 151 | */ |
36e49e7f | 152 | void fpstate_sanitize_xstate(struct fpu *fpu) |
29104e10 | 153 | { |
c47ada30 | 154 | struct fxregs_state *fx = &fpu->state.fxsave; |
73a3aeb3 | 155 | int feature_bit; |
400e4b20 | 156 | u64 xfeatures; |
29104e10 | 157 | |
1ac91a76 | 158 | if (!use_xsaveopt()) |
29104e10 SS |
159 | return; |
160 | ||
36e49e7f | 161 | xfeatures = fpu->state.xsave.header.xfeatures; |
29104e10 SS |
162 | |
163 | /* | |
164 | * None of the feature bits are in init state. So nothing else | |
0d2eb44f | 165 | * to do for us, as the memory layout is up to date. |
29104e10 | 166 | */ |
400e4b20 | 167 | if ((xfeatures & xfeatures_mask) == xfeatures_mask) |
29104e10 SS |
168 | return; |
169 | ||
170 | /* | |
171 | * FP is in init state | |
172 | */ | |
d91cab78 | 173 | if (!(xfeatures & XFEATURE_MASK_FP)) { |
29104e10 SS |
174 | fx->cwd = 0x37f; |
175 | fx->swd = 0; | |
176 | fx->twd = 0; | |
177 | fx->fop = 0; | |
178 | fx->rip = 0; | |
179 | fx->rdp = 0; | |
180 | memset(&fx->st_space[0], 0, 128); | |
181 | } | |
182 | ||
183 | /* | |
184 | * SSE is in init state | |
185 | */ | |
d91cab78 | 186 | if (!(xfeatures & XFEATURE_MASK_SSE)) |
29104e10 SS |
187 | memset(&fx->xmm_space[0], 0, 256); |
188 | ||
73a3aeb3 IM |
189 | /* |
190 | * First two features are FPU and SSE, which above we handled | |
191 | * in a special way already: | |
192 | */ | |
193 | feature_bit = 0x2; | |
400e4b20 | 194 | xfeatures = (xfeatures_mask & ~xfeatures) >> 2; |
29104e10 SS |
195 | |
196 | /* | |
73a3aeb3 IM |
197 | * Update all the remaining memory layouts according to their |
198 | * standard xstate layout, if their header bit is in the init | |
199 | * state: | |
29104e10 | 200 | */ |
400e4b20 IM |
201 | while (xfeatures) { |
202 | if (xfeatures & 0x1) { | |
a1141e0b | 203 | int offset = xstate_comp_offsets[feature_bit]; |
29104e10 SS |
204 | int size = xstate_sizes[feature_bit]; |
205 | ||
73a3aeb3 | 206 | memcpy((void *)fx + offset, |
6f575023 | 207 | (void *)&init_fpstate.xsave + offset, |
29104e10 SS |
208 | size); |
209 | } | |
210 | ||
400e4b20 | 211 | xfeatures >>= 1; |
29104e10 SS |
212 | feature_bit++; |
213 | } | |
214 | } | |
215 | ||
dc1e35c6 | 216 | /* |
55cc4678 IM |
217 | * Enable the extended processor state save/restore feature. |
218 | * Called once per CPU onlining. | |
dc1e35c6 | 219 | */ |
55cc4678 | 220 | void fpu__init_cpu_xstate(void) |
dc1e35c6 | 221 | { |
d366bf7e | 222 | if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask) |
55cc4678 | 223 | return; |
b8be15d5 YY |
224 | /* |
225 | * Make it clear that XSAVES supervisor states are not yet | |
226 | * implemented should anyone expect it to work by changing | |
227 | * bits in XFEATURE_MASK_* macros and XCR0. | |
228 | */ | |
229 | WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR), | |
230 | "x86/fpu: XSAVES supervisor states are not yet implemented.\n"); | |
231 | ||
232 | xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR; | |
55cc4678 | 233 | |
375074cc | 234 | cr4_set_bits(X86_CR4_OSXSAVE); |
614df7fb | 235 | xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); |
dc1e35c6 SS |
236 | } |
237 | ||
e6e888f9 DH |
238 | /* |
239 | * Note that in the future we will likely need a pair of | |
240 | * functions here: one for user xstates and the other for | |
241 | * system xstates. For now, they are the same. | |
242 | */ | |
243 | static int xfeature_enabled(enum xfeature xfeature) | |
244 | { | |
245 | return !!(xfeatures_mask & (1UL << xfeature)); | |
246 | } | |
247 | ||
a1488f8b | 248 | /* |
39f1acd2 IM |
249 | * Record the offsets and sizes of various xstates contained |
250 | * in the XSAVE state memory layout. | |
a1488f8b | 251 | */ |
4995b9db | 252 | static void __init setup_xstate_features(void) |
a1488f8b | 253 | { |
ee9ae257 | 254 | u32 eax, ebx, ecx, edx, i; |
e6e888f9 DH |
255 | /* start at the beginnning of the "extended state" */ |
256 | unsigned int last_good_offset = offsetof(struct xregs_state, | |
257 | extended_state_area); | |
ac73b27a YY |
258 | /* |
259 | * The FP xstates and SSE xstates are legacy states. They are always | |
260 | * in the fixed offsets in the xsave area in either compacted form | |
261 | * or standard form. | |
262 | */ | |
263 | xstate_offsets[0] = 0; | |
264 | xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space); | |
265 | xstate_offsets[1] = xstate_sizes[0]; | |
266 | xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space); | |
a1488f8b | 267 | |
ee9ae257 | 268 | for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { |
e6e888f9 DH |
269 | if (!xfeature_enabled(i)) |
270 | continue; | |
a1488f8b | 271 | |
e6e888f9 | 272 | cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); |
1499ce2d YY |
273 | |
274 | /* | |
275 | * If an xfeature is supervisor state, the offset | |
276 | * in EBX is invalid. We leave it to -1. | |
277 | */ | |
278 | if (xfeature_is_user(i)) | |
279 | xstate_offsets[i] = ebx; | |
280 | ||
ee9ae257 | 281 | xstate_sizes[i] = eax; |
e6e888f9 DH |
282 | /* |
283 | * In our xstate size checks, we assume that the | |
284 | * highest-numbered xstate feature has the | |
285 | * highest offset in the buffer. Ensure it does. | |
286 | */ | |
287 | WARN_ONCE(last_good_offset > xstate_offsets[i], | |
288 | "x86/fpu: misordered xstate at %d\n", last_good_offset); | |
289 | last_good_offset = xstate_offsets[i]; | |
39f1acd2 | 290 | } |
a1488f8b SS |
291 | } |
292 | ||
32231879 | 293 | static void __init print_xstate_feature(u64 xstate_mask) |
69496e10 | 294 | { |
33588b52 | 295 | const char *feature_name; |
69496e10 | 296 | |
33588b52 | 297 | if (cpu_has_xfeatures(xstate_mask, &feature_name)) |
c8df4009 | 298 | pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name); |
69496e10 IM |
299 | } |
300 | ||
301 | /* | |
302 | * Print out all the supported xstate features: | |
303 | */ | |
32231879 | 304 | static void __init print_xstate_features(void) |
69496e10 | 305 | { |
d91cab78 DH |
306 | print_xstate_feature(XFEATURE_MASK_FP); |
307 | print_xstate_feature(XFEATURE_MASK_SSE); | |
308 | print_xstate_feature(XFEATURE_MASK_YMM); | |
309 | print_xstate_feature(XFEATURE_MASK_BNDREGS); | |
310 | print_xstate_feature(XFEATURE_MASK_BNDCSR); | |
311 | print_xstate_feature(XFEATURE_MASK_OPMASK); | |
312 | print_xstate_feature(XFEATURE_MASK_ZMM_Hi256); | |
313 | print_xstate_feature(XFEATURE_MASK_Hi16_ZMM); | |
c8df4009 | 314 | print_xstate_feature(XFEATURE_MASK_PKRU); |
69496e10 IM |
315 | } |
316 | ||
03482e08 YY |
317 | /* |
318 | * This check is important because it is easy to get XSTATE_* | |
319 | * confused with XSTATE_BIT_*. | |
320 | */ | |
321 | #define CHECK_XFEATURE(nr) do { \ | |
322 | WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \ | |
323 | WARN_ON(nr >= XFEATURE_MAX); \ | |
324 | } while (0) | |
325 | ||
326 | /* | |
327 | * We could cache this like xstate_size[], but we only use | |
328 | * it here, so it would be a waste of space. | |
329 | */ | |
330 | static int xfeature_is_aligned(int xfeature_nr) | |
331 | { | |
332 | u32 eax, ebx, ecx, edx; | |
333 | ||
334 | CHECK_XFEATURE(xfeature_nr); | |
335 | cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); | |
336 | /* | |
337 | * The value returned by ECX[1] indicates the alignment | |
338 | * of state component 'i' when the compacted format | |
339 | * of the extended region of an XSAVE area is used: | |
340 | */ | |
341 | return !!(ecx & 2); | |
342 | } | |
343 | ||
7496d645 FY |
344 | /* |
345 | * This function sets up offsets and sizes of all extended states in | |
346 | * xsave area. This supports both standard format and compacted format | |
347 | * of the xsave aread. | |
7496d645 | 348 | */ |
32231879 | 349 | static void __init setup_xstate_comp(void) |
7496d645 | 350 | { |
614df7fb | 351 | unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8]; |
7496d645 FY |
352 | int i; |
353 | ||
8ff925e1 FY |
354 | /* |
355 | * The FP xstates and SSE xstates are legacy states. They are always | |
356 | * in the fixed offsets in the xsave area in either compacted form | |
357 | * or standard form. | |
358 | */ | |
359 | xstate_comp_offsets[0] = 0; | |
c47ada30 | 360 | xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space); |
7496d645 | 361 | |
782511b0 | 362 | if (!boot_cpu_has(X86_FEATURE_XSAVES)) { |
ee9ae257 | 363 | for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { |
633d54c4 | 364 | if (xfeature_enabled(i)) { |
7496d645 FY |
365 | xstate_comp_offsets[i] = xstate_offsets[i]; |
366 | xstate_comp_sizes[i] = xstate_sizes[i]; | |
367 | } | |
368 | } | |
369 | return; | |
370 | } | |
371 | ||
8a93c9e0 DH |
372 | xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] = |
373 | FXSAVE_SIZE + XSAVE_HDR_SIZE; | |
7496d645 | 374 | |
ee9ae257 | 375 | for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { |
633d54c4 | 376 | if (xfeature_enabled(i)) |
7496d645 FY |
377 | xstate_comp_sizes[i] = xstate_sizes[i]; |
378 | else | |
379 | xstate_comp_sizes[i] = 0; | |
380 | ||
03482e08 | 381 | if (i > FIRST_EXTENDED_XFEATURE) { |
7496d645 FY |
382 | xstate_comp_offsets[i] = xstate_comp_offsets[i-1] |
383 | + xstate_comp_sizes[i-1]; | |
384 | ||
03482e08 YY |
385 | if (xfeature_is_aligned(i)) |
386 | xstate_comp_offsets[i] = | |
387 | ALIGN(xstate_comp_offsets[i], 64); | |
388 | } | |
7496d645 FY |
389 | } |
390 | } | |
391 | ||
996952e0 YY |
392 | /* |
393 | * Print out xstate component offsets and sizes | |
394 | */ | |
395 | static void __init print_xstate_offset_size(void) | |
396 | { | |
397 | int i; | |
398 | ||
399 | for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { | |
400 | if (!xfeature_enabled(i)) | |
401 | continue; | |
402 | pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", | |
403 | i, xstate_comp_offsets[i], i, xstate_sizes[i]); | |
404 | } | |
405 | } | |
406 | ||
dc1e35c6 SS |
407 | /* |
408 | * setup the xstate image representing the init state | |
409 | */ | |
32231879 | 410 | static void __init setup_init_fpu_buf(void) |
dc1e35c6 | 411 | { |
e49a449b | 412 | static int on_boot_cpu __initdata = 1; |
e97131a8 IM |
413 | |
414 | WARN_ON_FPU(!on_boot_cpu); | |
415 | on_boot_cpu = 0; | |
416 | ||
d366bf7e | 417 | if (!boot_cpu_has(X86_FEATURE_XSAVE)) |
5d2bd700 SS |
418 | return; |
419 | ||
420 | setup_xstate_features(); | |
69496e10 | 421 | print_xstate_features(); |
a1488f8b | 422 | |
7d937060 | 423 | if (boot_cpu_has(X86_FEATURE_XSAVES)) |
6f575023 | 424 | init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask; |
47c2f292 | 425 | |
29104e10 | 426 | /* |
7d937060 | 427 | * Init all the features state with header.xfeatures being 0x0 |
29104e10 | 428 | */ |
d65fcd60 | 429 | copy_kernel_to_xregs_booting(&init_fpstate.xsave); |
3e261c14 | 430 | |
29104e10 SS |
431 | /* |
432 | * Dump the init state again. This is to identify the init state | |
433 | * of any feature which is not represented by all zero's. | |
434 | */ | |
c6813144 | 435 | copy_xregs_to_kernel_booting(&init_fpstate.xsave); |
dc1e35c6 SS |
436 | } |
437 | ||
65ac2e9b DH |
438 | static int xfeature_uncompacted_offset(int xfeature_nr) |
439 | { | |
440 | u32 eax, ebx, ecx, edx; | |
441 | ||
1499ce2d YY |
442 | /* |
443 | * Only XSAVES supports supervisor states and it uses compacted | |
444 | * format. Checking a supervisor state's uncompacted offset is | |
445 | * an error. | |
446 | */ | |
447 | if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) { | |
448 | WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr); | |
449 | return -1; | |
450 | } | |
451 | ||
65ac2e9b DH |
452 | CHECK_XFEATURE(xfeature_nr); |
453 | cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); | |
454 | return ebx; | |
455 | } | |
456 | ||
457 | static int xfeature_size(int xfeature_nr) | |
458 | { | |
459 | u32 eax, ebx, ecx, edx; | |
460 | ||
461 | CHECK_XFEATURE(xfeature_nr); | |
462 | cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); | |
463 | return eax; | |
464 | } | |
465 | ||
466 | /* | |
467 | * 'XSAVES' implies two different things: | |
468 | * 1. saving of supervisor/system state | |
469 | * 2. using the compacted format | |
470 | * | |
471 | * Use this function when dealing with the compacted format so | |
472 | * that it is obvious which aspect of 'XSAVES' is being handled | |
473 | * by the calling code. | |
474 | */ | |
99aa22d0 | 475 | int using_compacted_format(void) |
65ac2e9b | 476 | { |
782511b0 | 477 | return boot_cpu_has(X86_FEATURE_XSAVES); |
65ac2e9b DH |
478 | } |
479 | ||
e63e5d5c EB |
480 | /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */ |
481 | int validate_xstate_header(const struct xstate_header *hdr) | |
482 | { | |
483 | /* No unknown or supervisor features may be set */ | |
484 | if (hdr->xfeatures & (~xfeatures_mask | XFEATURE_MASK_SUPERVISOR)) | |
485 | return -EINVAL; | |
486 | ||
487 | /* Userspace must use the uncompacted format */ | |
488 | if (hdr->xcomp_bv) | |
489 | return -EINVAL; | |
490 | ||
491 | /* | |
492 | * If 'reserved' is shrunken to add a new field, make sure to validate | |
493 | * that new field here! | |
494 | */ | |
495 | BUILD_BUG_ON(sizeof(hdr->reserved) != 48); | |
496 | ||
497 | /* No reserved bits may be set */ | |
498 | if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved))) | |
499 | return -EINVAL; | |
500 | ||
501 | return 0; | |
502 | } | |
503 | ||
65ac2e9b DH |
504 | static void __xstate_dump_leaves(void) |
505 | { | |
506 | int i; | |
507 | u32 eax, ebx, ecx, edx; | |
508 | static int should_dump = 1; | |
509 | ||
510 | if (!should_dump) | |
511 | return; | |
512 | should_dump = 0; | |
513 | /* | |
514 | * Dump out a few leaves past the ones that we support | |
515 | * just in case there are some goodies up there | |
516 | */ | |
517 | for (i = 0; i < XFEATURE_MAX + 10; i++) { | |
518 | cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); | |
519 | pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n", | |
520 | XSTATE_CPUID, i, eax, ebx, ecx, edx); | |
521 | } | |
522 | } | |
523 | ||
524 | #define XSTATE_WARN_ON(x) do { \ | |
525 | if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ | |
526 | __xstate_dump_leaves(); \ | |
527 | } \ | |
528 | } while (0) | |
529 | ||
ef78f2a4 DH |
530 | #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \ |
531 | if ((nr == nr_macro) && \ | |
532 | WARN_ONCE(sz != sizeof(__struct), \ | |
533 | "%s: struct is %zu bytes, cpu state %d bytes\n", \ | |
534 | __stringify(nr_macro), sizeof(__struct), sz)) { \ | |
535 | __xstate_dump_leaves(); \ | |
536 | } \ | |
537 | } while (0) | |
538 | ||
539 | /* | |
540 | * We have a C struct for each 'xstate'. We need to ensure | |
541 | * that our software representation matches what the CPU | |
542 | * tells us about the state's size. | |
543 | */ | |
544 | static void check_xstate_against_struct(int nr) | |
545 | { | |
546 | /* | |
547 | * Ask the CPU for the size of the state. | |
548 | */ | |
549 | int sz = xfeature_size(nr); | |
550 | /* | |
551 | * Match each CPU state with the corresponding software | |
552 | * structure. | |
553 | */ | |
554 | XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct); | |
555 | XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state); | |
556 | XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state); | |
557 | XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state); | |
558 | XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state); | |
559 | XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state); | |
c8df4009 | 560 | XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state); |
ef78f2a4 DH |
561 | |
562 | /* | |
563 | * Make *SURE* to add any feature numbers in below if | |
564 | * there are "holes" in the xsave state component | |
565 | * numbers. | |
566 | */ | |
567 | if ((nr < XFEATURE_YMM) || | |
1f96b1ef DH |
568 | (nr >= XFEATURE_MAX) || |
569 | (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) { | |
ef78f2a4 DH |
570 | WARN_ONCE(1, "no structure for xstate: %d\n", nr); |
571 | XSTATE_WARN_ON(1); | |
572 | } | |
573 | } | |
574 | ||
65ac2e9b DH |
575 | /* |
576 | * This essentially double-checks what the cpu told us about | |
577 | * how large the XSAVE buffer needs to be. We are recalculating | |
578 | * it to be safe. | |
579 | */ | |
580 | static void do_extra_xstate_size_checks(void) | |
581 | { | |
582 | int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE; | |
583 | int i; | |
584 | ||
585 | for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { | |
586 | if (!xfeature_enabled(i)) | |
587 | continue; | |
ef78f2a4 DH |
588 | |
589 | check_xstate_against_struct(i); | |
65ac2e9b DH |
590 | /* |
591 | * Supervisor state components can be managed only by | |
592 | * XSAVES, which is compacted-format only. | |
593 | */ | |
594 | if (!using_compacted_format()) | |
595 | XSTATE_WARN_ON(xfeature_is_supervisor(i)); | |
596 | ||
597 | /* Align from the end of the previous feature */ | |
598 | if (xfeature_is_aligned(i)) | |
599 | paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64); | |
600 | /* | |
601 | * The offset of a given state in the non-compacted | |
602 | * format is given to us in a CPUID leaf. We check | |
603 | * them for being ordered (increasing offsets) in | |
604 | * setup_xstate_features(). | |
605 | */ | |
606 | if (!using_compacted_format()) | |
607 | paranoid_xstate_size = xfeature_uncompacted_offset(i); | |
608 | /* | |
609 | * The compacted-format offset always depends on where | |
610 | * the previous state ended. | |
611 | */ | |
612 | paranoid_xstate_size += xfeature_size(i); | |
613 | } | |
bf15a8cf | 614 | XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size); |
65ac2e9b DH |
615 | } |
616 | ||
a1141e0b | 617 | |
7e7ce87f | 618 | /* |
a1141e0b | 619 | * Get total size of enabled xstates in XCR0/xfeatures_mask. |
65ac2e9b DH |
620 | * |
621 | * Note the SDM's wording here. "sub-function 0" only enumerates | |
622 | * the size of the *user* states. If we use it to size a buffer | |
623 | * that we use 'XSAVES' on, we could potentially overflow the | |
624 | * buffer because 'XSAVES' saves system states too. | |
625 | * | |
626 | * Note that we do not currently set any bits on IA32_XSS so | |
627 | * 'XCR0 | IA32_XSS == XCR0' for now. | |
7e7ce87f | 628 | */ |
a1141e0b | 629 | static unsigned int __init get_xsaves_size(void) |
7e7ce87f FY |
630 | { |
631 | unsigned int eax, ebx, ecx, edx; | |
a1141e0b FY |
632 | /* |
633 | * - CPUID function 0DH, sub-function 1: | |
634 | * EBX enumerates the size (in bytes) required by | |
635 | * the XSAVES instruction for an XSAVE area | |
636 | * containing all the state components | |
637 | * corresponding to bits currently set in | |
638 | * XCR0 | IA32_XSS. | |
639 | */ | |
640 | cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); | |
641 | return ebx; | |
642 | } | |
7e7ce87f | 643 | |
a1141e0b FY |
644 | static unsigned int __init get_xsave_size(void) |
645 | { | |
646 | unsigned int eax, ebx, ecx, edx; | |
647 | /* | |
648 | * - CPUID function 0DH, sub-function 0: | |
649 | * EBX enumerates the size (in bytes) required by | |
650 | * the XSAVE instruction for an XSAVE area | |
651 | * containing all the *user* state components | |
652 | * corresponding to bits currently set in XCR0. | |
653 | */ | |
654 | cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); | |
655 | return ebx; | |
4109ca06 DH |
656 | } |
657 | ||
658 | /* | |
659 | * Will the runtime-enumerated 'xstate_size' fit in the init | |
660 | * task's statically-allocated buffer? | |
661 | */ | |
662 | static bool is_supported_xstate_size(unsigned int test_xstate_size) | |
663 | { | |
664 | if (test_xstate_size <= sizeof(union fpregs_state)) | |
665 | return true; | |
666 | ||
667 | pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", | |
668 | sizeof(union fpregs_state), test_xstate_size); | |
669 | return false; | |
670 | } | |
671 | ||
672 | static int init_xstate_size(void) | |
673 | { | |
674 | /* Recompute the context size for enabled features: */ | |
a1141e0b FY |
675 | unsigned int possible_xstate_size; |
676 | unsigned int xsave_size; | |
677 | ||
678 | xsave_size = get_xsave_size(); | |
679 | ||
680 | if (boot_cpu_has(X86_FEATURE_XSAVES)) | |
681 | possible_xstate_size = get_xsaves_size(); | |
682 | else | |
683 | possible_xstate_size = xsave_size; | |
4109ca06 DH |
684 | |
685 | /* Ensure we have the space to store all enabled: */ | |
686 | if (!is_supported_xstate_size(possible_xstate_size)) | |
687 | return -EINVAL; | |
688 | ||
689 | /* | |
690 | * The size is OK, we are definitely going to use xsave, | |
691 | * make it known to the world that we need more space. | |
692 | */ | |
bf15a8cf | 693 | fpu_kernel_xstate_size = possible_xstate_size; |
65ac2e9b | 694 | do_extra_xstate_size_checks(); |
a1141e0b FY |
695 | |
696 | /* | |
697 | * User space is always in standard format. | |
698 | */ | |
699 | fpu_user_xstate_size = xsave_size; | |
4109ca06 DH |
700 | return 0; |
701 | } | |
702 | ||
d91cab78 DH |
703 | /* |
704 | * We enabled the XSAVE hardware, but something went wrong and | |
705 | * we can not use it. Disable it. | |
706 | */ | |
707 | static void fpu__init_disable_system_xstate(void) | |
4109ca06 DH |
708 | { |
709 | xfeatures_mask = 0; | |
710 | cr4_clear_bits(X86_CR4_OSXSAVE); | |
711 | fpu__xstate_clear_all_cpu_caps(); | |
7e7ce87f FY |
712 | } |
713 | ||
dc1e35c6 SS |
714 | /* |
715 | * Enable and initialize the xsave feature. | |
55cc4678 | 716 | * Called once per system bootup. |
dc1e35c6 | 717 | */ |
32231879 | 718 | void __init fpu__init_system_xstate(void) |
dc1e35c6 SS |
719 | { |
720 | unsigned int eax, ebx, ecx, edx; | |
e49a449b | 721 | static int on_boot_cpu __initdata = 1; |
4109ca06 | 722 | int err; |
ccb18db2 | 723 | int i; |
e97131a8 IM |
724 | |
725 | WARN_ON_FPU(!on_boot_cpu); | |
726 | on_boot_cpu = 0; | |
dc1e35c6 | 727 | |
9170fb40 AL |
728 | if (!boot_cpu_has(X86_FEATURE_FPU)) { |
729 | pr_info("x86/fpu: No FPU detected\n"); | |
730 | return; | |
731 | } | |
732 | ||
d366bf7e | 733 | if (!boot_cpu_has(X86_FEATURE_XSAVE)) { |
9170fb40 AL |
734 | pr_info("x86/fpu: x87 FPU will use %s\n", |
735 | boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE"); | |
e9dbfd67 IM |
736 | return; |
737 | } | |
738 | ||
ee813d53 | 739 | if (boot_cpu_data.cpuid_level < XSTATE_CPUID) { |
e97131a8 | 740 | WARN_ON_FPU(1); |
ee813d53 RR |
741 | return; |
742 | } | |
743 | ||
744 | cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); | |
614df7fb | 745 | xfeatures_mask = eax + ((u64)edx << 32); |
dc1e35c6 | 746 | |
d91cab78 | 747 | if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) { |
ec3ed4a2 DH |
748 | /* |
749 | * This indicates that something really unexpected happened | |
750 | * with the enumeration. Disable XSAVE and try to continue | |
751 | * booting without it. This is too early to BUG(). | |
752 | */ | |
614df7fb | 753 | pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask); |
ec3ed4a2 | 754 | goto out_disable; |
dc1e35c6 SS |
755 | } |
756 | ||
ccb18db2 AK |
757 | /* |
758 | * Clear XSAVE features that are disabled in the normal CPUID. | |
759 | */ | |
760 | for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) { | |
761 | if (!boot_cpu_has(xsave_cpuid_features[i])) | |
762 | xfeatures_mask &= ~BIT(i); | |
763 | } | |
764 | ||
a5fe93a5 | 765 | xfeatures_mask &= fpu__get_supported_xfeatures_mask(); |
97e80a70 | 766 | |
55cc4678 IM |
767 | /* Enable xstate instructions to be able to continue with initialization: */ |
768 | fpu__init_cpu_xstate(); | |
4109ca06 | 769 | err = init_xstate_size(); |
ec3ed4a2 DH |
770 | if (err) |
771 | goto out_disable; | |
dc1e35c6 | 772 | |
91c3dba7 YY |
773 | /* |
774 | * Update info used for ptrace frames; use standard-format size and no | |
775 | * supervisor xstates: | |
776 | */ | |
777 | update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR); | |
778 | ||
b992c660 | 779 | fpu__init_prepare_fx_sw_frame(); |
5d2bd700 | 780 | setup_init_fpu_buf(); |
5fd402df | 781 | setup_xstate_comp(); |
996952e0 | 782 | print_xstate_offset_size(); |
dc1e35c6 | 783 | |
b0815359 | 784 | pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n", |
614df7fb | 785 | xfeatures_mask, |
bf15a8cf | 786 | fpu_kernel_xstate_size, |
782511b0 | 787 | boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard"); |
ec3ed4a2 DH |
788 | return; |
789 | ||
790 | out_disable: | |
791 | /* something went wrong, try to boot without any XSAVE support */ | |
792 | fpu__init_disable_system_xstate(); | |
dc1e35c6 | 793 | } |
82d4150c | 794 | |
9254aaa0 IM |
795 | /* |
796 | * Restore minimal FPU state after suspend: | |
797 | */ | |
798 | void fpu__resume_cpu(void) | |
799 | { | |
800 | /* | |
801 | * Restore XCR0 on xsave capable CPUs: | |
802 | */ | |
d366bf7e | 803 | if (boot_cpu_has(X86_FEATURE_XSAVE)) |
9254aaa0 IM |
804 | xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); |
805 | } | |
806 | ||
b8b9b6ba DH |
807 | /* |
808 | * Given an xstate feature mask, calculate where in the xsave | |
809 | * buffer the state is. Callers should ensure that the buffer | |
810 | * is valid. | |
811 | * | |
812 | * Note: does not work for compacted buffers. | |
813 | */ | |
814 | void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask) | |
815 | { | |
816 | int feature_nr = fls64(xstate_feature_mask) - 1; | |
817 | ||
5060b915 YY |
818 | if (!xfeature_enabled(feature_nr)) { |
819 | WARN_ON_FPU(1); | |
820 | return NULL; | |
821 | } | |
822 | ||
b8b9b6ba DH |
823 | return (void *)xsave + xstate_comp_offsets[feature_nr]; |
824 | } | |
7496d645 FY |
825 | /* |
826 | * Given the xsave area and a state inside, this function returns the | |
827 | * address of the state. | |
828 | * | |
829 | * This is the API that is called to get xstate address in either | |
830 | * standard format or compacted format of xsave area. | |
831 | * | |
0c4109be DH |
832 | * Note that if there is no data for the field in the xsave buffer |
833 | * this will return NULL. | |
834 | * | |
7496d645 | 835 | * Inputs: |
0c4109be DH |
836 | * xstate: the thread's storage area for all FPU data |
837 | * xstate_feature: state which is defined in xsave.h (e.g. | |
d91cab78 | 838 | * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...) |
7496d645 | 839 | * Output: |
0c4109be DH |
840 | * address of the state in the xsave area, or NULL if the |
841 | * field is not present in the xsave buffer. | |
7496d645 | 842 | */ |
0c4109be | 843 | void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature) |
7496d645 | 844 | { |
0c4109be DH |
845 | /* |
846 | * Do we even *have* xsave state? | |
847 | */ | |
848 | if (!boot_cpu_has(X86_FEATURE_XSAVE)) | |
849 | return NULL; | |
850 | ||
0c4109be DH |
851 | /* |
852 | * We should not ever be requesting features that we | |
853 | * have not enabled. Remember that pcntxt_mask is | |
854 | * what we write to the XCR0 register. | |
855 | */ | |
856 | WARN_ONCE(!(xfeatures_mask & xstate_feature), | |
857 | "get of unsupported state"); | |
858 | /* | |
859 | * This assumes the last 'xsave*' instruction to | |
860 | * have requested that 'xstate_feature' be saved. | |
861 | * If it did not, we might be seeing and old value | |
862 | * of the field in the buffer. | |
863 | * | |
864 | * This can happen because the last 'xsave' did not | |
865 | * request that this feature be saved (unlikely) | |
866 | * or because the "init optimization" caused it | |
867 | * to not be saved. | |
868 | */ | |
869 | if (!(xsave->header.xfeatures & xstate_feature)) | |
7496d645 FY |
870 | return NULL; |
871 | ||
b8b9b6ba | 872 | return __raw_xsave_addr(xsave, xstate_feature); |
7496d645 | 873 | } |
ba7b3920 | 874 | EXPORT_SYMBOL_GPL(get_xsave_addr); |
04cd027b DH |
875 | |
876 | /* | |
877 | * This wraps up the common operations that need to occur when retrieving | |
878 | * data from xsave state. It first ensures that the current task was | |
879 | * using the FPU and retrieves the data in to a buffer. It then calculates | |
880 | * the offset of the requested field in the buffer. | |
881 | * | |
882 | * This function is safe to call whether the FPU is in use or not. | |
883 | * | |
884 | * Note that this only works on the current task. | |
885 | * | |
886 | * Inputs: | |
d91cab78 DH |
887 | * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP, |
888 | * XFEATURE_MASK_SSE, etc...) | |
04cd027b DH |
889 | * Output: |
890 | * address of the state in the xsave area or NULL if the state | |
891 | * is not present or is in its 'init state'. | |
892 | */ | |
893 | const void *get_xsave_field_ptr(int xsave_state) | |
894 | { | |
895 | struct fpu *fpu = ¤t->thread.fpu; | |
896 | ||
e4a81bfc | 897 | if (!fpu->initialized) |
04cd027b DH |
898 | return NULL; |
899 | /* | |
900 | * fpu__save() takes the CPU's xstate registers | |
901 | * and saves them off to the 'fpu memory buffer. | |
902 | */ | |
903 | fpu__save(fpu); | |
904 | ||
905 | return get_xsave_addr(&fpu->state.xsave, xsave_state); | |
906 | } | |
b8b9b6ba | 907 | |
e8c24d3a DH |
908 | #ifdef CONFIG_ARCH_HAS_PKEYS |
909 | ||
84594296 DH |
910 | #define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2) |
911 | #define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1) | |
84594296 | 912 | /* |
b79daf85 DH |
913 | * This will go out and modify PKRU register to set the access |
914 | * rights for @pkey to @init_val. | |
84594296 DH |
915 | */ |
916 | int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, | |
917 | unsigned long init_val) | |
918 | { | |
b79daf85 | 919 | u32 old_pkru; |
84594296 DH |
920 | int pkey_shift = (pkey * PKRU_BITS_PER_PKEY); |
921 | u32 new_pkru_bits = 0; | |
922 | ||
84594296 DH |
923 | /* |
924 | * This check implies XSAVE support. OSPKE only gets | |
925 | * set if we enable XSAVE and we enable PKU in XCR0. | |
926 | */ | |
927 | if (!boot_cpu_has(X86_FEATURE_OSPKE)) | |
928 | return -EINVAL; | |
929 | ||
91c3dba7 | 930 | /* Set the bits we need in PKRU: */ |
84594296 DH |
931 | if (init_val & PKEY_DISABLE_ACCESS) |
932 | new_pkru_bits |= PKRU_AD_BIT; | |
933 | if (init_val & PKEY_DISABLE_WRITE) | |
934 | new_pkru_bits |= PKRU_WD_BIT; | |
935 | ||
91c3dba7 | 936 | /* Shift the bits in to the correct place in PKRU for pkey: */ |
84594296 DH |
937 | new_pkru_bits <<= pkey_shift; |
938 | ||
b79daf85 DH |
939 | /* Get old PKRU and mask off any old bits in place: */ |
940 | old_pkru = read_pkru(); | |
941 | old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift); | |
84594296 | 942 | |
b79daf85 DH |
943 | /* Write old part along with new part: */ |
944 | write_pkru(old_pkru | new_pkru_bits); | |
91c3dba7 YY |
945 | |
946 | return 0; | |
947 | } | |
e8c24d3a | 948 | #endif /* ! CONFIG_ARCH_HAS_PKEYS */ |
91c3dba7 | 949 | |
0852b374 RR |
950 | /* |
951 | * Weird legacy quirk: SSE and YMM states store information in the | |
952 | * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP | |
953 | * area is marked as unused in the xfeatures header, we need to copy | |
954 | * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use. | |
955 | */ | |
956 | static inline bool xfeatures_mxcsr_quirk(u64 xfeatures) | |
957 | { | |
958 | if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM))) | |
4f8cef59 | 959 | return false; |
0852b374 RR |
960 | |
961 | if (xfeatures & XFEATURE_MASK_FP) | |
4f8cef59 | 962 | return false; |
0852b374 | 963 | |
4f8cef59 | 964 | return true; |
0852b374 RR |
965 | } |
966 | ||
91c3dba7 YY |
967 | /* |
968 | * This is similar to user_regset_copyout(), but will not add offset to | |
969 | * the source data pointer or increment pos, count, kbuf, and ubuf. | |
970 | */ | |
8c0817f4 | 971 | static inline void |
6ff15f8d IM |
972 | __copy_xstate_to_kernel(void *kbuf, const void *data, |
973 | unsigned int offset, unsigned int size, unsigned int size_total) | |
f0d4f30a | 974 | { |
6ff15f8d IM |
975 | if (offset < size_total) { |
976 | unsigned int copy = min(size, size_total - offset); | |
f0d4f30a | 977 | |
56583c9a | 978 | memcpy(kbuf + offset, data, copy); |
f0d4f30a | 979 | } |
f0d4f30a IM |
980 | } |
981 | ||
982 | /* | |
983 | * Convert from kernel XSAVES compacted format to standard format and copy | |
984 | * to a kernel-space ptrace buffer. | |
985 | * | |
986 | * It supports partial copy but pos always starts from zero. This is called | |
987 | * from xstateregs_get() and there we check the CPU has XSAVES. | |
988 | */ | |
56583c9a | 989 | int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total) |
f0d4f30a IM |
990 | { |
991 | unsigned int offset, size; | |
f0d4f30a | 992 | struct xstate_header header; |
8c0817f4 | 993 | int i; |
f0d4f30a IM |
994 | |
995 | /* | |
996 | * Currently copy_regset_to_user() starts from pos 0: | |
997 | */ | |
56583c9a | 998 | if (unlikely(offset_start != 0)) |
f0d4f30a IM |
999 | return -EFAULT; |
1000 | ||
1001 | /* | |
1002 | * The destination is a ptrace buffer; we put in only user xstates: | |
1003 | */ | |
1004 | memset(&header, 0, sizeof(header)); | |
1005 | header.xfeatures = xsave->header.xfeatures; | |
1006 | header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR; | |
1007 | ||
1008 | /* | |
1009 | * Copy xregs_state->header: | |
1010 | */ | |
1011 | offset = offsetof(struct xregs_state, header); | |
1012 | size = sizeof(header); | |
1013 | ||
8c0817f4 | 1014 | __copy_xstate_to_kernel(kbuf, &header, offset, size, size_total); |
f0d4f30a IM |
1015 | |
1016 | for (i = 0; i < XFEATURE_MAX; i++) { | |
1017 | /* | |
1018 | * Copy only in-use xstates: | |
1019 | */ | |
1020 | if ((header.xfeatures >> i) & 1) { | |
1021 | void *src = __raw_xsave_addr(xsave, 1 << i); | |
1022 | ||
1023 | offset = xstate_offsets[i]; | |
1024 | size = xstate_sizes[i]; | |
1025 | ||
6ff15f8d IM |
1026 | /* The next component has to fit fully into the output buffer: */ |
1027 | if (offset + size > size_total) | |
1028 | break; | |
1029 | ||
8c0817f4 | 1030 | __copy_xstate_to_kernel(kbuf, src, offset, size, size_total); |
f0d4f30a IM |
1031 | } |
1032 | ||
1033 | } | |
1034 | ||
0852b374 RR |
1035 | if (xfeatures_mxcsr_quirk(header.xfeatures)) { |
1036 | offset = offsetof(struct fxregs_state, mxcsr); | |
1037 | size = MXCSR_AND_FLAGS_SIZE; | |
1038 | __copy_xstate_to_kernel(kbuf, &xsave->i387.mxcsr, offset, size, size_total); | |
1039 | } | |
1040 | ||
f0d4f30a IM |
1041 | /* |
1042 | * Fill xsave->i387.sw_reserved value for ptrace frame: | |
1043 | */ | |
1044 | offset = offsetof(struct fxregs_state, sw_reserved); | |
1045 | size = sizeof(xstate_fx_sw_bytes); | |
1046 | ||
8c0817f4 | 1047 | __copy_xstate_to_kernel(kbuf, xstate_fx_sw_bytes, offset, size, size_total); |
f0d4f30a IM |
1048 | |
1049 | return 0; | |
1050 | } | |
1051 | ||
1052 | static inline int | |
6ff15f8d | 1053 | __copy_xstate_to_user(void __user *ubuf, const void *data, unsigned int offset, unsigned int size, unsigned int size_total) |
91c3dba7 | 1054 | { |
56583c9a | 1055 | if (!size) |
91c3dba7 YY |
1056 | return 0; |
1057 | ||
6ff15f8d IM |
1058 | if (offset < size_total) { |
1059 | unsigned int copy = min(size, size_total - offset); | |
91c3dba7 | 1060 | |
56583c9a | 1061 | if (__copy_to_user(ubuf + offset, data, copy)) |
a69c158f | 1062 | return -EFAULT; |
91c3dba7 YY |
1063 | } |
1064 | return 0; | |
1065 | } | |
1066 | ||
1067 | /* | |
1068 | * Convert from kernel XSAVES compacted format to standard format and copy | |
becb2bb7 | 1069 | * to a user-space buffer. It supports partial copy but pos always starts from |
91c3dba7 YY |
1070 | * zero. This is called from xstateregs_get() and there we check the CPU |
1071 | * has XSAVES. | |
1072 | */ | |
56583c9a | 1073 | int copy_xstate_to_user(void __user *ubuf, struct xregs_state *xsave, unsigned int offset_start, unsigned int size_total) |
91c3dba7 YY |
1074 | { |
1075 | unsigned int offset, size; | |
1076 | int ret, i; | |
1077 | struct xstate_header header; | |
1078 | ||
1079 | /* | |
1080 | * Currently copy_regset_to_user() starts from pos 0: | |
1081 | */ | |
56583c9a | 1082 | if (unlikely(offset_start != 0)) |
91c3dba7 YY |
1083 | return -EFAULT; |
1084 | ||
1085 | /* | |
1086 | * The destination is a ptrace buffer; we put in only user xstates: | |
1087 | */ | |
1088 | memset(&header, 0, sizeof(header)); | |
1089 | header.xfeatures = xsave->header.xfeatures; | |
1090 | header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR; | |
1091 | ||
1092 | /* | |
1093 | * Copy xregs_state->header: | |
1094 | */ | |
1095 | offset = offsetof(struct xregs_state, header); | |
1096 | size = sizeof(header); | |
1097 | ||
56583c9a | 1098 | ret = __copy_xstate_to_user(ubuf, &header, offset, size, size_total); |
91c3dba7 YY |
1099 | if (ret) |
1100 | return ret; | |
1101 | ||
1102 | for (i = 0; i < XFEATURE_MAX; i++) { | |
1103 | /* | |
1104 | * Copy only in-use xstates: | |
1105 | */ | |
1106 | if ((header.xfeatures >> i) & 1) { | |
1107 | void *src = __raw_xsave_addr(xsave, 1 << i); | |
1108 | ||
1109 | offset = xstate_offsets[i]; | |
1110 | size = xstate_sizes[i]; | |
1111 | ||
6ff15f8d IM |
1112 | /* The next component has to fit fully into the output buffer: */ |
1113 | if (offset + size > size_total) | |
1114 | break; | |
1115 | ||
56583c9a | 1116 | ret = __copy_xstate_to_user(ubuf, src, offset, size, size_total); |
91c3dba7 YY |
1117 | if (ret) |
1118 | return ret; | |
91c3dba7 YY |
1119 | } |
1120 | ||
1121 | } | |
1122 | ||
0852b374 RR |
1123 | if (xfeatures_mxcsr_quirk(header.xfeatures)) { |
1124 | offset = offsetof(struct fxregs_state, mxcsr); | |
1125 | size = MXCSR_AND_FLAGS_SIZE; | |
1126 | __copy_xstate_to_user(ubuf, &xsave->i387.mxcsr, offset, size, size_total); | |
1127 | } | |
1128 | ||
91c3dba7 YY |
1129 | /* |
1130 | * Fill xsave->i387.sw_reserved value for ptrace frame: | |
1131 | */ | |
1132 | offset = offsetof(struct fxregs_state, sw_reserved); | |
1133 | size = sizeof(xstate_fx_sw_bytes); | |
1134 | ||
56583c9a | 1135 | ret = __copy_xstate_to_user(ubuf, xstate_fx_sw_bytes, offset, size, size_total); |
91c3dba7 YY |
1136 | if (ret) |
1137 | return ret; | |
1138 | ||
1139 | return 0; | |
1140 | } | |
1141 | ||
1142 | /* | |
79fecc2b | 1143 | * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format |
af95774b | 1144 | * and copy to the target thread. This is called from xstateregs_set(). |
79fecc2b | 1145 | */ |
6d7f7da5 | 1146 | int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf) |
79fecc2b IM |
1147 | { |
1148 | unsigned int offset, size; | |
1149 | int i; | |
80d8ae86 | 1150 | struct xstate_header hdr; |
79fecc2b IM |
1151 | |
1152 | offset = offsetof(struct xregs_state, header); | |
80d8ae86 | 1153 | size = sizeof(hdr); |
79fecc2b | 1154 | |
80d8ae86 | 1155 | memcpy(&hdr, kbuf + offset, size); |
79fecc2b | 1156 | |
af95774b | 1157 | if (validate_xstate_header(&hdr)) |
79fecc2b IM |
1158 | return -EINVAL; |
1159 | ||
1160 | for (i = 0; i < XFEATURE_MAX; i++) { | |
1161 | u64 mask = ((u64)1 << i); | |
1162 | ||
b89eda48 | 1163 | if (hdr.xfeatures & mask) { |
79fecc2b IM |
1164 | void *dst = __raw_xsave_addr(xsave, 1 << i); |
1165 | ||
1166 | offset = xstate_offsets[i]; | |
1167 | size = xstate_sizes[i]; | |
1168 | ||
59dffa4e | 1169 | memcpy(dst, kbuf + offset, size); |
79fecc2b IM |
1170 | } |
1171 | } | |
1172 | ||
b89eda48 | 1173 | if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { |
0852b374 RR |
1174 | offset = offsetof(struct fxregs_state, mxcsr); |
1175 | size = MXCSR_AND_FLAGS_SIZE; | |
1176 | memcpy(&xsave->i387.mxcsr, kbuf + offset, size); | |
1177 | } | |
1178 | ||
79fecc2b IM |
1179 | /* |
1180 | * The state that came in from userspace was user-state only. | |
1181 | * Mask all the user states out of 'xfeatures': | |
1182 | */ | |
1183 | xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR; | |
1184 | ||
1185 | /* | |
1186 | * Add back in the features that came in from userspace: | |
1187 | */ | |
b89eda48 | 1188 | xsave->header.xfeatures |= hdr.xfeatures; |
79fecc2b IM |
1189 | |
1190 | return 0; | |
1191 | } | |
1192 | ||
1193 | /* | |
98c0fad9 EB |
1194 | * Convert from a ptrace or sigreturn standard-format user-space buffer to |
1195 | * kernel XSAVES format and copy to the target thread. This is called from | |
1196 | * xstateregs_set(), as well as potentially from the sigreturn() and | |
1197 | * rt_sigreturn() system calls. | |
91c3dba7 | 1198 | */ |
6d7f7da5 | 1199 | int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf) |
91c3dba7 YY |
1200 | { |
1201 | unsigned int offset, size; | |
1202 | int i; | |
af2c4322 | 1203 | struct xstate_header hdr; |
91c3dba7 YY |
1204 | |
1205 | offset = offsetof(struct xregs_state, header); | |
af2c4322 | 1206 | size = sizeof(hdr); |
91c3dba7 | 1207 | |
af2c4322 | 1208 | if (__copy_from_user(&hdr, ubuf + offset, size)) |
7b9094c6 | 1209 | return -EFAULT; |
91c3dba7 | 1210 | |
98c0fad9 | 1211 | if (validate_xstate_header(&hdr)) |
91c3dba7 YY |
1212 | return -EINVAL; |
1213 | ||
1214 | for (i = 0; i < XFEATURE_MAX; i++) { | |
1215 | u64 mask = ((u64)1 << i); | |
1216 | ||
3d703477 | 1217 | if (hdr.xfeatures & mask) { |
91c3dba7 YY |
1218 | void *dst = __raw_xsave_addr(xsave, 1 << i); |
1219 | ||
1220 | offset = xstate_offsets[i]; | |
1221 | size = xstate_sizes[i]; | |
1222 | ||
7b9094c6 IM |
1223 | if (__copy_from_user(dst, ubuf + offset, size)) |
1224 | return -EFAULT; | |
91c3dba7 YY |
1225 | } |
1226 | } | |
1227 | ||
3d703477 | 1228 | if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { |
0852b374 RR |
1229 | offset = offsetof(struct fxregs_state, mxcsr); |
1230 | size = MXCSR_AND_FLAGS_SIZE; | |
1231 | if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size)) | |
1232 | return -EFAULT; | |
1233 | } | |
1234 | ||
91c3dba7 YY |
1235 | /* |
1236 | * The state that came in from userspace was user-state only. | |
1237 | * Mask all the user states out of 'xfeatures': | |
1238 | */ | |
1239 | xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR; | |
1240 | ||
1241 | /* | |
1242 | * Add back in the features that came in from userspace: | |
1243 | */ | |
3d703477 | 1244 | xsave->header.xfeatures |= hdr.xfeatures; |
84594296 DH |
1245 | |
1246 | return 0; | |
1247 | } |