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CommitLineData
dc1e35c6
SS
1/*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
dc1e35c6 6#include <linux/compat.h>
7e7ce87f 7#include <linux/cpu.h>
59a36d16 8
df6b35f4 9#include <asm/fpu/api.h>
78f7f1e5 10#include <asm/fpu/internal.h>
fcbc99c4 11#include <asm/fpu/signal.h>
59a36d16 12#include <asm/fpu/regset.h>
b992c660 13
375074cc 14#include <asm/tlbflush.h>
dc1e35c6 15
5b073430
IM
16static const char *xfeature_names[] =
17{
18 "x87 floating point registers" ,
19 "SSE registers" ,
20 "AVX registers" ,
21 "MPX bounds registers" ,
22 "MPX CSR" ,
23 "AVX-512 opmask" ,
24 "AVX-512 Hi256" ,
25 "AVX-512 ZMM_Hi256" ,
26 "unknown xstate feature" ,
27};
28
dc1e35c6 29/*
614df7fb 30 * Mask of xstate features supported by the CPU and the kernel:
dc1e35c6 31 */
5b073430 32u64 xfeatures_mask __read_mostly;
dc1e35c6 33
dad8c4fe
DH
34static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
35static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
614df7fb 36static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
84246fe4 37
0a265375
DH
38/*
39 * Clear all of the X86_FEATURE_* bits that are unavailable
40 * when the CPU has no XSAVE support.
41 */
42void fpu__xstate_clear_all_cpu_caps(void)
43{
44 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
45 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
46 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
47 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
48 setup_clear_cpu_cap(X86_FEATURE_AVX);
49 setup_clear_cpu_cap(X86_FEATURE_AVX2);
50 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
51 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
52 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
53 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
54 setup_clear_cpu_cap(X86_FEATURE_MPX);
55}
56
5b073430
IM
57/*
58 * Return whether the system supports a given xfeature.
59 *
60 * Also return the name of the (most advanced) feature that the caller requested:
61 */
62int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
63{
64 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
65
66 if (unlikely(feature_name)) {
67 long xfeature_idx, max_idx;
68 u64 xfeatures_print;
69 /*
70 * So we use FLS here to be able to print the most advanced
71 * feature that was requested but is missing. So if a driver
d91cab78 72 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
5b073430
IM
73 * missing AVX feature - this is the most informative message
74 * to users:
75 */
76 if (xfeatures_missing)
77 xfeatures_print = xfeatures_missing;
78 else
79 xfeatures_print = xfeatures_needed;
80
81 xfeature_idx = fls64(xfeatures_print)-1;
82 max_idx = ARRAY_SIZE(xfeature_names)-1;
83 xfeature_idx = min(xfeature_idx, max_idx);
84
85 *feature_name = xfeature_names[xfeature_idx];
86 }
87
88 if (xfeatures_missing)
89 return 0;
90
91 return 1;
92}
93EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
94
29104e10 95/*
aeb997b9
IM
96 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
97 * a processor implementation detects that an FPU state component is still
98 * (or is again) in its initialized state, it may clear the corresponding
99 * bit in the header.xfeatures field, and can skip the writeout of registers
100 * to the corresponding memory layout.
73a3aeb3
IM
101 *
102 * This means that when the bit is zero, the state component might still contain
103 * some previous - non-initialized register state.
104 *
105 * Before writing xstate information to user-space we sanitize those components,
106 * to always ensure that the memory layout of a feature will be in the init state
107 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
108 * see some stale state in the memory layout during signal handling, debugging etc.
29104e10 109 */
36e49e7f 110void fpstate_sanitize_xstate(struct fpu *fpu)
29104e10 111{
c47ada30 112 struct fxregs_state *fx = &fpu->state.fxsave;
73a3aeb3 113 int feature_bit;
400e4b20 114 u64 xfeatures;
29104e10 115
1ac91a76 116 if (!use_xsaveopt())
29104e10
SS
117 return;
118
36e49e7f 119 xfeatures = fpu->state.xsave.header.xfeatures;
29104e10
SS
120
121 /*
122 * None of the feature bits are in init state. So nothing else
0d2eb44f 123 * to do for us, as the memory layout is up to date.
29104e10 124 */
400e4b20 125 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
29104e10
SS
126 return;
127
128 /*
129 * FP is in init state
130 */
d91cab78 131 if (!(xfeatures & XFEATURE_MASK_FP)) {
29104e10
SS
132 fx->cwd = 0x37f;
133 fx->swd = 0;
134 fx->twd = 0;
135 fx->fop = 0;
136 fx->rip = 0;
137 fx->rdp = 0;
138 memset(&fx->st_space[0], 0, 128);
139 }
140
141 /*
142 * SSE is in init state
143 */
d91cab78 144 if (!(xfeatures & XFEATURE_MASK_SSE))
29104e10
SS
145 memset(&fx->xmm_space[0], 0, 256);
146
73a3aeb3
IM
147 /*
148 * First two features are FPU and SSE, which above we handled
149 * in a special way already:
150 */
151 feature_bit = 0x2;
400e4b20 152 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
29104e10
SS
153
154 /*
73a3aeb3
IM
155 * Update all the remaining memory layouts according to their
156 * standard xstate layout, if their header bit is in the init
157 * state:
29104e10 158 */
400e4b20
IM
159 while (xfeatures) {
160 if (xfeatures & 0x1) {
29104e10
SS
161 int offset = xstate_offsets[feature_bit];
162 int size = xstate_sizes[feature_bit];
163
73a3aeb3 164 memcpy((void *)fx + offset,
6f575023 165 (void *)&init_fpstate.xsave + offset,
29104e10
SS
166 size);
167 }
168
400e4b20 169 xfeatures >>= 1;
29104e10
SS
170 feature_bit++;
171 }
172}
173
dc1e35c6 174/*
55cc4678
IM
175 * Enable the extended processor state save/restore feature.
176 * Called once per CPU onlining.
dc1e35c6 177 */
55cc4678 178void fpu__init_cpu_xstate(void)
dc1e35c6 179{
e84611fc 180 if (!cpu_has_xsave || !xfeatures_mask)
55cc4678
IM
181 return;
182
375074cc 183 cr4_set_bits(X86_CR4_OSXSAVE);
614df7fb 184 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
dc1e35c6
SS
185}
186
e6e888f9
DH
187/*
188 * Note that in the future we will likely need a pair of
189 * functions here: one for user xstates and the other for
190 * system xstates. For now, they are the same.
191 */
192static int xfeature_enabled(enum xfeature xfeature)
193{
194 return !!(xfeatures_mask & (1UL << xfeature));
195}
196
a1488f8b 197/*
39f1acd2
IM
198 * Record the offsets and sizes of various xstates contained
199 * in the XSAVE state memory layout.
a1488f8b 200 */
4995b9db 201static void __init setup_xstate_features(void)
a1488f8b 202{
ee9ae257 203 u32 eax, ebx, ecx, edx, i;
e6e888f9
DH
204 /* start at the beginnning of the "extended state" */
205 unsigned int last_good_offset = offsetof(struct xregs_state,
206 extended_state_area);
a1488f8b 207
ee9ae257 208 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
e6e888f9
DH
209 if (!xfeature_enabled(i))
210 continue;
a1488f8b 211
e6e888f9 212 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
ee9ae257
DH
213 xstate_offsets[i] = ebx;
214 xstate_sizes[i] = eax;
e6e888f9
DH
215 /*
216 * In our xstate size checks, we assume that the
217 * highest-numbered xstate feature has the
218 * highest offset in the buffer. Ensure it does.
219 */
220 WARN_ONCE(last_good_offset > xstate_offsets[i],
221 "x86/fpu: misordered xstate at %d\n", last_good_offset);
222 last_good_offset = xstate_offsets[i];
a1488f8b 223
ee9ae257 224 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", i, ebx, i, eax);
39f1acd2 225 }
a1488f8b
SS
226}
227
32231879 228static void __init print_xstate_feature(u64 xstate_mask)
69496e10 229{
33588b52 230 const char *feature_name;
69496e10 231
33588b52
IM
232 if (cpu_has_xfeatures(xstate_mask, &feature_name))
233 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
69496e10
IM
234}
235
236/*
237 * Print out all the supported xstate features:
238 */
32231879 239static void __init print_xstate_features(void)
69496e10 240{
d91cab78
DH
241 print_xstate_feature(XFEATURE_MASK_FP);
242 print_xstate_feature(XFEATURE_MASK_SSE);
243 print_xstate_feature(XFEATURE_MASK_YMM);
244 print_xstate_feature(XFEATURE_MASK_BNDREGS);
245 print_xstate_feature(XFEATURE_MASK_BNDCSR);
246 print_xstate_feature(XFEATURE_MASK_OPMASK);
247 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
248 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
69496e10
IM
249}
250
7496d645
FY
251/*
252 * This function sets up offsets and sizes of all extended states in
253 * xsave area. This supports both standard format and compacted format
254 * of the xsave aread.
7496d645 255 */
32231879 256static void __init setup_xstate_comp(void)
7496d645 257{
614df7fb 258 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
7496d645
FY
259 int i;
260
8ff925e1
FY
261 /*
262 * The FP xstates and SSE xstates are legacy states. They are always
263 * in the fixed offsets in the xsave area in either compacted form
264 * or standard form.
265 */
266 xstate_comp_offsets[0] = 0;
c47ada30 267 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
7496d645
FY
268
269 if (!cpu_has_xsaves) {
ee9ae257 270 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 271 if (xfeature_enabled(i)) {
7496d645
FY
272 xstate_comp_offsets[i] = xstate_offsets[i];
273 xstate_comp_sizes[i] = xstate_sizes[i];
274 }
275 }
276 return;
277 }
278
8a93c9e0
DH
279 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
280 FXSAVE_SIZE + XSAVE_HDR_SIZE;
7496d645 281
ee9ae257 282 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 283 if (xfeature_enabled(i))
7496d645
FY
284 xstate_comp_sizes[i] = xstate_sizes[i];
285 else
286 xstate_comp_sizes[i] = 0;
287
8a93c9e0 288 if (i > FIRST_EXTENDED_XFEATURE)
7496d645
FY
289 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
290 + xstate_comp_sizes[i-1];
291
292 }
293}
294
dc1e35c6
SS
295/*
296 * setup the xstate image representing the init state
297 */
32231879 298static void __init setup_init_fpu_buf(void)
dc1e35c6 299{
e97131a8
IM
300 static int on_boot_cpu = 1;
301
302 WARN_ON_FPU(!on_boot_cpu);
303 on_boot_cpu = 0;
304
5d2bd700
SS
305 if (!cpu_has_xsave)
306 return;
307
308 setup_xstate_features();
69496e10 309 print_xstate_features();
a1488f8b 310
47c2f292 311 if (cpu_has_xsaves) {
6f575023
IM
312 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
313 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
47c2f292
FY
314 }
315
29104e10
SS
316 /*
317 * Init all the features state with header_bv being 0x0
318 */
d65fcd60 319 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
3e261c14 320
29104e10
SS
321 /*
322 * Dump the init state again. This is to identify the init state
323 * of any feature which is not represented by all zero's.
324 */
c6813144 325 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
dc1e35c6
SS
326}
327
65ac2e9b
DH
328static int xfeature_is_supervisor(int xfeature_nr)
329{
330 /*
331 * We currently do not support supervisor states, but if
332 * we did, we could find out like this.
333 *
334 * SDM says: If state component i is a user state component,
335 * ECX[0] return 0; if state component i is a supervisor
336 * state component, ECX[0] returns 1.
337 u32 eax, ebx, ecx, edx;
338 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx;
339 return !!(ecx & 1);
340 */
341 return 0;
342}
343/*
344static int xfeature_is_user(int xfeature_nr)
345{
346 return !xfeature_is_supervisor(xfeature_nr);
347}
348*/
349
350/*
351 * This check is important because it is easy to get XSTATE_*
352 * confused with XSTATE_BIT_*.
353 */
354#define CHECK_XFEATURE(nr) do { \
355 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
356 WARN_ON(nr >= XFEATURE_MAX); \
357} while (0)
358
359/*
360 * We could cache this like xstate_size[], but we only use
361 * it here, so it would be a waste of space.
362 */
363static int xfeature_is_aligned(int xfeature_nr)
364{
365 u32 eax, ebx, ecx, edx;
366
367 CHECK_XFEATURE(xfeature_nr);
368 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
369 /*
370 * The value returned by ECX[1] indicates the alignment
371 * of state component i when the compacted format
372 * of the extended region of an XSAVE area is used
373 */
374 return !!(ecx & 2);
375}
376
377static int xfeature_uncompacted_offset(int xfeature_nr)
378{
379 u32 eax, ebx, ecx, edx;
380
381 CHECK_XFEATURE(xfeature_nr);
382 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
383 return ebx;
384}
385
386static int xfeature_size(int xfeature_nr)
387{
388 u32 eax, ebx, ecx, edx;
389
390 CHECK_XFEATURE(xfeature_nr);
391 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
392 return eax;
393}
394
395/*
396 * 'XSAVES' implies two different things:
397 * 1. saving of supervisor/system state
398 * 2. using the compacted format
399 *
400 * Use this function when dealing with the compacted format so
401 * that it is obvious which aspect of 'XSAVES' is being handled
402 * by the calling code.
403 */
404static int using_compacted_format(void)
405{
406 return cpu_has_xsaves;
407}
408
409static void __xstate_dump_leaves(void)
410{
411 int i;
412 u32 eax, ebx, ecx, edx;
413 static int should_dump = 1;
414
415 if (!should_dump)
416 return;
417 should_dump = 0;
418 /*
419 * Dump out a few leaves past the ones that we support
420 * just in case there are some goodies up there
421 */
422 for (i = 0; i < XFEATURE_MAX + 10; i++) {
423 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
424 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
425 XSTATE_CPUID, i, eax, ebx, ecx, edx);
426 }
427}
428
429#define XSTATE_WARN_ON(x) do { \
430 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
431 __xstate_dump_leaves(); \
432 } \
433} while (0)
434
ef78f2a4
DH
435#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
436 if ((nr == nr_macro) && \
437 WARN_ONCE(sz != sizeof(__struct), \
438 "%s: struct is %zu bytes, cpu state %d bytes\n", \
439 __stringify(nr_macro), sizeof(__struct), sz)) { \
440 __xstate_dump_leaves(); \
441 } \
442} while (0)
443
444/*
445 * We have a C struct for each 'xstate'. We need to ensure
446 * that our software representation matches what the CPU
447 * tells us about the state's size.
448 */
449static void check_xstate_against_struct(int nr)
450{
451 /*
452 * Ask the CPU for the size of the state.
453 */
454 int sz = xfeature_size(nr);
455 /*
456 * Match each CPU state with the corresponding software
457 * structure.
458 */
459 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
460 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
461 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
462 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
463 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
464 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
465
466 /*
467 * Make *SURE* to add any feature numbers in below if
468 * there are "holes" in the xsave state component
469 * numbers.
470 */
471 if ((nr < XFEATURE_YMM) ||
472 (nr >= XFEATURE_MAX)) {
473 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
474 XSTATE_WARN_ON(1);
475 }
476}
477
65ac2e9b
DH
478/*
479 * This essentially double-checks what the cpu told us about
480 * how large the XSAVE buffer needs to be. We are recalculating
481 * it to be safe.
482 */
483static void do_extra_xstate_size_checks(void)
484{
485 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
486 int i;
487
488 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
489 if (!xfeature_enabled(i))
490 continue;
ef78f2a4
DH
491
492 check_xstate_against_struct(i);
65ac2e9b
DH
493 /*
494 * Supervisor state components can be managed only by
495 * XSAVES, which is compacted-format only.
496 */
497 if (!using_compacted_format())
498 XSTATE_WARN_ON(xfeature_is_supervisor(i));
499
500 /* Align from the end of the previous feature */
501 if (xfeature_is_aligned(i))
502 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
503 /*
504 * The offset of a given state in the non-compacted
505 * format is given to us in a CPUID leaf. We check
506 * them for being ordered (increasing offsets) in
507 * setup_xstate_features().
508 */
509 if (!using_compacted_format())
510 paranoid_xstate_size = xfeature_uncompacted_offset(i);
511 /*
512 * The compacted-format offset always depends on where
513 * the previous state ended.
514 */
515 paranoid_xstate_size += xfeature_size(i);
516 }
517 XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
518}
519
7e7ce87f 520/*
614df7fb 521 * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
65ac2e9b
DH
522 *
523 * Note the SDM's wording here. "sub-function 0" only enumerates
524 * the size of the *user* states. If we use it to size a buffer
525 * that we use 'XSAVES' on, we could potentially overflow the
526 * buffer because 'XSAVES' saves system states too.
527 *
528 * Note that we do not currently set any bits on IA32_XSS so
529 * 'XCR0 | IA32_XSS == XCR0' for now.
7e7ce87f 530 */
4109ca06 531static unsigned int __init calculate_xstate_size(void)
7e7ce87f
FY
532{
533 unsigned int eax, ebx, ecx, edx;
4109ca06 534 unsigned int calculated_xstate_size;
7e7ce87f
FY
535
536 if (!cpu_has_xsaves) {
65ac2e9b
DH
537 /*
538 * - CPUID function 0DH, sub-function 0:
539 * EBX enumerates the size (in bytes) required by
540 * the XSAVE instruction for an XSAVE area
541 * containing all the *user* state components
542 * corresponding to bits currently set in XCR0.
543 */
7e7ce87f 544 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
4109ca06 545 calculated_xstate_size = ebx;
65ac2e9b
DH
546 } else {
547 /*
548 * - CPUID function 0DH, sub-function 1:
549 * EBX enumerates the size (in bytes) required by
550 * the XSAVES instruction for an XSAVE area
551 * containing all the state components
552 * corresponding to bits currently set in
553 * XCR0 | IA32_XSS.
554 */
555 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
556 calculated_xstate_size = ebx;
7e7ce87f 557 }
4109ca06
DH
558 return calculated_xstate_size;
559}
560
561/*
562 * Will the runtime-enumerated 'xstate_size' fit in the init
563 * task's statically-allocated buffer?
564 */
565static bool is_supported_xstate_size(unsigned int test_xstate_size)
566{
567 if (test_xstate_size <= sizeof(union fpregs_state))
568 return true;
569
570 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
571 sizeof(union fpregs_state), test_xstate_size);
572 return false;
573}
574
575static int init_xstate_size(void)
576{
577 /* Recompute the context size for enabled features: */
578 unsigned int possible_xstate_size = calculate_xstate_size();
579
580 /* Ensure we have the space to store all enabled: */
581 if (!is_supported_xstate_size(possible_xstate_size))
582 return -EINVAL;
583
584 /*
585 * The size is OK, we are definitely going to use xsave,
586 * make it known to the world that we need more space.
587 */
588 xstate_size = possible_xstate_size;
65ac2e9b 589 do_extra_xstate_size_checks();
4109ca06
DH
590 return 0;
591}
592
d91cab78
DH
593/*
594 * We enabled the XSAVE hardware, but something went wrong and
595 * we can not use it. Disable it.
596 */
597static void fpu__init_disable_system_xstate(void)
4109ca06
DH
598{
599 xfeatures_mask = 0;
600 cr4_clear_bits(X86_CR4_OSXSAVE);
601 fpu__xstate_clear_all_cpu_caps();
7e7ce87f
FY
602}
603
dc1e35c6
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604/*
605 * Enable and initialize the xsave feature.
55cc4678 606 * Called once per system bootup.
dc1e35c6 607 */
32231879 608void __init fpu__init_system_xstate(void)
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609{
610 unsigned int eax, ebx, ecx, edx;
e97131a8 611 static int on_boot_cpu = 1;
4109ca06 612 int err;
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613
614 WARN_ON_FPU(!on_boot_cpu);
615 on_boot_cpu = 0;
dc1e35c6 616
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617 if (!cpu_has_xsave) {
618 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
619 return;
620 }
621
ee813d53 622 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
e97131a8 623 WARN_ON_FPU(1);
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624 return;
625 }
626
627 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
614df7fb 628 xfeatures_mask = eax + ((u64)edx << 32);
dc1e35c6 629
d91cab78 630 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
614df7fb 631 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
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632 BUG();
633 }
634
6e553594 635 /* Support only the state known to the OS: */
614df7fb 636 xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
97e80a70 637
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638 /* Enable xstate instructions to be able to continue with initialization: */
639 fpu__init_cpu_xstate();
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640 err = init_xstate_size();
641 if (err) {
642 /* something went wrong, boot without any XSAVE support */
643 fpu__init_disable_system_xstate();
644 return;
645 }
dc1e35c6 646
614df7fb 647 update_regset_xstate_info(xstate_size, xfeatures_mask);
b992c660 648 fpu__init_prepare_fx_sw_frame();
5d2bd700 649 setup_init_fpu_buf();
5fd402df 650 setup_xstate_comp();
dc1e35c6 651
b0815359 652 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
614df7fb 653 xfeatures_mask,
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654 xstate_size,
655 cpu_has_xsaves ? "compacted" : "standard");
dc1e35c6 656}
82d4150c 657
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658/*
659 * Restore minimal FPU state after suspend:
660 */
661void fpu__resume_cpu(void)
662{
663 /*
664 * Restore XCR0 on xsave capable CPUs:
665 */
666 if (cpu_has_xsave)
667 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
668}
669
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670/*
671 * Given the xsave area and a state inside, this function returns the
672 * address of the state.
673 *
674 * This is the API that is called to get xstate address in either
675 * standard format or compacted format of xsave area.
676 *
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677 * Note that if there is no data for the field in the xsave buffer
678 * this will return NULL.
679 *
7496d645 680 * Inputs:
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681 * xstate: the thread's storage area for all FPU data
682 * xstate_feature: state which is defined in xsave.h (e.g.
d91cab78 683 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
7496d645 684 * Output:
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685 * address of the state in the xsave area, or NULL if the
686 * field is not present in the xsave buffer.
7496d645 687 */
0c4109be 688void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
7496d645 689{
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690 int feature_nr = fls64(xstate_feature) - 1;
691 /*
692 * Do we even *have* xsave state?
693 */
694 if (!boot_cpu_has(X86_FEATURE_XSAVE))
695 return NULL;
696
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697 /*
698 * We should not ever be requesting features that we
699 * have not enabled. Remember that pcntxt_mask is
700 * what we write to the XCR0 register.
701 */
702 WARN_ONCE(!(xfeatures_mask & xstate_feature),
703 "get of unsupported state");
704 /*
705 * This assumes the last 'xsave*' instruction to
706 * have requested that 'xstate_feature' be saved.
707 * If it did not, we might be seeing and old value
708 * of the field in the buffer.
709 *
710 * This can happen because the last 'xsave' did not
711 * request that this feature be saved (unlikely)
712 * or because the "init optimization" caused it
713 * to not be saved.
714 */
715 if (!(xsave->header.xfeatures & xstate_feature))
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716 return NULL;
717
0c4109be 718 return (void *)xsave + xstate_comp_offsets[feature_nr];
7496d645 719}
ba7b3920 720EXPORT_SYMBOL_GPL(get_xsave_addr);
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721
722/*
723 * This wraps up the common operations that need to occur when retrieving
724 * data from xsave state. It first ensures that the current task was
725 * using the FPU and retrieves the data in to a buffer. It then calculates
726 * the offset of the requested field in the buffer.
727 *
728 * This function is safe to call whether the FPU is in use or not.
729 *
730 * Note that this only works on the current task.
731 *
732 * Inputs:
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733 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
734 * XFEATURE_MASK_SSE, etc...)
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735 * Output:
736 * address of the state in the xsave area or NULL if the state
737 * is not present or is in its 'init state'.
738 */
739const void *get_xsave_field_ptr(int xsave_state)
740{
741 struct fpu *fpu = &current->thread.fpu;
742
743 if (!fpu->fpstate_active)
744 return NULL;
745 /*
746 * fpu__save() takes the CPU's xstate registers
747 * and saves them off to the 'fpu memory buffer.
748 */
749 fpu__save(fpu);
750
751 return get_xsave_addr(&fpu->state.xsave, xsave_state);
752}