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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | |
4 | * | |
5 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
6 | * and Martin Mares, November 1997. | |
7 | */ | |
8 | ||
9 | .text | |
1da177e4 | 10 | #include <linux/threads.h> |
8b2f7fff | 11 | #include <linux/init.h> |
1da177e4 LT |
12 | #include <linux/linkage.h> |
13 | #include <asm/segment.h> | |
14 | #include <asm/page.h> | |
15 | #include <asm/pgtable.h> | |
16 | #include <asm/desc.h> | |
17 | #include <asm/cache.h> | |
18 | #include <asm/thread_info.h> | |
86feeaa8 | 19 | #include <asm/asm-offsets.h> |
1da177e4 | 20 | #include <asm/setup.h> |
551889a6 | 21 | #include <asm/processor-flags.h> |
60a5317f | 22 | #include <asm/percpu.h> |
551889a6 IC |
23 | |
24 | /* Physical address */ | |
25 | #define pa(X) ((X) - __PAGE_OFFSET) | |
1da177e4 LT |
26 | |
27 | /* | |
28 | * References to members of the new_cpu_data structure. | |
29 | */ | |
30 | ||
31 | #define X86 new_cpu_data+CPUINFO_x86 | |
32 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
33 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
34 | #define X86_MASK new_cpu_data+CPUINFO_x86_mask | |
35 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math | |
36 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
37 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
38 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
39 | ||
40 | /* | |
41 | * This is how much memory *in addition to the memory covered up to | |
9ce8c2ed JF |
42 | * and including _end* we need mapped initially. |
43 | * We need: | |
44 | * - one bit for each possible page, but only in low memory, which means | |
45 | * 2^32/4096/8 = 128K worst case (4G/4G split.) | |
46 | * - enough space to map all low memory, which means | |
47 | * (2^32/4096) / 1024 pages (worst case, non PAE) | |
48 | * (2^32/4096) / 512 + 4 pages (worst case for PAE) | |
49 | * - a few pages for allocator use before the kernel pagetable has | |
50 | * been set up | |
1da177e4 LT |
51 | * |
52 | * Modulo rounding, each megabyte assigned here requires a kilobyte of | |
53 | * memory, which is currently unreclaimed. | |
54 | * | |
55 | * This should be a multiple of a page. | |
56 | */ | |
9ce8c2ed | 57 | LOW_PAGES = 1<<(32-PAGE_SHIFT_asm) |
1da177e4 | 58 | |
1e3e1972 IM |
59 | /* |
60 | * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate | |
61 | * pagetables from above the 16MB DMA limit, so we'll have to set | |
62 | * up pagetables 16MB more (worst-case): | |
63 | */ | |
64 | #ifdef CONFIG_DEBUG_PAGEALLOC | |
65 | LOW_PAGES = LOW_PAGES + 0x1000000 | |
66 | #endif | |
67 | ||
9ce8c2ed JF |
68 | #if PTRS_PER_PMD > 1 |
69 | PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD | |
70 | #else | |
71 | PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD) | |
72 | #endif | |
73 | BOOTBITMAP_SIZE = LOW_PAGES / 8 | |
74 | ALLOCATOR_SLOP = 4 | |
75 | ||
76 | INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm | |
1da177e4 LT |
77 | |
78 | /* | |
79 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
80 | * %esi points to the real-mode code as a 32-bit pointer. | |
81 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
82 | * any particular GDT layout, because we load our own as soon as we | |
83 | * can. | |
84 | */ | |
f8657e1b | 85 | .section .text.head,"ax",@progbits |
1da177e4 | 86 | ENTRY(startup_32) |
a24e7851 RR |
87 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
88 | us to not reload segments */ | |
89 | testb $(1<<6), BP_loadflags(%esi) | |
90 | jnz 2f | |
1da177e4 LT |
91 | |
92 | /* | |
93 | * Set segments to known values. | |
94 | */ | |
551889a6 | 95 | lgdt pa(boot_gdt_descr) |
1da177e4 LT |
96 | movl $(__BOOT_DS),%eax |
97 | movl %eax,%ds | |
98 | movl %eax,%es | |
99 | movl %eax,%fs | |
100 | movl %eax,%gs | |
a24e7851 | 101 | 2: |
1da177e4 LT |
102 | |
103 | /* | |
104 | * Clear BSS first so that there are no surprises... | |
1da177e4 | 105 | */ |
a24e7851 | 106 | cld |
1da177e4 | 107 | xorl %eax,%eax |
551889a6 IC |
108 | movl $pa(__bss_start),%edi |
109 | movl $pa(__bss_stop),%ecx | |
1da177e4 LT |
110 | subl %edi,%ecx |
111 | shrl $2,%ecx | |
112 | rep ; stosl | |
484b90c4 VG |
113 | /* |
114 | * Copy bootup parameters out of the way. | |
115 | * Note: %esi still has the pointer to the real-mode data. | |
116 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
117 | * kernel image and might not even be addressable by early boot page tables. | |
118 | * (kexec on panic case). Hence copy out the parameters before initializing | |
119 | * page tables. | |
120 | */ | |
551889a6 | 121 | movl $pa(boot_params),%edi |
484b90c4 VG |
122 | movl $(PARAM_SIZE/4),%ecx |
123 | cld | |
124 | rep | |
125 | movsl | |
551889a6 | 126 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
484b90c4 | 127 | andl %esi,%esi |
fa76dab9 | 128 | jz 1f # No comand line |
551889a6 | 129 | movl $pa(boot_command_line),%edi |
484b90c4 VG |
130 | movl $(COMMAND_LINE_SIZE/4),%ecx |
131 | rep | |
132 | movsl | |
133 | 1: | |
1da177e4 | 134 | |
a24e7851 | 135 | #ifdef CONFIG_PARAVIRT |
551889a6 IC |
136 | /* This is can only trip for a broken bootloader... */ |
137 | cmpw $0x207, pa(boot_params + BP_version) | |
a24e7851 RR |
138 | jb default_entry |
139 | ||
140 | /* Paravirt-compatible boot parameters. Look to see what architecture | |
141 | we're booting under. */ | |
551889a6 | 142 | movl pa(boot_params + BP_hardware_subarch), %eax |
a24e7851 RR |
143 | cmpl $num_subarch_entries, %eax |
144 | jae bad_subarch | |
145 | ||
551889a6 | 146 | movl pa(subarch_entries)(,%eax,4), %eax |
a24e7851 RR |
147 | subl $__PAGE_OFFSET, %eax |
148 | jmp *%eax | |
149 | ||
150 | bad_subarch: | |
151 | WEAK(lguest_entry) | |
152 | WEAK(xen_entry) | |
153 | /* Unknown implementation; there's really | |
154 | nothing we can do at this point. */ | |
155 | ud2a | |
8b2f7fff SR |
156 | |
157 | __INITDATA | |
158 | ||
a24e7851 RR |
159 | subarch_entries: |
160 | .long default_entry /* normal x86/PC */ | |
161 | .long lguest_entry /* lguest hypervisor */ | |
162 | .long xen_entry /* Xen hypervisor */ | |
163 | num_subarch_entries = (. - subarch_entries) / 4 | |
164 | .previous | |
165 | #endif /* CONFIG_PARAVIRT */ | |
166 | ||
1da177e4 LT |
167 | /* |
168 | * Initialize page tables. This creates a PDE and a set of page | |
169 | * tables, which are located immediately beyond _end. The variable | |
170 | * init_pg_tables_end is set up to point to the first "safe" location. | |
171 | * Mappings are created both at virtual address 0 (identity mapping) | |
172 | * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END. | |
173 | * | |
551889a6 | 174 | * Note that the stack is not yet set up! |
1da177e4 | 175 | */ |
a24e7851 | 176 | default_entry: |
551889a6 IC |
177 | #ifdef CONFIG_X86_PAE |
178 | ||
179 | /* | |
180 | * In PAE mode swapper_pg_dir is statically defined to contain enough | |
181 | * entries to cover the VMSPLIT option (that is the top 1, 2 or 3 | |
182 | * entries). The identity mapping is handled by pointing two PGD | |
183 | * entries to the first kernel PMD. | |
184 | * | |
185 | * Note the upper half of each PMD or PTE are always zero at | |
186 | * this stage. | |
187 | */ | |
188 | ||
86b2b70e | 189 | #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ |
551889a6 IC |
190 | |
191 | xorl %ebx,%ebx /* %ebx is kept at zero */ | |
192 | ||
193 | movl $pa(pg0), %edi | |
f0d43100 | 194 | movl %edi, pa(init_pg_tables_start) |
551889a6 | 195 | movl $pa(swapper_pg_pmd), %edx |
b2bc2731 | 196 | movl $PTE_IDENT_ATTR, %eax |
551889a6 | 197 | 10: |
b2bc2731 | 198 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ |
551889a6 IC |
199 | movl %ecx,(%edx) /* Store PMD entry */ |
200 | /* Upper half already zero */ | |
201 | addl $8,%edx | |
202 | movl $512,%ecx | |
203 | 11: | |
204 | stosl | |
205 | xchgl %eax,%ebx | |
206 | stosl | |
207 | xchgl %eax,%ebx | |
208 | addl $0x1000,%eax | |
209 | loop 11b | |
210 | ||
211 | /* | |
212 | * End condition: we must map up to and including INIT_MAP_BEYOND_END | |
213 | * bytes beyond the end of our own page tables. | |
214 | */ | |
b2bc2731 | 215 | leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp |
551889a6 IC |
216 | cmpl %ebp,%eax |
217 | jb 10b | |
218 | 1: | |
219 | movl %edi,pa(init_pg_tables_end) | |
6af61a76 YL |
220 | shrl $12, %eax |
221 | movl %eax, pa(max_pfn_mapped) | |
551889a6 IC |
222 | |
223 | /* Do early initialization of the fixmap area */ | |
b2bc2731 | 224 | movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax |
551889a6 IC |
225 | movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8) |
226 | #else /* Not PAE */ | |
227 | ||
228 | page_pde_offset = (__PAGE_OFFSET >> 20); | |
229 | ||
230 | movl $pa(pg0), %edi | |
f0d43100 | 231 | movl %edi, pa(init_pg_tables_start) |
551889a6 | 232 | movl $pa(swapper_pg_dir), %edx |
b2bc2731 | 233 | movl $PTE_IDENT_ATTR, %eax |
1da177e4 | 234 | 10: |
b2bc2731 | 235 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ |
1da177e4 LT |
236 | movl %ecx,(%edx) /* Store identity PDE entry */ |
237 | movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ | |
238 | addl $4,%edx | |
239 | movl $1024, %ecx | |
240 | 11: | |
241 | stosl | |
242 | addl $0x1000,%eax | |
243 | loop 11b | |
551889a6 IC |
244 | /* |
245 | * End condition: we must map up to and including INIT_MAP_BEYOND_END | |
246 | * bytes beyond the end of our own page tables; the +0x007 is | |
247 | * the attribute bits | |
248 | */ | |
b2bc2731 | 249 | leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp |
1da177e4 LT |
250 | cmpl %ebp,%eax |
251 | jb 10b | |
551889a6 | 252 | movl %edi,pa(init_pg_tables_end) |
6af61a76 YL |
253 | shrl $12, %eax |
254 | movl %eax, pa(max_pfn_mapped) | |
17d57a92 | 255 | |
551889a6 | 256 | /* Do early initialization of the fixmap area */ |
b2bc2731 | 257 | movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax |
551889a6 IC |
258 | movl %eax,pa(swapper_pg_dir+0xffc) |
259 | #endif | |
1da177e4 | 260 | jmp 3f |
1da177e4 LT |
261 | /* |
262 | * Non-boot CPU entry point; entered from trampoline.S | |
263 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
52de74dd | 264 | * we know the trampoline has already loaded the boot_gdt for us. |
f8657e1b VG |
265 | * |
266 | * If cpu hotplug is not supported then this code can go in init section | |
267 | * which will be freed later | |
1da177e4 | 268 | */ |
f8657e1b | 269 | |
5fe4486c | 270 | #ifndef CONFIG_HOTPLUG_CPU |
f8657e1b VG |
271 | .section .init.text,"ax",@progbits |
272 | #endif | |
273 | ||
274 | #ifdef CONFIG_SMP | |
1da177e4 LT |
275 | ENTRY(startup_32_smp) |
276 | cld | |
277 | movl $(__BOOT_DS),%eax | |
278 | movl %eax,%ds | |
279 | movl %eax,%es | |
280 | movl %eax,%fs | |
281 | movl %eax,%gs | |
5756dd59 IC |
282 | #endif /* CONFIG_SMP */ |
283 | 3: | |
1da177e4 LT |
284 | |
285 | /* | |
286 | * New page tables may be in 4Mbyte page mode and may | |
287 | * be using the global pages. | |
288 | * | |
289 | * NOTE! If we are on a 486 we may have no cr4 at all! | |
290 | * So we do not try to touch it unless we really have | |
291 | * some bits in it to set. This won't work if the BSP | |
292 | * implements cr4 but this AP does not -- very unlikely | |
293 | * but be warned! The same applies to the pse feature | |
294 | * if not equally supported. --macro | |
295 | * | |
296 | * NOTE! We have to correct for the fact that we're | |
297 | * not yet offset PAGE_OFFSET.. | |
298 | */ | |
551889a6 | 299 | #define cr4_bits pa(mmu_cr4_features) |
1da177e4 LT |
300 | movl cr4_bits,%edx |
301 | andl %edx,%edx | |
302 | jz 6f | |
303 | movl %cr4,%eax # Turn on paging options (PSE,PAE,..) | |
304 | orl %edx,%eax | |
305 | movl %eax,%cr4 | |
306 | ||
307 | btl $5, %eax # check if PAE is enabled | |
308 | jnc 6f | |
309 | ||
310 | /* Check if extended functions are implemented */ | |
311 | movl $0x80000000, %eax | |
312 | cpuid | |
313 | cmpl $0x80000000, %eax | |
314 | jbe 6f | |
315 | mov $0x80000001, %eax | |
316 | cpuid | |
317 | /* Execute Disable bit supported? */ | |
318 | btl $20, %edx | |
319 | jnc 6f | |
320 | ||
321 | /* Setup EFER (Extended Feature Enable Register) */ | |
322 | movl $0xc0000080, %ecx | |
323 | rdmsr | |
324 | ||
325 | btsl $11, %eax | |
326 | /* Make changes effective */ | |
327 | wrmsr | |
328 | ||
329 | 6: | |
1da177e4 LT |
330 | |
331 | /* | |
332 | * Enable paging | |
333 | */ | |
551889a6 | 334 | movl $pa(swapper_pg_dir),%eax |
1da177e4 LT |
335 | movl %eax,%cr3 /* set the page table pointer.. */ |
336 | movl %cr0,%eax | |
551889a6 | 337 | orl $X86_CR0_PG,%eax |
1da177e4 LT |
338 | movl %eax,%cr0 /* ..and set paging (PG) bit */ |
339 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
340 | 1: | |
341 | /* Set up the stack pointer */ | |
342 | lss stack_start,%esp | |
343 | ||
344 | /* | |
345 | * Initialize eflags. Some BIOS's leave bits like NT set. This would | |
346 | * confuse the debugger if this code is traced. | |
347 | * XXX - best to initialize before switching to protected mode. | |
348 | */ | |
349 | pushl $0 | |
350 | popfl | |
351 | ||
352 | #ifdef CONFIG_SMP | |
50359501 | 353 | cmpb $0, ready |
1da177e4 LT |
354 | jz 1f /* Initial CPU cleans BSS */ |
355 | jmp checkCPUtype | |
356 | 1: | |
357 | #endif /* CONFIG_SMP */ | |
358 | ||
359 | /* | |
360 | * start system 32-bit setup. We need to re-do some of the things done | |
361 | * in 16-bit mode for the "real" operations. | |
362 | */ | |
363 | call setup_idt | |
364 | ||
1da177e4 LT |
365 | checkCPUtype: |
366 | ||
367 | movl $-1,X86_CPUID # -1 for no CPUID initially | |
368 | ||
369 | /* check if it is 486 or 386. */ | |
370 | /* | |
371 | * XXX - this does a lot of unnecessary setup. Alignment checks don't | |
372 | * apply at our cpl of 0 and the stack ought to be aligned already, and | |
373 | * we don't need to preserve eflags. | |
374 | */ | |
375 | ||
376 | movb $3,X86 # at least 386 | |
377 | pushfl # push EFLAGS | |
378 | popl %eax # get EFLAGS | |
379 | movl %eax,%ecx # save original EFLAGS | |
380 | xorl $0x240000,%eax # flip AC and ID bits in EFLAGS | |
381 | pushl %eax # copy to EFLAGS | |
382 | popfl # set EFLAGS | |
383 | pushfl # get new EFLAGS | |
384 | popl %eax # put it in eax | |
385 | xorl %ecx,%eax # change in flags | |
386 | pushl %ecx # restore original EFLAGS | |
387 | popfl | |
388 | testl $0x40000,%eax # check if AC bit changed | |
389 | je is386 | |
390 | ||
391 | movb $4,X86 # at least 486 | |
392 | testl $0x200000,%eax # check if ID bit changed | |
393 | je is486 | |
394 | ||
395 | /* get vendor info */ | |
396 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
397 | cpuid | |
398 | movl %eax,X86_CPUID # save CPUID level | |
399 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
400 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
401 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
402 | ||
403 | orl %eax,%eax # do we have processor info as well? | |
404 | je is486 | |
405 | ||
406 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
407 | cpuid | |
408 | movb %al,%cl # save reg for future use | |
409 | andb $0x0f,%ah # mask processor family | |
410 | movb %ah,X86 | |
411 | andb $0xf0,%al # mask model | |
412 | shrb $4,%al | |
413 | movb %al,X86_MODEL | |
414 | andb $0x0f,%cl # mask mask revision | |
415 | movb %cl,X86_MASK | |
416 | movl %edx,X86_CAPABILITY | |
417 | ||
418 | is486: movl $0x50022,%ecx # set AM, WP, NE and MP | |
419 | jmp 2f | |
420 | ||
421 | is386: movl $2,%ecx # set MP | |
422 | 2: movl %cr0,%eax | |
423 | andl $0x80000011,%eax # Save PG,PE,ET | |
424 | orl %ecx,%eax | |
425 | movl %eax,%cr0 | |
426 | ||
427 | call check_x87 | |
2a57ff1a | 428 | lgdt early_gdt_descr |
1da177e4 LT |
429 | lidt idt_descr |
430 | ljmp $(__KERNEL_CS),$1f | |
431 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
432 | movl %eax,%ss # after changing gdt. | |
433 | ||
434 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
435 | movl %eax,%ds | |
436 | movl %eax,%es | |
437 | ||
0dd76d73 BG |
438 | movl $(__KERNEL_PERCPU), %eax |
439 | movl %eax,%fs # set this cpu's percpu | |
440 | ||
60a5317f TH |
441 | #ifdef CONFIG_CC_STACKPROTECTOR |
442 | /* | |
443 | * The linker can't handle this by relocation. Manually set | |
444 | * base address in stack canary segment descriptor. | |
445 | */ | |
446 | cmpb $0,ready | |
447 | jne 1f | |
448 | movl $per_cpu__gdt_page,%eax | |
449 | movl $per_cpu__stack_canary,%ecx | |
5c79d2a5 | 450 | subl $20, %ecx |
60a5317f TH |
451 | movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) |
452 | shrl $16, %ecx | |
453 | movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) | |
454 | movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) | |
455 | 1: | |
456 | #endif | |
457 | movl $(__KERNEL_STACK_CANARY),%eax | |
464d1a78 | 458 | movl %eax,%gs |
60a5317f TH |
459 | |
460 | xorl %eax,%eax # Clear LDT | |
1da177e4 | 461 | lldt %ax |
f95d47ca | 462 | |
1da177e4 | 463 | cld # gcc2 wants the direction flag cleared at all times |
26fd5e08 | 464 | pushl $0 # fake return address for unwinder |
1da177e4 | 465 | #ifdef CONFIG_SMP |
d92de65c SL |
466 | movb ready, %cl |
467 | movb $1, ready | |
29fe5f3b | 468 | cmpb $0,%cl # the first CPU calls start_kernel |
7c3576d2 | 469 | je 1f |
3e970473 | 470 | movl (stack_start), %esp |
7c3576d2 | 471 | 1: |
1da177e4 | 472 | #endif /* CONFIG_SMP */ |
e3f77edf | 473 | jmp *(initial_code) |
1da177e4 LT |
474 | |
475 | /* | |
476 | * We depend on ET to be correct. This checks for 287/387. | |
477 | */ | |
478 | check_x87: | |
479 | movb $0,X86_HARD_MATH | |
480 | clts | |
481 | fninit | |
482 | fstsw %ax | |
483 | cmpb $0,%al | |
484 | je 1f | |
485 | movl %cr0,%eax /* no coprocessor: have to set bits */ | |
486 | xorl $4,%eax /* set EM */ | |
487 | movl %eax,%cr0 | |
488 | ret | |
489 | ALIGN | |
490 | 1: movb $1,X86_HARD_MATH | |
491 | .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ | |
492 | ret | |
493 | ||
494 | /* | |
495 | * setup_idt | |
496 | * | |
497 | * sets up a idt with 256 entries pointing to | |
498 | * ignore_int, interrupt gates. It doesn't actually load | |
499 | * idt - that can be done only after paging has been enabled | |
500 | * and the kernel moved to PAGE_OFFSET. Interrupts | |
501 | * are enabled elsewhere, when we can be relatively | |
502 | * sure everything is ok. | |
503 | * | |
504 | * Warning: %esi is live across this function. | |
505 | */ | |
506 | setup_idt: | |
507 | lea ignore_int,%edx | |
508 | movl $(__KERNEL_CS << 16),%eax | |
509 | movw %dx,%ax /* selector = 0x0010 = cs */ | |
510 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
511 | ||
512 | lea idt_table,%edi | |
513 | mov $256,%ecx | |
514 | rp_sidt: | |
515 | movl %eax,(%edi) | |
516 | movl %edx,4(%edi) | |
517 | addl $8,%edi | |
518 | dec %ecx | |
519 | jne rp_sidt | |
ec5c0926 CE |
520 | |
521 | .macro set_early_handler handler,trapno | |
522 | lea \handler,%edx | |
523 | movl $(__KERNEL_CS << 16),%eax | |
524 | movw %dx,%ax | |
525 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ | |
526 | lea idt_table,%edi | |
527 | movl %eax,8*\trapno(%edi) | |
528 | movl %edx,8*\trapno+4(%edi) | |
529 | .endm | |
530 | ||
531 | set_early_handler handler=early_divide_err,trapno=0 | |
532 | set_early_handler handler=early_illegal_opcode,trapno=6 | |
533 | set_early_handler handler=early_protection_fault,trapno=13 | |
534 | set_early_handler handler=early_page_fault,trapno=14 | |
535 | ||
1da177e4 LT |
536 | ret |
537 | ||
ec5c0926 CE |
538 | early_divide_err: |
539 | xor %edx,%edx | |
540 | pushl $0 /* fake errcode */ | |
541 | jmp early_fault | |
542 | ||
543 | early_illegal_opcode: | |
544 | movl $6,%edx | |
545 | pushl $0 /* fake errcode */ | |
546 | jmp early_fault | |
547 | ||
548 | early_protection_fault: | |
549 | movl $13,%edx | |
550 | jmp early_fault | |
551 | ||
552 | early_page_fault: | |
553 | movl $14,%edx | |
554 | jmp early_fault | |
555 | ||
556 | early_fault: | |
557 | cld | |
558 | #ifdef CONFIG_PRINTK | |
382f64ab | 559 | pusha |
ec5c0926 CE |
560 | movl $(__KERNEL_DS),%eax |
561 | movl %eax,%ds | |
562 | movl %eax,%es | |
563 | cmpl $2,early_recursion_flag | |
564 | je hlt_loop | |
565 | incl early_recursion_flag | |
566 | movl %cr2,%eax | |
567 | pushl %eax | |
568 | pushl %edx /* trapno */ | |
569 | pushl $fault_msg | |
ec5c0926 | 570 | call printk |
ec5c0926 | 571 | #endif |
94878efd | 572 | call dump_stack |
ec5c0926 CE |
573 | hlt_loop: |
574 | hlt | |
575 | jmp hlt_loop | |
576 | ||
1da177e4 LT |
577 | /* This is the default interrupt "handler" :-) */ |
578 | ALIGN | |
579 | ignore_int: | |
580 | cld | |
d59745ce | 581 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
582 | pushl %eax |
583 | pushl %ecx | |
584 | pushl %edx | |
585 | pushl %es | |
586 | pushl %ds | |
587 | movl $(__KERNEL_DS),%eax | |
588 | movl %eax,%ds | |
589 | movl %eax,%es | |
ec5c0926 CE |
590 | cmpl $2,early_recursion_flag |
591 | je hlt_loop | |
592 | incl early_recursion_flag | |
1da177e4 LT |
593 | pushl 16(%esp) |
594 | pushl 24(%esp) | |
595 | pushl 32(%esp) | |
596 | pushl 40(%esp) | |
597 | pushl $int_msg | |
598 | call printk | |
d5e397cb IM |
599 | |
600 | call dump_stack | |
601 | ||
1da177e4 LT |
602 | addl $(5*4),%esp |
603 | popl %ds | |
604 | popl %es | |
605 | popl %edx | |
606 | popl %ecx | |
607 | popl %eax | |
d59745ce | 608 | #endif |
1da177e4 LT |
609 | iret |
610 | ||
583323b9 TG |
611 | .section .cpuinit.data,"wa" |
612 | .align 4 | |
613 | ENTRY(initial_code) | |
614 | .long i386_start_kernel | |
615 | ||
f8657e1b | 616 | .section .text |
1da177e4 LT |
617 | /* |
618 | * Real beginning of normal "text" segment | |
619 | */ | |
620 | ENTRY(stext) | |
621 | ENTRY(_stext) | |
622 | ||
623 | /* | |
624 | * BSS section | |
625 | */ | |
5ead97c8 JF |
626 | .section ".bss.page_aligned","wa" |
627 | .align PAGE_SIZE_asm | |
551889a6 | 628 | #ifdef CONFIG_X86_PAE |
ed2b7e2b | 629 | swapper_pg_pmd: |
551889a6 IC |
630 | .fill 1024*KPMDS,4,0 |
631 | #else | |
1da177e4 LT |
632 | ENTRY(swapper_pg_dir) |
633 | .fill 1024,4,0 | |
551889a6 | 634 | #endif |
aa65af3f | 635 | swapper_pg_fixmap: |
b1c931e3 | 636 | .fill 1024,4,0 |
1da177e4 LT |
637 | ENTRY(empty_zero_page) |
638 | .fill 4096,1,0 | |
1da177e4 LT |
639 | /* |
640 | * This starts the data section. | |
641 | */ | |
551889a6 IC |
642 | #ifdef CONFIG_X86_PAE |
643 | .section ".data.page_aligned","wa" | |
644 | /* Page-aligned for the benefit of paravirt? */ | |
645 | .align PAGE_SIZE_asm | |
646 | ENTRY(swapper_pg_dir) | |
b2bc2731 | 647 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ |
551889a6 | 648 | # if KPMDS == 3 |
b2bc2731 SS |
649 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
650 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
651 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0 | |
551889a6 IC |
652 | # elif KPMDS == 2 |
653 | .long 0,0 | |
b2bc2731 SS |
654 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
655 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
551889a6 IC |
656 | # elif KPMDS == 1 |
657 | .long 0,0 | |
658 | .long 0,0 | |
b2bc2731 | 659 | .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 |
551889a6 IC |
660 | # else |
661 | # error "Kernel PMDs should be 1, 2 or 3" | |
662 | # endif | |
663 | .align PAGE_SIZE_asm /* needs to be page-sized too */ | |
664 | #endif | |
665 | ||
1da177e4 | 666 | .data |
1da177e4 LT |
667 | ENTRY(stack_start) |
668 | .long init_thread_union+THREAD_SIZE | |
669 | .long __BOOT_DS | |
670 | ||
671 | ready: .byte 0 | |
672 | ||
ec5c0926 CE |
673 | early_recursion_flag: |
674 | .long 0 | |
675 | ||
1da177e4 | 676 | int_msg: |
d5e397cb | 677 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
1da177e4 | 678 | |
ec5c0926 | 679 | fault_msg: |
575ca735 VN |
680 | /* fault info: */ |
681 | .ascii "BUG: Int %d: CR2 %p\n" | |
682 | /* pusha regs: */ | |
683 | .ascii " EDI %p ESI %p EBP %p ESP %p\n" | |
684 | .ascii " EBX %p EDX %p ECX %p EAX %p\n" | |
685 | /* fault frame: */ | |
686 | .ascii " err %p EIP %p CS %p flg %p\n" | |
687 | .ascii "Stack: %p %p %p %p %p %p %p %p\n" | |
688 | .ascii " %p %p %p %p %p %p %p %p\n" | |
689 | .asciz " %p %p %p %p %p %p %p %p\n" | |
ec5c0926 | 690 | |
9702785a | 691 | #include "../../x86/xen/xen-head.S" |
5ead97c8 | 692 | |
1da177e4 LT |
693 | /* |
694 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
695 | * only used by the lidt and lgdt instructions. They are not | |
696 | * like usual segment descriptors - they consist of a 16-bit | |
697 | * segment size, and 32-bit linear address value: | |
698 | */ | |
699 | ||
700 | .globl boot_gdt_descr | |
701 | .globl idt_descr | |
1da177e4 LT |
702 | |
703 | ALIGN | |
704 | # early boot GDT descriptor (must use 1:1 address mapping) | |
705 | .word 0 # 32 bit align gdt_desc.address | |
706 | boot_gdt_descr: | |
707 | .word __BOOT_DS+7 | |
52de74dd | 708 | .long boot_gdt - __PAGE_OFFSET |
1da177e4 LT |
709 | |
710 | .word 0 # 32-bit align idt_desc.address | |
711 | idt_descr: | |
712 | .word IDT_ENTRIES*8-1 # idt contains 256 entries | |
713 | .long idt_table | |
714 | ||
715 | # boot GDT descriptor (later on used by CPU#0): | |
716 | .word 0 # 32 bit align gdt_desc.address | |
2a57ff1a | 717 | ENTRY(early_gdt_descr) |
1da177e4 | 718 | .word GDT_ENTRIES*8-1 |
7a61d35d | 719 | .long per_cpu__gdt_page /* Overwritten for secondary CPUs */ |
1da177e4 | 720 | |
1da177e4 | 721 | /* |
52de74dd | 722 | * The boot_gdt must mirror the equivalent in setup.S and is |
1da177e4 LT |
723 | * used only for booting. |
724 | */ | |
725 | .align L1_CACHE_BYTES | |
52de74dd | 726 | ENTRY(boot_gdt) |
1da177e4 LT |
727 | .fill GDT_ENTRY_BOOT_CS,8,0 |
728 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
729 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ |