[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kernel / i387.c

/*
 *  Copyright (C) 1994 Linus Torvalds
 *
 *  Pentium III FXSR, SSE support
 *  General FPU state handling cleanups
 *	Gareth Hughes <gareth@valinux.com>, May 2000
 */
#include <linux/module.h>
#include <linux/regset.h>
#include <linux/sched.h>

#include <asm/sigcontext.h>
#include <asm/processor.h>
#include <asm/math_emu.h>
#include <asm/uaccess.h>
#include <asm/ptrace.h>
#include <asm/i387.h>
#include <asm/user.h>

#ifdef CONFIG_X86_64
# include <asm/sigcontext32.h>
# include <asm/user32.h>
#else
# define save_i387_xstate_ia32		save_i387_xstate
# define restore_i387_xstate_ia32	restore_i387_xstate
# define _fpstate_ia32		_fpstate
# define _xstate_ia32		_xstate
# define sig_xstate_ia32_size   sig_xstate_size
# define fx_sw_reserved_ia32	fx_sw_reserved
# define user_i387_ia32_struct	user_i387_struct
# define user32_fxsr_struct	user_fxsr_struct
#endif

#ifdef CONFIG_MATH_EMULATION
# define HAVE_HWFP		(boot_cpu_data.hard_math)
#else
# define HAVE_HWFP		1
#endif

static unsigned int		mxcsr_feature_mask __read_mostly = 0xffffffffu;
unsigned int xstate_size;
unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
static struct i387_fxsave_struct fx_scratch __cpuinitdata;

void __cpuinit mxcsr_feature_mask_init(void)
{
	unsigned long mask = 0;

	clts();
	if (cpu_has_fxsr) {
		memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
		asm volatile("fxsave %0" : : "m" (fx_scratch));
		mask = fx_scratch.mxcsr_mask;
		if (mask == 0)
			mask = 0x0000ffbf;
	}
	mxcsr_feature_mask &= mask;
	stts();
}

void __cpuinit init_thread_xstate(void)
{
	if (!HAVE_HWFP) {
		xstate_size = sizeof(struct i387_soft_struct);
		return;
	}

	if (cpu_has_xsave) {
		xsave_cntxt_init();
		return;
	}

	if (cpu_has_fxsr)
		xstate_size = sizeof(struct i387_fxsave_struct);
#ifdef CONFIG_X86_32
	else
		xstate_size = sizeof(struct i387_fsave_struct);
#endif
}

#ifdef CONFIG_X86_64
/*
 * Called at bootup to set up the initial FPU state that is later cloned
 * into all processes.
 */
void __cpuinit fpu_init(void)
{
	unsigned long oldcr0 = read_cr0();

	set_in_cr4(X86_CR4_OSFXSR);
	set_in_cr4(X86_CR4_OSXMMEXCPT);

	write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */

	/*
	 * Boot processor to setup the FP and extended state context info.
	 */
	if (!smp_processor_id())
		init_thread_xstate();
	xsave_init();

	mxcsr_feature_mask_init();
	/* clean state in init */
	if (cpu_has_xsave)
		current_thread_info()->status = TS_XSAVE;
	else
		current_thread_info()->status = 0;
	clear_used_math();
}
#endif	/* CONFIG_X86_64 */

/*
 * The _current_ task is using the FPU for the first time
 * so initialize it and set the mxcsr to its default
 * value at reset if we support XMM instructions and then
 * remeber the current task has used the FPU.
 */
int init_fpu(struct task_struct *tsk)
{
	if (tsk_used_math(tsk)) {
		if (HAVE_HWFP && tsk == current)
			unlazy_fpu(tsk);
		return 0;
	}

	/*
	 * Memory allocation at the first usage of the FPU and other state.
	 */
	if (!tsk->thread.xstate) {
		tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
						      GFP_KERNEL);
		if (!tsk->thread.xstate)
			return -ENOMEM;
	}

#ifdef CONFIG_X86_32
	if (!HAVE_HWFP) {
		memset(tsk->thread.xstate, 0, xstate_size);
		finit_task(tsk);
		set_stopped_child_used_math(tsk);
		return 0;
	}
#endif

	if (cpu_has_fxsr) {
		struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;

		memset(fx, 0, xstate_size);
		fx->cwd = 0x37f;
		if (cpu_has_xmm)
			fx->mxcsr = MXCSR_DEFAULT;
	} else {
		struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
		memset(fp, 0, xstate_size);
		fp->cwd = 0xffff037fu;
		fp->swd = 0xffff0000u;
		fp->twd = 0xffffffffu;
		fp->fos = 0xffff0000u;
	}
	/*
	 * Only the device not available exception or ptrace can call init_fpu.
	 */
	set_stopped_child_used_math(tsk);
	return 0;
}

int fpregs_active(struct task_struct *target, const struct user_regset *regset)
{
	return tsk_used_math(target) ? regset->n : 0;
}

int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
{
	return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
}

int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		void *kbuf, void __user *ubuf)
{
	int ret;

	if (!cpu_has_fxsr)
		return -ENODEV;

	ret = init_fpu(target);
	if (ret)
		return ret;

	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
				   &target->thread.xstate->fxsave, 0, -1);
}

int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		const void *kbuf, const void __user *ubuf)
{
	int ret;

	if (!cpu_has_fxsr)
		return -ENODEV;

	ret = init_fpu(target);
	if (ret)
		return ret;

	set_stopped_child_used_math(target);

	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
				 &target->thread.xstate->fxsave, 0, -1);

	/*
	 * mxcsr reserved bits must be masked to zero for security reasons.
	 */
	target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;

	/*
	 * update the header bits in the xsave header, indicating the
	 * presence of FP and SSE state.
	 */
	if (cpu_has_xsave)
		target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;

	return ret;
}

#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION

/*
 * FPU tag word conversions.
 */

static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
{
	unsigned int tmp; /* to avoid 16 bit prefixes in the code */

	/* Transform each pair of bits into 01 (valid) or 00 (empty) */
	tmp = ~twd;
	tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
	/* and move the valid bits to the lower byte. */
	tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
	tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
	tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */

	return tmp;
}

#define FPREG_ADDR(f, n)	((void *)&(f)->st_space + (n) * 16);
#define FP_EXP_TAG_VALID	0
#define FP_EXP_TAG_ZERO		1
#define FP_EXP_TAG_SPECIAL	2
#define FP_EXP_TAG_EMPTY	3

static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
{
	struct _fpxreg *st;
	u32 tos = (fxsave->swd >> 11) & 7;
	u32 twd = (unsigned long) fxsave->twd;
	u32 tag;
	u32 ret = 0xffff0000u;
	int i;

	for (i = 0; i < 8; i++, twd >>= 1) {
		if (twd & 0x1) {
			st = FPREG_ADDR(fxsave, (i - tos) & 7);

			switch (st->exponent & 0x7fff) {
			case 0x7fff:
				tag = FP_EXP_TAG_SPECIAL;
				break;
			case 0x0000:
				if (!st->significand[0] &&
				    !st->significand[1] &&
				    !st->significand[2] &&
				    !st->significand[3])
					tag = FP_EXP_TAG_ZERO;
				else
					tag = FP_EXP_TAG_SPECIAL;
				break;
			default:
				if (st->significand[3] & 0x8000)
					tag = FP_EXP_TAG_VALID;
				else
					tag = FP_EXP_TAG_SPECIAL;
				break;
			}
		} else {
			tag = FP_EXP_TAG_EMPTY;
		}
		ret |= tag << (2 * i);
	}
	return ret;
}

/*
 * FXSR floating point environment conversions.
 */

static void
convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
{
	struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
	struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
	int i;

	env->cwd = fxsave->cwd | 0xffff0000u;
	env->swd = fxsave->swd | 0xffff0000u;
	env->twd = twd_fxsr_to_i387(fxsave);

#ifdef CONFIG_X86_64
	env->fip = fxsave->rip;
	env->foo = fxsave->rdp;
	if (tsk == current) {
		/*
		 * should be actually ds/cs at fpu exception time, but
		 * that information is not available in 64bit mode.
		 */
		asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
		asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
	} else {
		struct pt_regs *regs = task_pt_regs(tsk);

		env->fos = 0xffff0000 | tsk->thread.ds;
		env->fcs = regs->cs;
	}
#else
	env->fip = fxsave->fip;
	env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
	env->foo = fxsave->foo;
	env->fos = fxsave->fos;
#endif

	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(to[0]));
}

static void convert_to_fxsr(struct task_struct *tsk,
			    const struct user_i387_ia32_struct *env)

{
	struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
	struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
	int i;

	fxsave->cwd = env->cwd;
	fxsave->swd = env->swd;
	fxsave->twd = twd_i387_to_fxsr(env->twd);
	fxsave->fop = (u16) ((u32) env->fcs >> 16);
#ifdef CONFIG_X86_64
	fxsave->rip = env->fip;
	fxsave->rdp = env->foo;
	/* cs and ds ignored */
#else
	fxsave->fip = env->fip;
	fxsave->fcs = (env->fcs & 0xffff);
	fxsave->foo = env->foo;
	fxsave->fos = env->fos;
#endif

	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(from[0]));
}

int fpregs_get(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       void *kbuf, void __user *ubuf)
{
	struct user_i387_ia32_struct env;
	int ret;

	ret = init_fpu(target);
	if (ret)
		return ret;

	if (!HAVE_HWFP)
		return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);

	if (!cpu_has_fxsr) {
		return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
					   &target->thread.xstate->fsave, 0,
					   -1);
	}

	if (kbuf && pos == 0 && count == sizeof(env)) {
		convert_from_fxsr(kbuf, target);
		return 0;
	}

	convert_from_fxsr(&env, target);

	return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
}

int fpregs_set(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       const void *kbuf, const void __user *ubuf)
{
	struct user_i387_ia32_struct env;
	int ret;

	ret = init_fpu(target);
	if (ret)
		return ret;

	set_stopped_child_used_math(target);

	if (!HAVE_HWFP)
		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);

	if (!cpu_has_fxsr) {
		return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
					  &target->thread.xstate->fsave, 0, -1);
	}

	if (pos > 0 || count < sizeof(env))
		convert_from_fxsr(&env, target);

	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
	if (!ret)
		convert_to_fxsr(target, &env);

	/*
	 * update the header bit in the xsave header, indicating the
	 * presence of FP.
	 */
	if (cpu_has_xsave)
		target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
	return ret;
}

/*
 * Signal frame handlers.
 */

static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
{
	struct task_struct *tsk = current;
	struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;

	fp->status = fp->swd;
	if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
		return -1;
	return 1;
}

static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
{
	struct task_struct *tsk = current;
	struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
	struct user_i387_ia32_struct env;
	int err = 0;

	convert_from_fxsr(&env, tsk);
	if (__copy_to_user(buf, &env, sizeof(env)))
		return -1;

	err |= __put_user(fx->swd, &buf->status);
	err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
	if (err)
		return -1;

	if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
		return -1;
	return 1;
}

static int save_i387_xsave(void __user *buf)
{
	struct task_struct *tsk = current;
	struct _fpstate_ia32 __user *fx = buf;
	int err = 0;

	/*
	 * For legacy compatible, we always set FP/SSE bits in the bit
	 * vector while saving the state to the user context.
	 * This will enable us capturing any changes(during sigreturn) to
	 * the FP/SSE bits by the legacy applications which don't touch
	 * xstate_bv in the xsave header.
	 *
	 * xsave aware applications can change the xstate_bv in the xsave
	 * header as well as change any contents in the memory layout.
	 * xrestore as part of sigreturn will capture all the changes.
	 */
	tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;

	if (save_i387_fxsave(fx) < 0)
		return -1;

	err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
			     sizeof(struct _fpx_sw_bytes));
	err |= __put_user(FP_XSTATE_MAGIC2,
			  (__u32 __user *) (buf + sig_xstate_ia32_size
					    - FP_XSTATE_MAGIC2_SIZE));
	if (err)
		return -1;

	return 1;
}

int save_i387_xstate_ia32(void __user *buf)
{
	struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
	struct task_struct *tsk = current;

	if (!used_math())
		return 0;

	if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
		return -EACCES;
	/*
	 * This will cause a "finit" to be triggered by the next
	 * attempted FPU operation by the 'current' process.
	 */
	clear_used_math();

	if (!HAVE_HWFP) {
		return fpregs_soft_get(current, NULL,
				       0, sizeof(struct user_i387_ia32_struct),
				       NULL, fp) ? -1 : 1;
	}

	unlazy_fpu(tsk);

	if (cpu_has_xsave)
		return save_i387_xsave(fp);
	if (cpu_has_fxsr)
		return save_i387_fxsave(fp);
	else
		return save_i387_fsave(fp);
}

static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
{
	struct task_struct *tsk = current;

	return __copy_from_user(&tsk->thread.xstate->fsave, buf,
				sizeof(struct i387_fsave_struct));
}

static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
			       unsigned int size)
{
	struct task_struct *tsk = current;
	struct user_i387_ia32_struct env;
	int err;

	err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
			       size);
	/* mxcsr reserved bits must be masked to zero for security reasons */
	tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
	if (err || __copy_from_user(&env, buf, sizeof(env)))
		return 1;
	convert_to_fxsr(tsk, &env);

	return 0;
}

static int restore_i387_xsave(void __user *buf)
{
	struct _fpx_sw_bytes fx_sw_user;
	struct _fpstate_ia32 __user *fx_user =
			((struct _fpstate_ia32 __user *) buf);
	struct i387_fxsave_struct __user *fx =
		(struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
	struct xsave_hdr_struct *xsave_hdr =
				&current->thread.xstate->xsave.xsave_hdr;
	u64 mask;
	int err;

	if (check_for_xstate(fx, buf, &fx_sw_user))
		goto fx_only;

	mask = fx_sw_user.xstate_bv;

	err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);

	xsave_hdr->xstate_bv &= pcntxt_mask;
	/*
	 * These bits must be zero.
	 */
	xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;

	/*
	 * Init the state that is not present in the memory layout
	 * and enabled by the OS.
	 */
	mask = ~(pcntxt_mask & ~mask);
	xsave_hdr->xstate_bv &= mask;

	return err;
fx_only:
	/*
	 * Couldn't find the extended state information in the memory
	 * layout. Restore the FP/SSE and init the other extended state
	 * enabled by the OS.
	 */
	xsave_hdr->xstate_bv = XSTATE_FPSSE;
	return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
}

int restore_i387_xstate_ia32(void __user *buf)
{
	int err;
	struct task_struct *tsk = current;
	struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;

	if (HAVE_HWFP)
		clear_fpu(tsk);

	if (!buf) {
		if (used_math()) {
			clear_fpu(tsk);
			clear_used_math();
		}

		return 0;
	} else
		if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
			return -EACCES;

	if (!used_math()) {
		err = init_fpu(tsk);
		if (err)
			return err;
	}

	if (HAVE_HWFP) {
		if (cpu_has_xsave)
			err = restore_i387_xsave(buf);
		else if (cpu_has_fxsr)
			err = restore_i387_fxsave(fp, sizeof(struct
							   i387_fxsave_struct));
		else
			err = restore_i387_fsave(fp);
	} else {
		err = fpregs_soft_set(current, NULL,
				      0, sizeof(struct user_i387_ia32_struct),
				      NULL, fp) != 0;
	}
	set_used_math();

	return err;
}

/*
 * FPU state for core dumps.
 * This is only used for a.out dumps now.
 * It is declared generically using elf_fpregset_t (which is
 * struct user_i387_struct) but is in fact only used for 32-bit
 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 */
int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
{
	struct task_struct *tsk = current;
	int fpvalid;

	fpvalid = !!used_math();
	if (fpvalid)
		fpvalid = !fpregs_get(tsk, NULL,
				      0, sizeof(struct user_i387_ia32_struct),
				      fpu, NULL);

	return fpvalid;
}
EXPORT_SYMBOL(dump_fpu);

#endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1994 Linus Torvalds
	3	*
	4	* Pentium III FXSR, SSE support
	5	* General FPU state handling cleanups
	6	* Gareth Hughes <gareth@valinux.com>, May 2000
	7	*/
129f6946	8	#include <linux/module.h>
44210111	9	#include <linux/regset.h>
f668964e IM	10	#include <linux/sched.h>
	11
	12	#include <asm/sigcontext.h>
1da177e4	13	#include <asm/processor.h>
1da177e4	14	#include <asm/math_emu.h>
1da177e4	15	#include <asm/uaccess.h>
f668964e IM	16	#include <asm/ptrace.h>
	17	#include <asm/i387.h>
	18	#include <asm/user.h>
1da177e4	19
44210111	20	#ifdef CONFIG_X86_64
f668964e IM	21	# include <asm/sigcontext32.h>
f668964e IM	22	# include <asm/user32.h>
44210111	23	#else
ab513701 SS	24	# define save_i387_xstate_ia32 save_i387_xstate
ab513701 SS	25	# define restore_i387_xstate_ia32 restore_i387_xstate
f668964e	26	# define _fpstate_ia32 _fpstate
ab513701	27	# define _xstate_ia32 _xstate
3c1c7f10	28	# define sig_xstate_ia32_size sig_xstate_size
c37b5efe	29	# define fx_sw_reserved_ia32 fx_sw_reserved
f668964e IM	30	# define user_i387_ia32_struct user_i387_struct
f668964e IM	31	# define user32_fxsr_struct user_fxsr_struct
44210111 RM	32	#endif
44210111 RM	33
1da177e4	34	#ifdef CONFIG_MATH_EMULATION
f668964e	35	# define HAVE_HWFP (boot_cpu_data.hard_math)
1da177e4	36	#else
f668964e	37	# define HAVE_HWFP 1
1da177e4 LT	38	#endif
1da177e4 LT	39
f668964e	40	static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
61c4628b	41	unsigned int xstate_size;
3c1c7f10	42	unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
61c4628b	43	static struct i387_fxsave_struct fx_scratch __cpuinitdata;
1da177e4	44
61c4628b	45	void __cpuinit mxcsr_feature_mask_init(void)
1da177e4 LT	46	{
1da177e4 LT	47	unsigned long mask = 0;
f668964e	48
1da177e4 LT	49	clts();
1da177e4 LT	50	if (cpu_has_fxsr) {
61c4628b SS	51	memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
	52	asm volatile("fxsave %0" : : "m" (fx_scratch));
	53	mask = fx_scratch.mxcsr_mask;
3b095a04 CG	54	if (mask == 0)
	55	mask = 0x0000ffbf;
	56	}
1da177e4 LT	57	mxcsr_feature_mask &= mask;
	58	stts();
	59	}
	60
9bc646f1	61	void __cpuinit init_thread_xstate(void)
61c4628b	62	{
e8a496ac SS	63	if (!HAVE_HWFP) {
	64	xstate_size = sizeof(struct i387_soft_struct);
	65	return;
	66	}
	67
dc1e35c6 SS	68	if (cpu_has_xsave) {
	69	xsave_cntxt_init();
	70	return;
	71	}
	72
61c4628b SS	73	if (cpu_has_fxsr)
	74	xstate_size = sizeof(struct i387_fxsave_struct);
	75	#ifdef CONFIG_X86_32
	76	else
	77	xstate_size = sizeof(struct i387_fsave_struct);
	78	#endif
61c4628b SS	79	}
61c4628b SS	80
44210111 RM	81	#ifdef CONFIG_X86_64
	82	/*
	83	* Called at bootup to set up the initial FPU state that is later cloned
	84	* into all processes.
	85	*/
	86	void __cpuinit fpu_init(void)
	87	{
	88	unsigned long oldcr0 = read_cr0();
f668964e	89
44210111 RM	90	set_in_cr4(X86_CR4_OSFXSR);
	91	set_in_cr4(X86_CR4_OSXMMEXCPT);
	92
f668964e	93	write_cr0(oldcr0 & ~(X86_CR0_TS\|X86_CR0_EM)); /* clear TS and EM */
44210111	94
dc1e35c6 SS	95	/*
	96	* Boot processor to setup the FP and extended state context info.
	97	*/
	98	if (!smp_processor_id())
	99	init_thread_xstate();
	100	xsave_init();
	101
44210111 RM	102	mxcsr_feature_mask_init();
44210111 RM	103	/* clean state in init */
b359e8a4 SS	104	if (cpu_has_xsave)
	105	current_thread_info()->status = TS_XSAVE;
	106	else
	107	current_thread_info()->status = 0;
44210111 RM	108	clear_used_math();
	109	}
	110	#endif /* CONFIG_X86_64 */
	111
1da177e4 LT	112	/*
	113	* The _current_ task is using the FPU for the first time
	114	* so initialize it and set the mxcsr to its default
	115	* value at reset if we support XMM instructions and then
	116	* remeber the current task has used the FPU.
	117	*/
aa283f49	118	int init_fpu(struct task_struct *tsk)
1da177e4	119	{
44210111	120	if (tsk_used_math(tsk)) {
e8a496ac	121	if (HAVE_HWFP && tsk == current)
44210111	122	unlazy_fpu(tsk);
aa283f49 SS	123	return 0;
	124	}
	125
	126	/*
	127	* Memory allocation at the first usage of the FPU and other state.
	128	*/
	129	if (!tsk->thread.xstate) {
	130	tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
	131	GFP_KERNEL);
	132	if (!tsk->thread.xstate)
	133	return -ENOMEM;
44210111 RM	134	}
44210111 RM	135
e8a496ac SS	136	#ifdef CONFIG_X86_32
	137	if (!HAVE_HWFP) {
	138	memset(tsk->thread.xstate, 0, xstate_size);
ab9e1858	139	finit_task(tsk);
e8a496ac SS	140	set_stopped_child_used_math(tsk);
	141	return 0;
	142	}
	143	#endif
	144
1da177e4	145	if (cpu_has_fxsr) {
61c4628b SS	146	struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
	147
	148	memset(fx, 0, xstate_size);
	149	fx->cwd = 0x37f;
1da177e4	150	if (cpu_has_xmm)
61c4628b	151	fx->mxcsr = MXCSR_DEFAULT;
1da177e4	152	} else {
61c4628b SS	153	struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
	154	memset(fp, 0, xstate_size);
	155	fp->cwd = 0xffff037fu;
	156	fp->swd = 0xffff0000u;
	157	fp->twd = 0xffffffffu;
	158	fp->fos = 0xffff0000u;
1da177e4	159	}
44210111 RM	160	/*
	161	* Only the device not available exception or ptrace can call init_fpu.
	162	*/
1da177e4	163	set_stopped_child_used_math(tsk);
aa283f49	164	return 0;
1da177e4 LT	165	}
1da177e4 LT	166
44210111 RM	167	int fpregs_active(struct task_struct target, const struct user_regset regset)
	168	{
	169	return tsk_used_math(target) ? regset->n : 0;
	170	}
1da177e4	171
44210111	172	int xfpregs_active(struct task_struct target, const struct user_regset regset)
1da177e4	173	{
44210111 RM	174	return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
44210111 RM	175	}
1da177e4	176
44210111 RM	177	int xfpregs_get(struct task_struct target, const struct user_regset regset,
	178	unsigned int pos, unsigned int count,
	179	void kbuf, void __user ubuf)
	180	{
aa283f49 SS	181	int ret;
aa283f49 SS	182
44210111 RM	183	if (!cpu_has_fxsr)
	184	return -ENODEV;
	185
aa283f49 SS	186	ret = init_fpu(target);
	187	if (ret)
	188	return ret;
44210111 RM	189
44210111 RM	190	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
61c4628b	191	&target->thread.xstate->fxsave, 0, -1);
1da177e4	192	}
44210111 RM	193
	194	int xfpregs_set(struct task_struct target, const struct user_regset regset,
	195	unsigned int pos, unsigned int count,
	196	const void kbuf, const void __user ubuf)
	197	{
	198	int ret;
	199
	200	if (!cpu_has_fxsr)
	201	return -ENODEV;
	202
aa283f49 SS	203	ret = init_fpu(target);
	204	if (ret)
	205	return ret;
	206
44210111 RM	207	set_stopped_child_used_math(target);
	208
	209	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
61c4628b	210	&target->thread.xstate->fxsave, 0, -1);
44210111 RM	211
	212	/*
	213	* mxcsr reserved bits must be masked to zero for security reasons.
	214	*/
61c4628b	215	target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
44210111	216
42deec6f SS	217	/*
	218	* update the header bits in the xsave header, indicating the
	219	* presence of FP and SSE state.
	220	*/
	221	if (cpu_has_xsave)
	222	target->thread.xstate->xsave.xsave_hdr.xstate_bv \|= XSTATE_FPSSE;
	223
44210111 RM	224	return ret;
	225	}
	226
	227	#if defined CONFIG_X86_32 \|\| defined CONFIG_IA32_EMULATION
1da177e4	228
1da177e4 LT	229	/*
	230	* FPU tag word conversions.
	231	*/
	232
3b095a04	233	static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
1da177e4 LT	234	{
1da177e4 LT	235	unsigned int tmp; /* to avoid 16 bit prefixes in the code */
3b095a04	236
1da177e4	237	/* Transform each pair of bits into 01 (valid) or 00 (empty) */
3b095a04	238	tmp = ~twd;
44210111	239	tmp = (tmp \| (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
3b095a04 CG	240	/* and move the valid bits to the lower byte. */
	241	tmp = (tmp \| (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
	242	tmp = (tmp \| (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
	243	tmp = (tmp \| (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
f668964e	244
3b095a04	245	return tmp;
1da177e4 LT	246	}
1da177e4 LT	247
1da177e4	248	#define FPREG_ADDR(f, n) ((void )&(f)->st_space + (n) 16);
44210111 RM	249	#define FP_EXP_TAG_VALID 0
	250	#define FP_EXP_TAG_ZERO 1
	251	#define FP_EXP_TAG_SPECIAL 2
	252	#define FP_EXP_TAG_EMPTY 3
	253
	254	static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
	255	{
	256	struct _fpxreg *st;
	257	u32 tos = (fxsave->swd >> 11) & 7;
	258	u32 twd = (unsigned long) fxsave->twd;
	259	u32 tag;
	260	u32 ret = 0xffff0000u;
	261	int i;
1da177e4	262
44210111	263	for (i = 0; i < 8; i++, twd >>= 1) {
3b095a04 CG	264	if (twd & 0x1) {
3b095a04 CG	265	st = FPREG_ADDR(fxsave, (i - tos) & 7);
1da177e4	266
3b095a04	267	switch (st->exponent & 0x7fff) {
1da177e4	268	case 0x7fff:
44210111	269	tag = FP_EXP_TAG_SPECIAL;
1da177e4 LT	270	break;
1da177e4 LT	271	case 0x0000:
3b095a04 CG	272	if (!st->significand[0] &&
	273	!st->significand[1] &&
	274	!st->significand[2] &&
44210111 RM	275	!st->significand[3])
	276	tag = FP_EXP_TAG_ZERO;
	277	else
	278	tag = FP_EXP_TAG_SPECIAL;
1da177e4 LT	279	break;
1da177e4 LT	280	default:
44210111 RM	281	if (st->significand[3] & 0x8000)
	282	tag = FP_EXP_TAG_VALID;
	283	else
	284	tag = FP_EXP_TAG_SPECIAL;
1da177e4 LT	285	break;
	286	}
	287	} else {
44210111	288	tag = FP_EXP_TAG_EMPTY;
1da177e4	289	}
44210111	290	ret \|= tag << (2 * i);
1da177e4 LT	291	}
	292	return ret;
	293	}
	294
	295	/*
44210111	296	* FXSR floating point environment conversions.
1da177e4 LT	297	*/
1da177e4 LT	298
f668964e IM	299	static void
f668964e IM	300	convert_from_fxsr(struct user_i387_ia32_struct env, struct task_struct tsk)
1da177e4	301	{
61c4628b	302	struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
44210111 RM	303	struct _fpreg to = (struct _fpreg ) &env->st_space[0];
	304	struct _fpxreg from = (struct _fpxreg ) &fxsave->st_space[0];
	305	int i;
1da177e4	306
44210111 RM	307	env->cwd = fxsave->cwd \| 0xffff0000u;
	308	env->swd = fxsave->swd \| 0xffff0000u;
	309	env->twd = twd_fxsr_to_i387(fxsave);
	310
	311	#ifdef CONFIG_X86_64
	312	env->fip = fxsave->rip;
	313	env->foo = fxsave->rdp;
	314	if (tsk == current) {
	315	/*
	316	* should be actually ds/cs at fpu exception time, but
	317	* that information is not available in 64bit mode.
	318	*/
f668964e IM	319	asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
f668964e IM	320	asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
1da177e4	321	} else {
44210111	322	struct pt_regs *regs = task_pt_regs(tsk);
f668964e	323
44210111 RM	324	env->fos = 0xffff0000 \| tsk->thread.ds;
44210111 RM	325	env->fcs = regs->cs;
1da177e4	326	}
44210111 RM	327	#else
44210111 RM	328	env->fip = fxsave->fip;
609b5297	329	env->fcs = (u16) fxsave->fcs \| ((u32) fxsave->fop << 16);
44210111 RM	330	env->foo = fxsave->foo;
	331	env->fos = fxsave->fos;
	332	#endif
1da177e4	333
44210111 RM	334	for (i = 0; i < 8; ++i)
44210111 RM	335	memcpy(&to[i], &from[i], sizeof(to[0]));
1da177e4 LT	336	}
1da177e4 LT	337
44210111 RM	338	static void convert_to_fxsr(struct task_struct *tsk,
44210111 RM	339	const struct user_i387_ia32_struct *env)
1da177e4	340
1da177e4	341	{
61c4628b	342	struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
44210111 RM	343	struct _fpreg from = (struct _fpreg ) &env->st_space[0];
	344	struct _fpxreg to = (struct _fpxreg ) &fxsave->st_space[0];
	345	int i;
1da177e4	346
44210111 RM	347	fxsave->cwd = env->cwd;
	348	fxsave->swd = env->swd;
	349	fxsave->twd = twd_i387_to_fxsr(env->twd);
	350	fxsave->fop = (u16) ((u32) env->fcs >> 16);
	351	#ifdef CONFIG_X86_64
	352	fxsave->rip = env->fip;
	353	fxsave->rdp = env->foo;
	354	/* cs and ds ignored */
	355	#else
	356	fxsave->fip = env->fip;
	357	fxsave->fcs = (env->fcs & 0xffff);
	358	fxsave->foo = env->foo;
	359	fxsave->fos = env->fos;
	360	#endif
1da177e4	361
44210111 RM	362	for (i = 0; i < 8; ++i)
44210111 RM	363	memcpy(&to[i], &from[i], sizeof(from[0]));
1da177e4 LT	364	}
1da177e4 LT	365
44210111 RM	366	int fpregs_get(struct task_struct target, const struct user_regset regset,
	367	unsigned int pos, unsigned int count,
	368	void kbuf, void __user ubuf)
1da177e4	369	{
44210111	370	struct user_i387_ia32_struct env;
aa283f49	371	int ret;
1da177e4	372
aa283f49 SS	373	ret = init_fpu(target);
	374	if (ret)
	375	return ret;
1da177e4	376
e8a496ac SS	377	if (!HAVE_HWFP)
	378	return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
	379
f668964e	380	if (!cpu_has_fxsr) {
44210111	381	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
61c4628b SS	382	&target->thread.xstate->fsave, 0,
61c4628b SS	383	-1);
f668964e	384	}
1da177e4	385
44210111 RM	386	if (kbuf && pos == 0 && count == sizeof(env)) {
	387	convert_from_fxsr(kbuf, target);
	388	return 0;
1da177e4	389	}
44210111 RM	390
44210111 RM	391	convert_from_fxsr(&env, target);
f668964e	392
44210111	393	return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
1da177e4 LT	394	}
1da177e4 LT	395
44210111 RM	396	int fpregs_set(struct task_struct target, const struct user_regset regset,
	397	unsigned int pos, unsigned int count,
	398	const void kbuf, const void __user ubuf)
1da177e4	399	{
44210111 RM	400	struct user_i387_ia32_struct env;
44210111 RM	401	int ret;
1da177e4	402
aa283f49 SS	403	ret = init_fpu(target);
	404	if (ret)
	405	return ret;
	406
44210111 RM	407	set_stopped_child_used_math(target);
44210111 RM	408
e8a496ac SS	409	if (!HAVE_HWFP)
	410	return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
	411
f668964e	412	if (!cpu_has_fxsr) {
44210111	413	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
61c4628b	414	&target->thread.xstate->fsave, 0, -1);
f668964e	415	}
44210111 RM	416
	417	if (pos > 0 \|\| count < sizeof(env))
	418	convert_from_fxsr(&env, target);
	419
	420	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
	421	if (!ret)
	422	convert_to_fxsr(target, &env);
	423
42deec6f SS	424	/*
	425	* update the header bit in the xsave header, indicating the
	426	* presence of FP.
	427	*/
	428	if (cpu_has_xsave)
	429	target->thread.xstate->xsave.xsave_hdr.xstate_bv \|= XSTATE_FP;
44210111	430	return ret;
1da177e4 LT	431	}
	432
	433	/*
	434	* Signal frame handlers.
	435	*/
	436
44210111	437	static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4 LT	438	{
1da177e4 LT	439	struct task_struct *tsk = current;
61c4628b	440	struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
1da177e4	441
61c4628b SS	442	fp->status = fp->swd;
61c4628b SS	443	if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
1da177e4 LT	444	return -1;
	445	return 1;
	446	}
	447
44210111	448	static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
1da177e4 LT	449	{
1da177e4 LT	450	struct task_struct *tsk = current;
61c4628b	451	struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
44210111	452	struct user_i387_ia32_struct env;
1da177e4 LT	453	int err = 0;
1da177e4 LT	454
44210111 RM	455	convert_from_fxsr(&env, tsk);
44210111 RM	456	if (__copy_to_user(buf, &env, sizeof(env)))
1da177e4 LT	457	return -1;
1da177e4 LT	458
61c4628b	459	err \|= __put_user(fx->swd, &buf->status);
3b095a04 CG	460	err \|= __put_user(X86_FXSR_MAGIC, &buf->magic);
3b095a04 CG	461	if (err)
1da177e4 LT	462	return -1;
1da177e4 LT	463
c37b5efe	464	if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
1da177e4 LT	465	return -1;
	466	return 1;
	467	}
	468
c37b5efe SS	469	static int save_i387_xsave(void __user *buf)
c37b5efe SS	470	{
04944b79	471	struct task_struct *tsk = current;
c37b5efe SS	472	struct _fpstate_ia32 __user *fx = buf;
	473	int err = 0;
	474
04944b79 SS	475	/*
	476	* For legacy compatible, we always set FP/SSE bits in the bit
	477	* vector while saving the state to the user context.
	478	* This will enable us capturing any changes(during sigreturn) to
	479	* the FP/SSE bits by the legacy applications which don't touch
	480	* xstate_bv in the xsave header.
	481	*
	482	* xsave aware applications can change the xstate_bv in the xsave
	483	* header as well as change any contents in the memory layout.
	484	* xrestore as part of sigreturn will capture all the changes.
	485	*/
	486	tsk->thread.xstate->xsave.xsave_hdr.xstate_bv \|= XSTATE_FPSSE;
	487
c37b5efe SS	488	if (save_i387_fxsave(fx) < 0)
	489	return -1;
	490
	491	err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
	492	sizeof(struct _fpx_sw_bytes));
	493	err \|= __put_user(FP_XSTATE_MAGIC2,
	494	(__u32 __user *) (buf + sig_xstate_ia32_size
	495	- FP_XSTATE_MAGIC2_SIZE));
	496	if (err)
	497	return -1;
	498
	499	return 1;
	500	}
	501
ab513701	502	int save_i387_xstate_ia32(void __user *buf)
1da177e4	503	{
ab513701 SS	504	struct _fpstate_ia32 __user fp = (struct _fpstate_ia32 __user ) buf;
	505	struct task_struct *tsk = current;
	506
3b095a04	507	if (!used_math())
1da177e4	508	return 0;
ab513701 SS	509
	510	if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
	511	return -EACCES;
f668964e IM	512	/*
f668964e IM	513	* This will cause a "finit" to be triggered by the next
1da177e4 LT	514	* attempted FPU operation by the 'current' process.
	515	*/
	516	clear_used_math();
	517
f668964e	518	if (!HAVE_HWFP) {
44210111 RM	519	return fpregs_soft_get(current, NULL,
44210111 RM	520	0, sizeof(struct user_i387_ia32_struct),
ab513701	521	NULL, fp) ? -1 : 1;
1da177e4	522	}
f668964e	523
ab513701 SS	524	unlazy_fpu(tsk);
ab513701 SS	525
c37b5efe SS	526	if (cpu_has_xsave)
c37b5efe SS	527	return save_i387_xsave(fp);
f668964e	528	if (cpu_has_fxsr)
ab513701	529	return save_i387_fxsave(fp);
f668964e	530	else
ab513701	531	return save_i387_fsave(fp);
1da177e4 LT	532	}
1da177e4 LT	533
44210111	534	static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4 LT	535	{
1da177e4 LT	536	struct task_struct *tsk = current;
f668964e	537
61c4628b	538	return __copy_from_user(&tsk->thread.xstate->fsave, buf,
3b095a04	539	sizeof(struct i387_fsave_struct));
1da177e4 LT	540	}
1da177e4 LT	541
c37b5efe SS	542	static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
c37b5efe SS	543	unsigned int size)
1da177e4	544	{
1da177e4	545	struct task_struct *tsk = current;
44210111	546	struct user_i387_ia32_struct env;
f668964e IM	547	int err;
f668964e IM	548
61c4628b	549	err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
c37b5efe	550	size);
1da177e4	551	/* mxcsr reserved bits must be masked to zero for security reasons */
61c4628b	552	tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
44210111 RM	553	if (err \|\| __copy_from_user(&env, buf, sizeof(env)))
	554	return 1;
	555	convert_to_fxsr(tsk, &env);
f668964e	556
44210111	557	return 0;
1da177e4 LT	558	}
1da177e4 LT	559
c37b5efe SS	560	static int restore_i387_xsave(void __user *buf)
	561	{
	562	struct _fpx_sw_bytes fx_sw_user;
	563	struct _fpstate_ia32 __user *fx_user =
	564	((struct _fpstate_ia32 __user *) buf);
	565	struct i387_fxsave_struct __user *fx =
	566	(struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
	567	struct xsave_hdr_struct *xsave_hdr =
	568	&current->thread.xstate->xsave.xsave_hdr;
6152e4b1	569	u64 mask;
c37b5efe SS	570	int err;
	571
	572	if (check_for_xstate(fx, buf, &fx_sw_user))
	573	goto fx_only;
	574
6152e4b1	575	mask = fx_sw_user.xstate_bv;
c37b5efe SS	576
	577	err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
	578
6152e4b1	579	xsave_hdr->xstate_bv &= pcntxt_mask;
c37b5efe SS	580	/*
	581	* These bits must be zero.
	582	*/
	583	xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
	584
	585	/*
	586	* Init the state that is not present in the memory layout
	587	* and enabled by the OS.
	588	*/
6152e4b1 PA	589	mask = ~(pcntxt_mask & ~mask);
6152e4b1 PA	590	xsave_hdr->xstate_bv &= mask;
c37b5efe SS	591
	592	return err;
	593	fx_only:
	594	/*
	595	* Couldn't find the extended state information in the memory
	596	* layout. Restore the FP/SSE and init the other extended state
	597	* enabled by the OS.
	598	*/
	599	xsave_hdr->xstate_bv = XSTATE_FPSSE;
	600	return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
	601	}
	602
ab513701	603	int restore_i387_xstate_ia32(void __user *buf)
1da177e4 LT	604	{
1da177e4 LT	605	int err;
e8a496ac	606	struct task_struct *tsk = current;
ab513701	607	struct _fpstate_ia32 __user fp = (struct _fpstate_ia32 __user ) buf;
1da177e4	608
e8a496ac	609	if (HAVE_HWFP)
fd3c3ed5 SS	610	clear_fpu(tsk);
fd3c3ed5 SS	611
ab513701 SS	612	if (!buf) {
	613	if (used_math()) {
	614	clear_fpu(tsk);
	615	clear_used_math();
	616	}
	617
	618	return 0;
	619	} else
	620	if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
	621	return -EACCES;
	622
e8a496ac SS	623	if (!used_math()) {
	624	err = init_fpu(tsk);
	625	if (err)
	626	return err;
	627	}
fd3c3ed5	628
e8a496ac	629	if (HAVE_HWFP) {
c37b5efe SS	630	if (cpu_has_xsave)
	631	err = restore_i387_xsave(buf);
	632	else if (cpu_has_fxsr)
	633	err = restore_i387_fxsave(fp, sizeof(struct
	634	i387_fxsave_struct));
f668964e	635	else
ab513701	636	err = restore_i387_fsave(fp);
1da177e4	637	} else {
44210111 RM	638	err = fpregs_soft_set(current, NULL,
44210111 RM	639	0, sizeof(struct user_i387_ia32_struct),
ab513701	640	NULL, fp) != 0;
1da177e4 LT	641	}
1da177e4 LT	642	set_used_math();
f668964e	643
1da177e4 LT	644	return err;
	645	}
	646
1da177e4 LT	647	/*
1da177e4 LT	648	* FPU state for core dumps.
60b3b9af RM	649	* This is only used for a.out dumps now.
	650	* It is declared generically using elf_fpregset_t (which is
	651	* struct user_i387_struct) but is in fact only used for 32-bit
	652	* dumps, so on 64-bit it is really struct user_i387_ia32_struct.
1da177e4	653	*/
3b095a04	654	int dump_fpu(struct pt_regs regs, struct user_i387_struct fpu)
1da177e4	655	{
1da177e4	656	struct task_struct *tsk = current;
f668964e	657	int fpvalid;
1da177e4 LT	658
1da177e4 LT	659	fpvalid = !!used_math();
60b3b9af RM	660	if (fpvalid)
	661	fpvalid = !fpregs_get(tsk, NULL,
	662	0, sizeof(struct user_i387_ia32_struct),
	663	fpu, NULL);
1da177e4 LT	664
	665	return fpvalid;
	666	}
129f6946	667	EXPORT_SYMBOL(dump_fpu);
1da177e4	668
60b3b9af	669	#endif /* CONFIG_X86_32 \|\| CONFIG_IA32_EMULATION */