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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1994 Linus Torvalds |
3 | * | |
4 | * Pentium III FXSR, SSE support | |
5 | * General FPU state handling cleanups | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
129f6946 | 8 | #include <linux/module.h> |
44210111 | 9 | #include <linux/regset.h> |
f668964e IM |
10 | #include <linux/sched.h> |
11 | ||
12 | #include <asm/sigcontext.h> | |
1da177e4 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/math_emu.h> |
1da177e4 | 15 | #include <asm/uaccess.h> |
f668964e IM |
16 | #include <asm/ptrace.h> |
17 | #include <asm/i387.h> | |
18 | #include <asm/user.h> | |
1da177e4 | 19 | |
44210111 | 20 | #ifdef CONFIG_X86_64 |
f668964e IM |
21 | # include <asm/sigcontext32.h> |
22 | # include <asm/user32.h> | |
44210111 | 23 | #else |
ab513701 SS |
24 | # define save_i387_xstate_ia32 save_i387_xstate |
25 | # define restore_i387_xstate_ia32 restore_i387_xstate | |
f668964e | 26 | # define _fpstate_ia32 _fpstate |
ab513701 | 27 | # define _xstate_ia32 _xstate |
3c1c7f10 | 28 | # define sig_xstate_ia32_size sig_xstate_size |
c37b5efe | 29 | # define fx_sw_reserved_ia32 fx_sw_reserved |
f668964e IM |
30 | # define user_i387_ia32_struct user_i387_struct |
31 | # define user32_fxsr_struct user_fxsr_struct | |
44210111 RM |
32 | #endif |
33 | ||
1da177e4 | 34 | #ifdef CONFIG_MATH_EMULATION |
f668964e | 35 | # define HAVE_HWFP (boot_cpu_data.hard_math) |
1da177e4 | 36 | #else |
f668964e | 37 | # define HAVE_HWFP 1 |
1da177e4 LT |
38 | #endif |
39 | ||
f668964e | 40 | static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu; |
61c4628b | 41 | unsigned int xstate_size; |
3c1c7f10 | 42 | unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32); |
61c4628b | 43 | static struct i387_fxsave_struct fx_scratch __cpuinitdata; |
1da177e4 | 44 | |
61c4628b | 45 | void __cpuinit mxcsr_feature_mask_init(void) |
1da177e4 LT |
46 | { |
47 | unsigned long mask = 0; | |
f668964e | 48 | |
1da177e4 LT |
49 | clts(); |
50 | if (cpu_has_fxsr) { | |
61c4628b SS |
51 | memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct)); |
52 | asm volatile("fxsave %0" : : "m" (fx_scratch)); | |
53 | mask = fx_scratch.mxcsr_mask; | |
3b095a04 CG |
54 | if (mask == 0) |
55 | mask = 0x0000ffbf; | |
56 | } | |
1da177e4 LT |
57 | mxcsr_feature_mask &= mask; |
58 | stts(); | |
59 | } | |
60 | ||
61c4628b SS |
61 | void __init init_thread_xstate(void) |
62 | { | |
e8a496ac SS |
63 | if (!HAVE_HWFP) { |
64 | xstate_size = sizeof(struct i387_soft_struct); | |
65 | return; | |
66 | } | |
67 | ||
dc1e35c6 SS |
68 | if (cpu_has_xsave) { |
69 | xsave_cntxt_init(); | |
70 | return; | |
71 | } | |
72 | ||
61c4628b SS |
73 | if (cpu_has_fxsr) |
74 | xstate_size = sizeof(struct i387_fxsave_struct); | |
75 | #ifdef CONFIG_X86_32 | |
76 | else | |
77 | xstate_size = sizeof(struct i387_fsave_struct); | |
78 | #endif | |
61c4628b SS |
79 | } |
80 | ||
44210111 RM |
81 | #ifdef CONFIG_X86_64 |
82 | /* | |
83 | * Called at bootup to set up the initial FPU state that is later cloned | |
84 | * into all processes. | |
85 | */ | |
86 | void __cpuinit fpu_init(void) | |
87 | { | |
88 | unsigned long oldcr0 = read_cr0(); | |
f668964e | 89 | |
44210111 RM |
90 | set_in_cr4(X86_CR4_OSFXSR); |
91 | set_in_cr4(X86_CR4_OSXMMEXCPT); | |
92 | ||
f668964e | 93 | write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */ |
44210111 | 94 | |
dc1e35c6 SS |
95 | /* |
96 | * Boot processor to setup the FP and extended state context info. | |
97 | */ | |
98 | if (!smp_processor_id()) | |
99 | init_thread_xstate(); | |
100 | xsave_init(); | |
101 | ||
44210111 RM |
102 | mxcsr_feature_mask_init(); |
103 | /* clean state in init */ | |
b359e8a4 SS |
104 | if (cpu_has_xsave) |
105 | current_thread_info()->status = TS_XSAVE; | |
106 | else | |
107 | current_thread_info()->status = 0; | |
44210111 RM |
108 | clear_used_math(); |
109 | } | |
110 | #endif /* CONFIG_X86_64 */ | |
111 | ||
1da177e4 LT |
112 | /* |
113 | * The _current_ task is using the FPU for the first time | |
114 | * so initialize it and set the mxcsr to its default | |
115 | * value at reset if we support XMM instructions and then | |
116 | * remeber the current task has used the FPU. | |
117 | */ | |
aa283f49 | 118 | int init_fpu(struct task_struct *tsk) |
1da177e4 | 119 | { |
44210111 | 120 | if (tsk_used_math(tsk)) { |
e8a496ac | 121 | if (HAVE_HWFP && tsk == current) |
44210111 | 122 | unlazy_fpu(tsk); |
aa283f49 SS |
123 | return 0; |
124 | } | |
125 | ||
126 | /* | |
127 | * Memory allocation at the first usage of the FPU and other state. | |
128 | */ | |
129 | if (!tsk->thread.xstate) { | |
130 | tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | |
131 | GFP_KERNEL); | |
132 | if (!tsk->thread.xstate) | |
133 | return -ENOMEM; | |
44210111 RM |
134 | } |
135 | ||
e8a496ac SS |
136 | #ifdef CONFIG_X86_32 |
137 | if (!HAVE_HWFP) { | |
138 | memset(tsk->thread.xstate, 0, xstate_size); | |
139 | finit(); | |
140 | set_stopped_child_used_math(tsk); | |
141 | return 0; | |
142 | } | |
143 | #endif | |
144 | ||
1da177e4 | 145 | if (cpu_has_fxsr) { |
61c4628b SS |
146 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; |
147 | ||
148 | memset(fx, 0, xstate_size); | |
149 | fx->cwd = 0x37f; | |
1da177e4 | 150 | if (cpu_has_xmm) |
61c4628b | 151 | fx->mxcsr = MXCSR_DEFAULT; |
1da177e4 | 152 | } else { |
61c4628b SS |
153 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; |
154 | memset(fp, 0, xstate_size); | |
155 | fp->cwd = 0xffff037fu; | |
156 | fp->swd = 0xffff0000u; | |
157 | fp->twd = 0xffffffffu; | |
158 | fp->fos = 0xffff0000u; | |
1da177e4 | 159 | } |
44210111 RM |
160 | /* |
161 | * Only the device not available exception or ptrace can call init_fpu. | |
162 | */ | |
1da177e4 | 163 | set_stopped_child_used_math(tsk); |
aa283f49 | 164 | return 0; |
1da177e4 LT |
165 | } |
166 | ||
44210111 RM |
167 | int fpregs_active(struct task_struct *target, const struct user_regset *regset) |
168 | { | |
169 | return tsk_used_math(target) ? regset->n : 0; | |
170 | } | |
1da177e4 | 171 | |
44210111 | 172 | int xfpregs_active(struct task_struct *target, const struct user_regset *regset) |
1da177e4 | 173 | { |
44210111 RM |
174 | return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0; |
175 | } | |
1da177e4 | 176 | |
44210111 RM |
177 | int xfpregs_get(struct task_struct *target, const struct user_regset *regset, |
178 | unsigned int pos, unsigned int count, | |
179 | void *kbuf, void __user *ubuf) | |
180 | { | |
aa283f49 SS |
181 | int ret; |
182 | ||
44210111 RM |
183 | if (!cpu_has_fxsr) |
184 | return -ENODEV; | |
185 | ||
aa283f49 SS |
186 | ret = init_fpu(target); |
187 | if (ret) | |
188 | return ret; | |
44210111 RM |
189 | |
190 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
61c4628b | 191 | &target->thread.xstate->fxsave, 0, -1); |
1da177e4 | 192 | } |
44210111 RM |
193 | |
194 | int xfpregs_set(struct task_struct *target, const struct user_regset *regset, | |
195 | unsigned int pos, unsigned int count, | |
196 | const void *kbuf, const void __user *ubuf) | |
197 | { | |
198 | int ret; | |
199 | ||
200 | if (!cpu_has_fxsr) | |
201 | return -ENODEV; | |
202 | ||
aa283f49 SS |
203 | ret = init_fpu(target); |
204 | if (ret) | |
205 | return ret; | |
206 | ||
44210111 RM |
207 | set_stopped_child_used_math(target); |
208 | ||
209 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
61c4628b | 210 | &target->thread.xstate->fxsave, 0, -1); |
44210111 RM |
211 | |
212 | /* | |
213 | * mxcsr reserved bits must be masked to zero for security reasons. | |
214 | */ | |
61c4628b | 215 | target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; |
44210111 | 216 | |
42deec6f SS |
217 | /* |
218 | * update the header bits in the xsave header, indicating the | |
219 | * presence of FP and SSE state. | |
220 | */ | |
221 | if (cpu_has_xsave) | |
222 | target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; | |
223 | ||
44210111 RM |
224 | return ret; |
225 | } | |
226 | ||
227 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | |
1da177e4 | 228 | |
1da177e4 LT |
229 | /* |
230 | * FPU tag word conversions. | |
231 | */ | |
232 | ||
3b095a04 | 233 | static inline unsigned short twd_i387_to_fxsr(unsigned short twd) |
1da177e4 LT |
234 | { |
235 | unsigned int tmp; /* to avoid 16 bit prefixes in the code */ | |
3b095a04 | 236 | |
1da177e4 | 237 | /* Transform each pair of bits into 01 (valid) or 00 (empty) */ |
3b095a04 | 238 | tmp = ~twd; |
44210111 | 239 | tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */ |
3b095a04 CG |
240 | /* and move the valid bits to the lower byte. */ |
241 | tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */ | |
242 | tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */ | |
243 | tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */ | |
f668964e | 244 | |
3b095a04 | 245 | return tmp; |
1da177e4 LT |
246 | } |
247 | ||
1da177e4 | 248 | #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16); |
44210111 RM |
249 | #define FP_EXP_TAG_VALID 0 |
250 | #define FP_EXP_TAG_ZERO 1 | |
251 | #define FP_EXP_TAG_SPECIAL 2 | |
252 | #define FP_EXP_TAG_EMPTY 3 | |
253 | ||
254 | static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave) | |
255 | { | |
256 | struct _fpxreg *st; | |
257 | u32 tos = (fxsave->swd >> 11) & 7; | |
258 | u32 twd = (unsigned long) fxsave->twd; | |
259 | u32 tag; | |
260 | u32 ret = 0xffff0000u; | |
261 | int i; | |
1da177e4 | 262 | |
44210111 | 263 | for (i = 0; i < 8; i++, twd >>= 1) { |
3b095a04 CG |
264 | if (twd & 0x1) { |
265 | st = FPREG_ADDR(fxsave, (i - tos) & 7); | |
1da177e4 | 266 | |
3b095a04 | 267 | switch (st->exponent & 0x7fff) { |
1da177e4 | 268 | case 0x7fff: |
44210111 | 269 | tag = FP_EXP_TAG_SPECIAL; |
1da177e4 LT |
270 | break; |
271 | case 0x0000: | |
3b095a04 CG |
272 | if (!st->significand[0] && |
273 | !st->significand[1] && | |
274 | !st->significand[2] && | |
44210111 RM |
275 | !st->significand[3]) |
276 | tag = FP_EXP_TAG_ZERO; | |
277 | else | |
278 | tag = FP_EXP_TAG_SPECIAL; | |
1da177e4 LT |
279 | break; |
280 | default: | |
44210111 RM |
281 | if (st->significand[3] & 0x8000) |
282 | tag = FP_EXP_TAG_VALID; | |
283 | else | |
284 | tag = FP_EXP_TAG_SPECIAL; | |
1da177e4 LT |
285 | break; |
286 | } | |
287 | } else { | |
44210111 | 288 | tag = FP_EXP_TAG_EMPTY; |
1da177e4 | 289 | } |
44210111 | 290 | ret |= tag << (2 * i); |
1da177e4 LT |
291 | } |
292 | return ret; | |
293 | } | |
294 | ||
295 | /* | |
44210111 | 296 | * FXSR floating point environment conversions. |
1da177e4 LT |
297 | */ |
298 | ||
f668964e IM |
299 | static void |
300 | convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) | |
1da177e4 | 301 | { |
61c4628b | 302 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; |
44210111 RM |
303 | struct _fpreg *to = (struct _fpreg *) &env->st_space[0]; |
304 | struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0]; | |
305 | int i; | |
1da177e4 | 306 | |
44210111 RM |
307 | env->cwd = fxsave->cwd | 0xffff0000u; |
308 | env->swd = fxsave->swd | 0xffff0000u; | |
309 | env->twd = twd_fxsr_to_i387(fxsave); | |
310 | ||
311 | #ifdef CONFIG_X86_64 | |
312 | env->fip = fxsave->rip; | |
313 | env->foo = fxsave->rdp; | |
314 | if (tsk == current) { | |
315 | /* | |
316 | * should be actually ds/cs at fpu exception time, but | |
317 | * that information is not available in 64bit mode. | |
318 | */ | |
f668964e IM |
319 | asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos)); |
320 | asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs)); | |
1da177e4 | 321 | } else { |
44210111 | 322 | struct pt_regs *regs = task_pt_regs(tsk); |
f668964e | 323 | |
44210111 RM |
324 | env->fos = 0xffff0000 | tsk->thread.ds; |
325 | env->fcs = regs->cs; | |
1da177e4 | 326 | } |
44210111 RM |
327 | #else |
328 | env->fip = fxsave->fip; | |
609b5297 | 329 | env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16); |
44210111 RM |
330 | env->foo = fxsave->foo; |
331 | env->fos = fxsave->fos; | |
332 | #endif | |
1da177e4 | 333 | |
44210111 RM |
334 | for (i = 0; i < 8; ++i) |
335 | memcpy(&to[i], &from[i], sizeof(to[0])); | |
1da177e4 LT |
336 | } |
337 | ||
44210111 RM |
338 | static void convert_to_fxsr(struct task_struct *tsk, |
339 | const struct user_i387_ia32_struct *env) | |
1da177e4 | 340 | |
1da177e4 | 341 | { |
61c4628b | 342 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; |
44210111 RM |
343 | struct _fpreg *from = (struct _fpreg *) &env->st_space[0]; |
344 | struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0]; | |
345 | int i; | |
1da177e4 | 346 | |
44210111 RM |
347 | fxsave->cwd = env->cwd; |
348 | fxsave->swd = env->swd; | |
349 | fxsave->twd = twd_i387_to_fxsr(env->twd); | |
350 | fxsave->fop = (u16) ((u32) env->fcs >> 16); | |
351 | #ifdef CONFIG_X86_64 | |
352 | fxsave->rip = env->fip; | |
353 | fxsave->rdp = env->foo; | |
354 | /* cs and ds ignored */ | |
355 | #else | |
356 | fxsave->fip = env->fip; | |
357 | fxsave->fcs = (env->fcs & 0xffff); | |
358 | fxsave->foo = env->foo; | |
359 | fxsave->fos = env->fos; | |
360 | #endif | |
1da177e4 | 361 | |
44210111 RM |
362 | for (i = 0; i < 8; ++i) |
363 | memcpy(&to[i], &from[i], sizeof(from[0])); | |
1da177e4 LT |
364 | } |
365 | ||
44210111 RM |
366 | int fpregs_get(struct task_struct *target, const struct user_regset *regset, |
367 | unsigned int pos, unsigned int count, | |
368 | void *kbuf, void __user *ubuf) | |
1da177e4 | 369 | { |
44210111 | 370 | struct user_i387_ia32_struct env; |
aa283f49 | 371 | int ret; |
1da177e4 | 372 | |
aa283f49 SS |
373 | ret = init_fpu(target); |
374 | if (ret) | |
375 | return ret; | |
1da177e4 | 376 | |
e8a496ac SS |
377 | if (!HAVE_HWFP) |
378 | return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf); | |
379 | ||
f668964e | 380 | if (!cpu_has_fxsr) { |
44210111 | 381 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
61c4628b SS |
382 | &target->thread.xstate->fsave, 0, |
383 | -1); | |
f668964e | 384 | } |
1da177e4 | 385 | |
44210111 RM |
386 | if (kbuf && pos == 0 && count == sizeof(env)) { |
387 | convert_from_fxsr(kbuf, target); | |
388 | return 0; | |
1da177e4 | 389 | } |
44210111 RM |
390 | |
391 | convert_from_fxsr(&env, target); | |
f668964e | 392 | |
44210111 | 393 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1); |
1da177e4 LT |
394 | } |
395 | ||
44210111 RM |
396 | int fpregs_set(struct task_struct *target, const struct user_regset *regset, |
397 | unsigned int pos, unsigned int count, | |
398 | const void *kbuf, const void __user *ubuf) | |
1da177e4 | 399 | { |
44210111 RM |
400 | struct user_i387_ia32_struct env; |
401 | int ret; | |
1da177e4 | 402 | |
aa283f49 SS |
403 | ret = init_fpu(target); |
404 | if (ret) | |
405 | return ret; | |
406 | ||
44210111 RM |
407 | set_stopped_child_used_math(target); |
408 | ||
e8a496ac SS |
409 | if (!HAVE_HWFP) |
410 | return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf); | |
411 | ||
f668964e | 412 | if (!cpu_has_fxsr) { |
44210111 | 413 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
61c4628b | 414 | &target->thread.xstate->fsave, 0, -1); |
f668964e | 415 | } |
44210111 RM |
416 | |
417 | if (pos > 0 || count < sizeof(env)) | |
418 | convert_from_fxsr(&env, target); | |
419 | ||
420 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1); | |
421 | if (!ret) | |
422 | convert_to_fxsr(target, &env); | |
423 | ||
42deec6f SS |
424 | /* |
425 | * update the header bit in the xsave header, indicating the | |
426 | * presence of FP. | |
427 | */ | |
428 | if (cpu_has_xsave) | |
429 | target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP; | |
44210111 | 430 | return ret; |
1da177e4 LT |
431 | } |
432 | ||
433 | /* | |
434 | * Signal frame handlers. | |
435 | */ | |
436 | ||
44210111 | 437 | static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
438 | { |
439 | struct task_struct *tsk = current; | |
61c4628b | 440 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; |
1da177e4 | 441 | |
61c4628b SS |
442 | fp->status = fp->swd; |
443 | if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct))) | |
1da177e4 LT |
444 | return -1; |
445 | return 1; | |
446 | } | |
447 | ||
44210111 | 448 | static int save_i387_fxsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
449 | { |
450 | struct task_struct *tsk = current; | |
61c4628b | 451 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; |
44210111 | 452 | struct user_i387_ia32_struct env; |
1da177e4 LT |
453 | int err = 0; |
454 | ||
44210111 RM |
455 | convert_from_fxsr(&env, tsk); |
456 | if (__copy_to_user(buf, &env, sizeof(env))) | |
1da177e4 LT |
457 | return -1; |
458 | ||
61c4628b | 459 | err |= __put_user(fx->swd, &buf->status); |
3b095a04 CG |
460 | err |= __put_user(X86_FXSR_MAGIC, &buf->magic); |
461 | if (err) | |
1da177e4 LT |
462 | return -1; |
463 | ||
c37b5efe | 464 | if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size)) |
1da177e4 LT |
465 | return -1; |
466 | return 1; | |
467 | } | |
468 | ||
c37b5efe SS |
469 | static int save_i387_xsave(void __user *buf) |
470 | { | |
471 | struct _fpstate_ia32 __user *fx = buf; | |
472 | int err = 0; | |
473 | ||
474 | if (save_i387_fxsave(fx) < 0) | |
475 | return -1; | |
476 | ||
477 | err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32, | |
478 | sizeof(struct _fpx_sw_bytes)); | |
479 | err |= __put_user(FP_XSTATE_MAGIC2, | |
480 | (__u32 __user *) (buf + sig_xstate_ia32_size | |
481 | - FP_XSTATE_MAGIC2_SIZE)); | |
482 | if (err) | |
483 | return -1; | |
484 | ||
485 | return 1; | |
486 | } | |
487 | ||
ab513701 | 488 | int save_i387_xstate_ia32(void __user *buf) |
1da177e4 | 489 | { |
ab513701 SS |
490 | struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf; |
491 | struct task_struct *tsk = current; | |
492 | ||
3b095a04 | 493 | if (!used_math()) |
1da177e4 | 494 | return 0; |
ab513701 SS |
495 | |
496 | if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size)) | |
497 | return -EACCES; | |
f668964e IM |
498 | /* |
499 | * This will cause a "finit" to be triggered by the next | |
1da177e4 LT |
500 | * attempted FPU operation by the 'current' process. |
501 | */ | |
502 | clear_used_math(); | |
503 | ||
f668964e | 504 | if (!HAVE_HWFP) { |
44210111 RM |
505 | return fpregs_soft_get(current, NULL, |
506 | 0, sizeof(struct user_i387_ia32_struct), | |
ab513701 | 507 | NULL, fp) ? -1 : 1; |
1da177e4 | 508 | } |
f668964e | 509 | |
ab513701 SS |
510 | unlazy_fpu(tsk); |
511 | ||
c37b5efe SS |
512 | if (cpu_has_xsave) |
513 | return save_i387_xsave(fp); | |
f668964e | 514 | if (cpu_has_fxsr) |
ab513701 | 515 | return save_i387_fxsave(fp); |
f668964e | 516 | else |
ab513701 | 517 | return save_i387_fsave(fp); |
1da177e4 LT |
518 | } |
519 | ||
44210111 | 520 | static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
521 | { |
522 | struct task_struct *tsk = current; | |
f668964e | 523 | |
61c4628b | 524 | return __copy_from_user(&tsk->thread.xstate->fsave, buf, |
3b095a04 | 525 | sizeof(struct i387_fsave_struct)); |
1da177e4 LT |
526 | } |
527 | ||
c37b5efe SS |
528 | static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf, |
529 | unsigned int size) | |
1da177e4 | 530 | { |
1da177e4 | 531 | struct task_struct *tsk = current; |
44210111 | 532 | struct user_i387_ia32_struct env; |
f668964e IM |
533 | int err; |
534 | ||
61c4628b | 535 | err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], |
c37b5efe | 536 | size); |
1da177e4 | 537 | /* mxcsr reserved bits must be masked to zero for security reasons */ |
61c4628b | 538 | tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; |
44210111 RM |
539 | if (err || __copy_from_user(&env, buf, sizeof(env))) |
540 | return 1; | |
541 | convert_to_fxsr(tsk, &env); | |
f668964e | 542 | |
44210111 | 543 | return 0; |
1da177e4 LT |
544 | } |
545 | ||
c37b5efe SS |
546 | static int restore_i387_xsave(void __user *buf) |
547 | { | |
548 | struct _fpx_sw_bytes fx_sw_user; | |
549 | struct _fpstate_ia32 __user *fx_user = | |
550 | ((struct _fpstate_ia32 __user *) buf); | |
551 | struct i387_fxsave_struct __user *fx = | |
552 | (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0]; | |
553 | struct xsave_hdr_struct *xsave_hdr = | |
554 | ¤t->thread.xstate->xsave.xsave_hdr; | |
555 | unsigned int lmask, hmask; | |
556 | int err; | |
557 | ||
558 | if (check_for_xstate(fx, buf, &fx_sw_user)) | |
559 | goto fx_only; | |
560 | ||
561 | lmask = fx_sw_user.xstate_bv; | |
562 | hmask = fx_sw_user.xstate_bv >> 32; | |
563 | ||
564 | err = restore_i387_fxsave(buf, fx_sw_user.xstate_size); | |
565 | ||
566 | xsave_hdr->xstate_bv &= (pcntxt_lmask | (((u64) pcntxt_hmask) << 32)); | |
567 | /* | |
568 | * These bits must be zero. | |
569 | */ | |
570 | xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0; | |
571 | ||
572 | /* | |
573 | * Init the state that is not present in the memory layout | |
574 | * and enabled by the OS. | |
575 | */ | |
576 | lmask = ~(pcntxt_lmask & ~lmask); | |
577 | hmask = ~(pcntxt_hmask & ~hmask); | |
578 | xsave_hdr->xstate_bv &= (lmask | (((u64) hmask) << 32)); | |
579 | ||
580 | return err; | |
581 | fx_only: | |
582 | /* | |
583 | * Couldn't find the extended state information in the memory | |
584 | * layout. Restore the FP/SSE and init the other extended state | |
585 | * enabled by the OS. | |
586 | */ | |
587 | xsave_hdr->xstate_bv = XSTATE_FPSSE; | |
588 | return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct)); | |
589 | } | |
590 | ||
ab513701 | 591 | int restore_i387_xstate_ia32(void __user *buf) |
1da177e4 LT |
592 | { |
593 | int err; | |
e8a496ac | 594 | struct task_struct *tsk = current; |
ab513701 | 595 | struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf; |
1da177e4 | 596 | |
e8a496ac | 597 | if (HAVE_HWFP) |
fd3c3ed5 SS |
598 | clear_fpu(tsk); |
599 | ||
ab513701 SS |
600 | if (!buf) { |
601 | if (used_math()) { | |
602 | clear_fpu(tsk); | |
603 | clear_used_math(); | |
604 | } | |
605 | ||
606 | return 0; | |
607 | } else | |
608 | if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size)) | |
609 | return -EACCES; | |
610 | ||
e8a496ac SS |
611 | if (!used_math()) { |
612 | err = init_fpu(tsk); | |
613 | if (err) | |
614 | return err; | |
615 | } | |
fd3c3ed5 | 616 | |
e8a496ac | 617 | if (HAVE_HWFP) { |
c37b5efe SS |
618 | if (cpu_has_xsave) |
619 | err = restore_i387_xsave(buf); | |
620 | else if (cpu_has_fxsr) | |
621 | err = restore_i387_fxsave(fp, sizeof(struct | |
622 | i387_fxsave_struct)); | |
f668964e | 623 | else |
ab513701 | 624 | err = restore_i387_fsave(fp); |
1da177e4 | 625 | } else { |
44210111 RM |
626 | err = fpregs_soft_set(current, NULL, |
627 | 0, sizeof(struct user_i387_ia32_struct), | |
ab513701 | 628 | NULL, fp) != 0; |
1da177e4 LT |
629 | } |
630 | set_used_math(); | |
f668964e | 631 | |
1da177e4 LT |
632 | return err; |
633 | } | |
634 | ||
1da177e4 LT |
635 | /* |
636 | * FPU state for core dumps. | |
60b3b9af RM |
637 | * This is only used for a.out dumps now. |
638 | * It is declared generically using elf_fpregset_t (which is | |
639 | * struct user_i387_struct) but is in fact only used for 32-bit | |
640 | * dumps, so on 64-bit it is really struct user_i387_ia32_struct. | |
1da177e4 | 641 | */ |
3b095a04 | 642 | int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu) |
1da177e4 | 643 | { |
1da177e4 | 644 | struct task_struct *tsk = current; |
f668964e | 645 | int fpvalid; |
1da177e4 LT |
646 | |
647 | fpvalid = !!used_math(); | |
60b3b9af RM |
648 | if (fpvalid) |
649 | fpvalid = !fpregs_get(tsk, NULL, | |
650 | 0, sizeof(struct user_i387_ia32_struct), | |
651 | fpu, NULL); | |
1da177e4 LT |
652 | |
653 | return fpvalid; | |
654 | } | |
129f6946 | 655 | EXPORT_SYMBOL(dump_fpu); |
1da177e4 | 656 | |
60b3b9af | 657 | #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */ |