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Commit | Line | Data |
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8d016ef1 | 1 | /* |
835c34a1 | 2 | * 8253/PIT functions |
8d016ef1 JS |
3 | * |
4 | */ | |
e9e2cdb4 | 5 | #include <linux/clockchips.h> |
18de5bc4 | 6 | #include <linux/interrupt.h> |
c8344bc2 | 7 | #include <linux/spinlock.h> |
8d016ef1 | 8 | #include <linux/jiffies.h> |
8d016ef1 | 9 | #include <linux/module.h> |
08604bd9 | 10 | #include <linux/timex.h> |
c8344bc2 | 11 | #include <linux/delay.h> |
334955ef | 12 | #include <linux/i8253.h> |
c8344bc2 JSR |
13 | #include <linux/init.h> |
14 | #include <linux/io.h> | |
8d016ef1 | 15 | |
4713e22c | 16 | #include <asm/hpet.h> |
c8344bc2 | 17 | #include <asm/smp.h> |
8d016ef1 | 18 | |
e9e2cdb4 TG |
19 | /* |
20 | * HPET replaces the PIT, when enabled. So we need to know, which of | |
21 | * the two timers is used | |
22 | */ | |
23 | struct clock_event_device *global_clock_event; | |
24 | ||
25 | /* | |
26 | * Initialize the PIT timer. | |
27 | * | |
28 | * This is also called after resume to bring the PIT into operation again. | |
29 | */ | |
30 | static void init_pit_timer(enum clock_event_mode mode, | |
31 | struct clock_event_device *evt) | |
32 | { | |
ced918eb | 33 | raw_spin_lock(&i8253_lock); |
e9e2cdb4 | 34 | |
c8344bc2 | 35 | switch (mode) { |
e9e2cdb4 TG |
36 | case CLOCK_EVT_MODE_PERIODIC: |
37 | /* binary, mode 2, LSB/MSB, ch 0 */ | |
466eed22 AC |
38 | outb_pit(0x34, PIT_MODE); |
39 | outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */ | |
40 | outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */ | |
e9e2cdb4 TG |
41 | break; |
42 | ||
e9e2cdb4 TG |
43 | case CLOCK_EVT_MODE_SHUTDOWN: |
44 | case CLOCK_EVT_MODE_UNUSED: | |
7671988b TG |
45 | if (evt->mode == CLOCK_EVT_MODE_PERIODIC || |
46 | evt->mode == CLOCK_EVT_MODE_ONESHOT) { | |
466eed22 AC |
47 | outb_pit(0x30, PIT_MODE); |
48 | outb_pit(0, PIT_CH0); | |
49 | outb_pit(0, PIT_CH0); | |
7671988b | 50 | } |
18de5bc4 TG |
51 | break; |
52 | ||
6b3964cd | 53 | case CLOCK_EVT_MODE_ONESHOT: |
e9e2cdb4 | 54 | /* One shot setup */ |
466eed22 | 55 | outb_pit(0x38, PIT_MODE); |
18de5bc4 TG |
56 | break; |
57 | ||
58 | case CLOCK_EVT_MODE_RESUME: | |
59 | /* Nothing to do here */ | |
e9e2cdb4 TG |
60 | break; |
61 | } | |
ced918eb | 62 | raw_spin_unlock(&i8253_lock); |
e9e2cdb4 TG |
63 | } |
64 | ||
65 | /* | |
66 | * Program the next event in oneshot mode | |
67 | * | |
68 | * Delta is given in PIT ticks | |
69 | */ | |
70 | static int pit_next_event(unsigned long delta, struct clock_event_device *evt) | |
8d016ef1 | 71 | { |
ced918eb | 72 | raw_spin_lock(&i8253_lock); |
466eed22 AC |
73 | outb_pit(delta & 0xff , PIT_CH0); /* LSB */ |
74 | outb_pit(delta >> 8 , PIT_CH0); /* MSB */ | |
ced918eb | 75 | raw_spin_unlock(&i8253_lock); |
e9e2cdb4 TG |
76 | |
77 | return 0; | |
78 | } | |
79 | ||
80 | /* | |
81 | * On UP the PIT can serve all of the possible timer functions. On SMP systems | |
82 | * it can be solely used for the global tick. | |
83 | * | |
27b46d76 | 84 | * The profiling and update capabilities are switched off once the local apic is |
e9e2cdb4 TG |
85 | * registered. This mechanism replaces the previous #ifdef LOCAL_APIC - |
86 | * !using_apic_timer decisions in do_timer_interrupt_hook() | |
87 | */ | |
c8344bc2 | 88 | static struct clock_event_device pit_ce = { |
e9e2cdb4 TG |
89 | .name = "pit", |
90 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
91 | .set_mode = init_pit_timer, | |
92 | .set_next_event = pit_next_event, | |
e9e2cdb4 TG |
93 | .irq = 0, |
94 | }; | |
95 | ||
96 | /* | |
97 | * Initialize the conversion factor and the min/max deltas of the clock event | |
98 | * structure and register the clock event source with the framework. | |
99 | */ | |
100 | void __init setup_pit_timer(void) | |
101 | { | |
102 | /* | |
103 | * Start pit with the boot cpu mask and make it global after the | |
104 | * IO_APIC has been initialized. | |
105 | */ | |
c8344bc2 | 106 | pit_ce.cpumask = cpumask_of(smp_processor_id()); |
c8344bc2 | 107 | |
61ee9a4b | 108 | clockevents_config_and_register(&pit_ce, CLOCK_TICK_RATE, 0xF, 0x7FFF); |
c8344bc2 | 109 | global_clock_event = &pit_ce; |
8d016ef1 | 110 | } |
5d0cf410 | 111 | |
f5e0e93f | 112 | #ifndef CONFIG_X86_64 |
5d0cf410 JS |
113 | static int __init init_pit_clocksource(void) |
114 | { | |
316da3b3 TG |
115 | /* |
116 | * Several reasons not to register PIT as a clocksource: | |
117 | * | |
118 | * - On SMP PIT does not scale due to i8253_lock | |
119 | * - when HPET is enabled | |
120 | * - when local APIC timer is active (PIT is switched off) | |
121 | */ | |
122 | if (num_possible_cpus() > 1 || is_hpet_enabled() || | |
c8344bc2 | 123 | pit_ce.mode != CLOCK_EVT_MODE_PERIODIC) |
5d0cf410 JS |
124 | return 0; |
125 | ||
82491451 | 126 | return clocksource_i8253_init(); |
5d0cf410 | 127 | } |
6bb74df4 | 128 | arch_initcall(init_pit_clocksource); |
c8344bc2 | 129 | #endif /* !CONFIG_X86_64 */ |