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[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / irq.c
CommitLineData
6b39ba77
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1/*
2 * Common interrupt code for 32 and 64 bit
3 */
4#include <linux/cpu.h>
5#include <linux/interrupt.h>
6#include <linux/kernel_stat.h>
7#include <linux/seq_file.h>
6a02e710 8#include <linux/smp.h>
7c1d7cdc 9#include <linux/ftrace.h>
6b39ba77 10
7b6aa335 11#include <asm/apic.h>
6b39ba77 12#include <asm/io_apic.h>
c3d80000 13#include <asm/irq.h>
7c1d7cdc 14#include <asm/idle.h>
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15
16atomic_t irq_err_count;
17
acaabe79
DS
18/* Function pointer for generic interrupt vector handling */
19void (*generic_interrupt_extension)(void) = NULL;
20
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21/*
22 * 'what should we do if we get a hw irq event on an illegal vector'.
23 * each architecture has to answer this themselves.
24 */
25void ack_bad_irq(unsigned int irq)
26{
27 printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq);
28
29#ifdef CONFIG_X86_LOCAL_APIC
30 /*
31 * Currently unexpected vectors happen only on SMP and APIC.
32 * We _must_ ack these because every local APIC has only N
33 * irq slots per priority level, and a 'hanging, unacked' IRQ
34 * holds up an irq slot - in excessive cases (when multiple
35 * unexpected vectors occur) that might lock up the APIC
36 * completely.
37 * But only ack when the APIC is enabled -AK
38 */
39 if (cpu_has_apic)
40 ack_APIC_irq();
41#endif
42}
43
1b437c8c 44#define irq_stats(x) (&per_cpu(irq_stat, x))
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45/*
46 * /proc/interrupts printing:
47 */
7a81d9a7 48static int show_other_interrupts(struct seq_file *p, int prec)
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49{
50 int j;
51
7a81d9a7 52 seq_printf(p, "%*s: ", prec, "NMI");
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53 for_each_online_cpu(j)
54 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
55 seq_printf(p, " Non-maskable interrupts\n");
56#ifdef CONFIG_X86_LOCAL_APIC
7a81d9a7 57 seq_printf(p, "%*s: ", prec, "LOC");
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58 for_each_online_cpu(j)
59 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
60 seq_printf(p, " Local timer interrupts\n");
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61
62 seq_printf(p, "%*s: ", prec, "SPU");
63 for_each_online_cpu(j)
64 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
65 seq_printf(p, " Spurious interrupts\n");
6b39ba77 66#endif
acaabe79 67 if (generic_interrupt_extension) {
59d13812 68 seq_printf(p, "%*s: ", prec, "PLT");
acaabe79
DS
69 for_each_online_cpu(j)
70 seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
71 seq_printf(p, " Platform interrupts\n");
72 }
6b39ba77 73#ifdef CONFIG_SMP
7a81d9a7 74 seq_printf(p, "%*s: ", prec, "RES");
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75 for_each_online_cpu(j)
76 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
77 seq_printf(p, " Rescheduling interrupts\n");
7a81d9a7 78 seq_printf(p, "%*s: ", prec, "CAL");
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79 for_each_online_cpu(j)
80 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
81 seq_printf(p, " Function call interrupts\n");
7a81d9a7 82 seq_printf(p, "%*s: ", prec, "TLB");
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83 for_each_online_cpu(j)
84 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
85 seq_printf(p, " TLB shootdowns\n");
86#endif
87#ifdef CONFIG_X86_MCE
7a81d9a7 88 seq_printf(p, "%*s: ", prec, "TRM");
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89 for_each_online_cpu(j)
90 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
91 seq_printf(p, " Thermal event interrupts\n");
92# ifdef CONFIG_X86_64
7a81d9a7 93 seq_printf(p, "%*s: ", prec, "THR");
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94 for_each_online_cpu(j)
95 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
96 seq_printf(p, " Threshold APIC interrupts\n");
97# endif
6b39ba77 98#endif
7a81d9a7 99 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
6b39ba77 100#if defined(CONFIG_X86_IO_APIC)
7a81d9a7 101 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
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102#endif
103 return 0;
104}
105
106int show_interrupts(struct seq_file *p, void *v)
107{
108 unsigned long flags, any_count = 0;
7a81d9a7 109 int i = *(loff_t *) v, j, prec;
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110 struct irqaction *action;
111 struct irq_desc *desc;
112
113 if (i > nr_irqs)
114 return 0;
115
7a81d9a7
JB
116 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
117 j *= 10;
118
6b39ba77 119 if (i == nr_irqs)
7a81d9a7 120 return show_other_interrupts(p, prec);
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121
122 /* print header */
123 if (i == 0) {
7a81d9a7 124 seq_printf(p, "%*s", prec + 8, "");
6b39ba77 125 for_each_online_cpu(j)
e9f95e63 126 seq_printf(p, "CPU%-8d", j);
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127 seq_putc(p, '\n');
128 }
129
130 desc = irq_to_desc(i);
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131 if (!desc)
132 return 0;
133
6b39ba77 134 spin_lock_irqsave(&desc->lock, flags);
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135 for_each_online_cpu(j)
136 any_count |= kstat_irqs_cpu(i, j);
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137 action = desc->action;
138 if (!action && !any_count)
139 goto out;
140
7a81d9a7 141 seq_printf(p, "%*d: ", prec, i);
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142 for_each_online_cpu(j)
143 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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144 seq_printf(p, " %8s", desc->chip->name);
145 seq_printf(p, "-%-8s", desc->name);
146
147 if (action) {
148 seq_printf(p, " %s", action->name);
149 while ((action = action->next) != NULL)
150 seq_printf(p, ", %s", action->name);
151 }
152
153 seq_putc(p, '\n');
154out:
155 spin_unlock_irqrestore(&desc->lock, flags);
156 return 0;
157}
158
159/*
160 * /proc/stat helpers
161 */
162u64 arch_irq_stat_cpu(unsigned int cpu)
163{
164 u64 sum = irq_stats(cpu)->__nmi_count;
165
166#ifdef CONFIG_X86_LOCAL_APIC
167 sum += irq_stats(cpu)->apic_timer_irqs;
474e56b8 168 sum += irq_stats(cpu)->irq_spurious_count;
6b39ba77 169#endif
acaabe79
DS
170 if (generic_interrupt_extension)
171 sum += irq_stats(cpu)->generic_irqs;
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172#ifdef CONFIG_SMP
173 sum += irq_stats(cpu)->irq_resched_count;
174 sum += irq_stats(cpu)->irq_call_count;
175 sum += irq_stats(cpu)->irq_tlb_count;
176#endif
177#ifdef CONFIG_X86_MCE
178 sum += irq_stats(cpu)->irq_thermal_count;
179# ifdef CONFIG_X86_64
180 sum += irq_stats(cpu)->irq_threshold_count;
181#endif
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182#endif
183 return sum;
184}
185
186u64 arch_irq_stat(void)
187{
188 u64 sum = atomic_read(&irq_err_count);
189
190#ifdef CONFIG_X86_IO_APIC
191 sum += atomic_read(&irq_mis_count);
192#endif
193 return sum;
194}
c3d80000 195
7c1d7cdc
JF
196
197/*
198 * do_IRQ handles all normal device IRQ's (the special
199 * SMP cross-CPU interrupts have their own specific
200 * handlers).
201 */
202unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
203{
204 struct pt_regs *old_regs = set_irq_regs(regs);
205
206 /* high bit used in ret_from_ code */
207 unsigned vector = ~regs->orig_ax;
208 unsigned irq;
209
210 exit_idle();
211 irq_enter();
212
213 irq = __get_cpu_var(vector_irq)[vector];
214
215 if (!handle_irq(irq, regs)) {
216#ifdef CONFIG_X86_64
217 if (!disable_apic)
218 ack_APIC_irq();
219#endif
220
221 if (printk_ratelimit())
222 printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
223 __func__, smp_processor_id(), vector, irq);
224 }
225
226 irq_exit();
227
228 set_irq_regs(old_regs);
229 return 1;
230}
231
acaabe79
DS
232/*
233 * Handler for GENERIC_INTERRUPT_VECTOR.
234 */
235void smp_generic_interrupt(struct pt_regs *regs)
236{
237 struct pt_regs *old_regs = set_irq_regs(regs);
238
239 ack_APIC_irq();
240
241 exit_idle();
242
243 irq_enter();
244
245 inc_irq_stat(generic_irqs);
246
247 if (generic_interrupt_extension)
248 generic_interrupt_extension();
249
250 irq_exit();
251
252 set_irq_regs(old_regs);
253}
254
c3d80000 255EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);