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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar |
3 | * | |
4 | * This file contains the lowest level x86_64-specific interrupt | |
5 | * entry and irq statistics code. All the remaining irq logic is | |
6 | * done by the generic kernel/irq/ code and in the | |
7 | * x86_64-specific irq controller code. (e.g. i8259.c and | |
8 | * io_apic.c.) | |
9 | */ | |
10 | ||
11 | #include <linux/kernel_stat.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/module.h> | |
76e4f660 | 15 | #include <linux/delay.h> |
bcbc4f20 | 16 | #include <linux/ftrace.h> |
5f66b2a0 JSR |
17 | #include <linux/uaccess.h> |
18 | #include <linux/smp.h> | |
1da177e4 | 19 | #include <asm/io_apic.h> |
95833c83 | 20 | #include <asm/idle.h> |
1da177e4 | 21 | |
1b437c8c BG |
22 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
23 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
24 | ||
4961f10e ES |
25 | /* |
26 | * Probabilistic stack overflow check: | |
27 | * | |
28 | * Only check the stack in process context, because everything else | |
29 | * runs on the big interrupt stacks. Checking reliably is too expensive, | |
30 | * so we just check from interrupts. | |
31 | */ | |
32 | static inline void stack_overflow_check(struct pt_regs *regs) | |
33 | { | |
f377fa12 | 34 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
c9f4f06d | 35 | u64 curbase = (u64)task_stack_page(current); |
f377fa12 IM |
36 | |
37 | WARN_ONCE(regs->sp >= curbase && | |
38 | regs->sp <= curbase + THREAD_SIZE && | |
39 | regs->sp < curbase + sizeof(struct thread_info) + | |
40 | sizeof(struct pt_regs) + 128, | |
41 | ||
42 | "do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n", | |
43 | current->comm, curbase, regs->sp); | |
4961f10e | 44 | #endif |
f377fa12 | 45 | } |
4961f10e | 46 | |
1da177e4 LT |
47 | /* |
48 | * do_IRQ handles all normal device IRQ's (the special | |
49 | * SMP cross-CPU interrupts have their own specific | |
50 | * handlers). | |
51 | */ | |
bcbc4f20 | 52 | asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs) |
7d12e780 DH |
53 | { |
54 | struct pt_regs *old_regs = set_irq_regs(regs); | |
46926b67 | 55 | struct irq_desc *desc; |
7d12e780 | 56 | |
19eadf98 | 57 | /* high bit used in ret_from_ code */ |
65ea5b03 | 58 | unsigned vector = ~regs->orig_ax; |
e500f574 EB |
59 | unsigned irq; |
60 | ||
61 | exit_idle(); | |
62 | irq_enter(); | |
550f2299 | 63 | irq = __get_cpu_var(vector_irq)[vector]; |
1da177e4 | 64 | |
4961f10e | 65 | stack_overflow_check(regs); |
d3696cf7 | 66 | |
cb5bc832 | 67 | desc = irq_to_desc(irq); |
46926b67 YL |
68 | if (likely(desc)) |
69 | generic_handle_irq_desc(irq, desc); | |
2fb12a9b EB |
70 | else { |
71 | if (!disable_apic) | |
72 | ack_APIC_irq(); | |
73 | ||
74 | if (printk_ratelimit()) | |
75 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n", | |
76 | __func__, smp_processor_id(), vector); | |
77 | } | |
d3696cf7 | 78 | |
1da177e4 LT |
79 | irq_exit(); |
80 | ||
7d12e780 | 81 | set_irq_regs(old_regs); |
1da177e4 LT |
82 | return 1; |
83 | } | |
84 | ||
76e4f660 | 85 | #ifdef CONFIG_HOTPLUG_CPU |
d7b381bb MT |
86 | /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ |
87 | void fixup_irqs(void) | |
76e4f660 AR |
88 | { |
89 | unsigned int irq; | |
90 | static int warned; | |
2c6927a3 | 91 | struct irq_desc *desc; |
76e4f660 | 92 | |
2c6927a3 | 93 | for_each_irq_desc(irq, desc) { |
48d8d7ee SS |
94 | int break_affinity = 0; |
95 | int set_affinity = 1; | |
d7b381bb | 96 | const struct cpumask *affinity; |
48d8d7ee | 97 | |
0b8f1efa YL |
98 | if (!desc) |
99 | continue; | |
76e4f660 AR |
100 | if (irq == 2) |
101 | continue; | |
102 | ||
48d8d7ee | 103 | /* interrupt's are disabled at this point */ |
08678b08 | 104 | spin_lock(&desc->lock); |
48d8d7ee | 105 | |
7f7ace0c | 106 | affinity = desc->affinity; |
48d8d7ee | 107 | if (!irq_has_action(irq) || |
d7b381bb | 108 | cpumask_equal(affinity, cpu_online_mask)) { |
08678b08 | 109 | spin_unlock(&desc->lock); |
48d8d7ee SS |
110 | continue; |
111 | } | |
112 | ||
d7b381bb | 113 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { |
48d8d7ee | 114 | break_affinity = 1; |
d7b381bb | 115 | affinity = cpu_all_mask; |
76e4f660 | 116 | } |
48d8d7ee | 117 | |
08678b08 YL |
118 | if (desc->chip->mask) |
119 | desc->chip->mask(irq); | |
48d8d7ee | 120 | |
08678b08 | 121 | if (desc->chip->set_affinity) |
d7b381bb | 122 | desc->chip->set_affinity(irq, affinity); |
48d8d7ee SS |
123 | else if (!(warned++)) |
124 | set_affinity = 0; | |
125 | ||
08678b08 YL |
126 | if (desc->chip->unmask) |
127 | desc->chip->unmask(irq); | |
48d8d7ee | 128 | |
08678b08 | 129 | spin_unlock(&desc->lock); |
48d8d7ee SS |
130 | |
131 | if (break_affinity && set_affinity) | |
132 | printk("Broke affinity for irq %i\n", irq); | |
133 | else if (!set_affinity) | |
76e4f660 AR |
134 | printk("Cannot set affinity for irq %i\n", irq); |
135 | } | |
136 | ||
137 | /* That doesn't seem sufficient. Give it 1ms. */ | |
138 | local_irq_enable(); | |
139 | mdelay(1); | |
140 | local_irq_disable(); | |
141 | } | |
142 | #endif | |
ed6b676c AK |
143 | |
144 | extern void call_softirq(void); | |
145 | ||
146 | asmlinkage void do_softirq(void) | |
147 | { | |
5f66b2a0 JSR |
148 | __u32 pending; |
149 | unsigned long flags; | |
ed6b676c | 150 | |
5f66b2a0 JSR |
151 | if (in_interrupt()) |
152 | return; | |
ed6b676c | 153 | |
5f66b2a0 JSR |
154 | local_irq_save(flags); |
155 | pending = local_softirq_pending(); | |
156 | /* Switch to interrupt stack */ | |
157 | if (pending) { | |
ed6b676c | 158 | call_softirq(); |
2601e64d IM |
159 | WARN_ON_ONCE(softirq_count()); |
160 | } | |
5f66b2a0 | 161 | local_irq_restore(flags); |
ed6b676c | 162 | } |