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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
87c6fe26 | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
8f47e163 | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb | 19 | #include <linux/smp.h> |
1da177e4 | 20 | |
1da177e4 LT |
21 | #include <asm/mtrr.h> |
22 | #include <asm/mpspec.h> | |
85bdddec | 23 | #include <asm/pgalloc.h> |
1da177e4 | 24 | #include <asm/io_apic.h> |
85bdddec | 25 | #include <asm/proto.h> |
ce3fe6b2 | 26 | #include <asm/bios_ebda.h> |
2944e16b YL |
27 | #include <asm/e820.h> |
28 | #include <asm/trampoline.h> | |
3c9cb6de | 29 | #include <asm/setup.h> |
4884d8e6 | 30 | #include <asm/smp.h> |
1da177e4 | 31 | |
7b6aa335 | 32 | #include <asm/apic.h> |
1da177e4 LT |
33 | /* |
34 | * Checksum an MP configuration block. | |
35 | */ | |
36 | ||
37 | static int __init mpf_checksum(unsigned char *mp, int len) | |
38 | { | |
39 | int sum = 0; | |
40 | ||
41 | while (len--) | |
42 | sum += *mp++; | |
43 | ||
44 | return sum & 0xFF; | |
45 | } | |
46 | ||
f4f21b71 | 47 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
48 | { |
49 | int apicid; | |
746f2244 | 50 | char *bootup_cpu = ""; |
c853c676 | 51 | |
c4563826 | 52 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 53 | disabled_cpus++; |
1da177e4 | 54 | return; |
7b1292e2 | 55 | } |
64898a8b YL |
56 | |
57 | if (x86_quirks->mpc_apic_id) | |
58 | apicid = x86_quirks->mpc_apic_id(m); | |
ab530e1f | 59 | else |
c4563826 | 60 | apicid = m->apicid; |
64898a8b | 61 | |
c4563826 | 62 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 63 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 64 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
65 | } |
66 | ||
c4563826 JSR |
67 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
68 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
69 | } |
70 | ||
85cc35fa | 71 | #ifdef CONFIG_X86_IO_APIC |
00fb8606 | 72 | static void __init MP_bus_info(struct mpc_bus *m) |
1da177e4 LT |
73 | { |
74 | char str[7]; | |
d4c715fa | 75 | memcpy(str, m->bustype, 6); |
1da177e4 LT |
76 | str[6] = 0; |
77 | ||
64898a8b YL |
78 | if (x86_quirks->mpc_oem_bus_info) |
79 | x86_quirks->mpc_oem_bus_info(m, str); | |
80 | else | |
d4c715fa | 81 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); |
1da177e4 | 82 | |
5e4edbb7 | 83 | #if MAX_MP_BUSSES < 256 |
d4c715fa | 84 | if (m->busid >= MAX_MP_BUSSES) { |
c0ec31ad | 85 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " |
4ef81297 | 86 | " is too large, max. supported is %d\n", |
d4c715fa | 87 | m->busid, str, MAX_MP_BUSSES - 1); |
c0ec31ad RD |
88 | return; |
89 | } | |
5e4edbb7 | 90 | #endif |
c0ec31ad | 91 | |
f8924e77 | 92 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
d4c715fa | 93 | set_bit(m->busid, mp_bus_not_pci); |
103ceffb | 94 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 95 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
f8924e77 AS |
96 | #endif |
97 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
64898a8b YL |
98 | if (x86_quirks->mpc_oem_pci_bus) |
99 | x86_quirks->mpc_oem_pci_bus(m); | |
100 | ||
d4c715fa | 101 | clear_bit(m->busid, mp_bus_not_pci); |
103ceffb | 102 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 103 | mp_bus_id_to_type[m->busid] = MP_BUS_PCI; |
4ef81297 | 104 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
d4c715fa | 105 | mp_bus_id_to_type[m->busid] = MP_BUS_EISA; |
4ef81297 | 106 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
d4c715fa | 107 | mp_bus_id_to_type[m->busid] = MP_BUS_MCA; |
c0a282c2 | 108 | #endif |
f8924e77 AS |
109 | } else |
110 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 111 | } |
61048c63 | 112 | |
857033a6 AS |
113 | static int bad_ioapic(unsigned long address) |
114 | { | |
115 | if (nr_ioapics >= MAX_IO_APICS) { | |
116 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
117 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
118 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
119 | } | |
120 | if (!address) { | |
121 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
122 | " found in table, skipping!\n"); | |
123 | return 1; | |
124 | } | |
125 | return 0; | |
126 | } | |
127 | ||
2b85b5fb | 128 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 129 | { |
5df82c7d | 130 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
131 | return; |
132 | ||
64883ab0 | 133 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 134 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 135 | |
5df82c7d | 136 | if (bad_ioapic(m->apicaddr)) |
1da177e4 | 137 | return; |
857033a6 | 138 | |
b5ba7e6d JSR |
139 | mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; |
140 | mp_ioapics[nr_ioapics].apicid = m->apicid; | |
141 | mp_ioapics[nr_ioapics].type = m->type; | |
142 | mp_ioapics[nr_ioapics].apicver = m->apicver; | |
143 | mp_ioapics[nr_ioapics].flags = m->flags; | |
1da177e4 LT |
144 | nr_ioapics++; |
145 | } | |
146 | ||
540d4e72 | 147 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 148 | { |
eeb0d7d1 | 149 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 150 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
151 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
152 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
153 | } |
154 | ||
c2c21745 | 155 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
2944e16b | 156 | { |
eeb0d7d1 | 157 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b | 158 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
c2c21745 JSR |
159 | mp_irq->irqtype, mp_irq->irqflag & 3, |
160 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, | |
161 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | |
2944e16b YL |
162 | } |
163 | ||
540d4e72 | 164 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
c2c21745 | 165 | struct mpc_intsrc *mp_irq) |
2944e16b | 166 | { |
c2c21745 JSR |
167 | mp_irq->dstapic = m->dstapic; |
168 | mp_irq->type = m->type; | |
169 | mp_irq->irqtype = m->irqtype; | |
170 | mp_irq->irqflag = m->irqflag; | |
171 | mp_irq->srcbus = m->srcbus; | |
172 | mp_irq->srcbusirq = m->srcbusirq; | |
173 | mp_irq->dstirq = m->dstirq; | |
2944e16b YL |
174 | } |
175 | ||
c2c21745 | 176 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
540d4e72 | 177 | struct mpc_intsrc *m) |
2944e16b | 178 | { |
c2c21745 JSR |
179 | m->dstapic = mp_irq->dstapic; |
180 | m->type = mp_irq->type; | |
181 | m->irqtype = mp_irq->irqtype; | |
182 | m->irqflag = mp_irq->irqflag; | |
183 | m->srcbus = mp_irq->srcbus; | |
184 | m->srcbusirq = mp_irq->srcbusirq; | |
185 | m->dstirq = mp_irq->dstirq; | |
2944e16b YL |
186 | } |
187 | ||
c2c21745 | 188 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
540d4e72 | 189 | struct mpc_intsrc *m) |
2944e16b | 190 | { |
c2c21745 | 191 | if (mp_irq->dstapic != m->dstapic) |
2944e16b | 192 | return 1; |
c2c21745 | 193 | if (mp_irq->type != m->type) |
2944e16b | 194 | return 2; |
c2c21745 | 195 | if (mp_irq->irqtype != m->irqtype) |
2944e16b | 196 | return 3; |
c2c21745 | 197 | if (mp_irq->irqflag != m->irqflag) |
2944e16b | 198 | return 4; |
c2c21745 | 199 | if (mp_irq->srcbus != m->srcbus) |
2944e16b | 200 | return 5; |
c2c21745 | 201 | if (mp_irq->srcbusirq != m->srcbusirq) |
2944e16b | 202 | return 6; |
c2c21745 | 203 | if (mp_irq->dstirq != m->dstirq) |
2944e16b YL |
204 | return 7; |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
540d4e72 | 209 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
210 | { |
211 | int i; | |
212 | ||
213 | print_MP_intsrc_info(m); | |
214 | ||
fcfa146e YL |
215 | for (i = 0; i < mp_irq_entries; i++) { |
216 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
217 | return; | |
218 | } | |
2944e16b YL |
219 | |
220 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
221 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
222 | panic("Max # of irq sources exceeded!!\n"); | |
223 | } | |
a6830278 JSR |
224 | #else /* CONFIG_X86_IO_APIC */ |
225 | static inline void __init MP_bus_info(struct mpc_bus *m) {} | |
226 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} | |
227 | static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} | |
228 | #endif /* CONFIG_X86_IO_APIC */ | |
1da177e4 | 229 | |
61048c63 | 230 | |
8fb2952b | 231 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 232 | { |
eeb0d7d1 | 233 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 234 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
235 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
236 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
237 | } |
238 | ||
1da177e4 LT |
239 | /* |
240 | * Read/parse the MPC | |
241 | */ | |
242 | ||
f29521e4 | 243 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 244 | { |
1da177e4 | 245 | |
6c65da50 | 246 | if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { |
e950bea8 | 247 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
6c65da50 JSR |
248 | mpc->signature[0], mpc->signature[1], |
249 | mpc->signature[2], mpc->signature[3]); | |
1da177e4 LT |
250 | return 0; |
251 | } | |
6c65da50 | 252 | if (mpf_checksum((unsigned char *)mpc, mpc->length)) { |
e950bea8 | 253 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
254 | return 0; |
255 | } | |
6c65da50 | 256 | if (mpc->spec != 0x01 && mpc->spec != 0x04) { |
e950bea8 | 257 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
6c65da50 | 258 | mpc->spec); |
1da177e4 LT |
259 | return 0; |
260 | } | |
6c65da50 | 261 | if (!mpc->lapic) { |
e950bea8 | 262 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
263 | return 0; |
264 | } | |
6c65da50 | 265 | memcpy(oem, mpc->oem, 8); |
4ef81297 | 266 | oem[8] = 0; |
11a62a05 | 267 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 268 | |
6c65da50 | 269 | memcpy(str, mpc->productid, 12); |
4ef81297 | 270 | str[12] = 0; |
1da177e4 | 271 | |
11a62a05 | 272 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 273 | |
6c65da50 | 274 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); |
1da177e4 | 275 | |
2944e16b YL |
276 | return 1; |
277 | } | |
278 | ||
a6830278 JSR |
279 | static void skip_entry(unsigned char **ptr, int *count, int size) |
280 | { | |
281 | *ptr += size; | |
282 | *count += size; | |
283 | } | |
284 | ||
5a5737ea JSR |
285 | static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) |
286 | { | |
287 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" | |
288 | "type %x\n", *mpt); | |
289 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
290 | 1, mpc, mpc->length, 1); | |
291 | } | |
292 | ||
f29521e4 | 293 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
294 | { |
295 | char str[16]; | |
296 | char oem[10]; | |
297 | ||
298 | int count = sizeof(*mpc); | |
299 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
300 | ||
301 | if (!smp_check_mpc(mpc, oem, str)) | |
302 | return 0; | |
303 | ||
304 | #ifdef CONFIG_X86_32 | |
9c764247 | 305 | generic_mps_oem_check(mpc, oem, str); |
2944e16b | 306 | #endif |
e950bea8 | 307 | /* save the local APIC address, it might be non-default */ |
1da177e4 | 308 | if (!acpi_lapic) |
6c65da50 | 309 | mp_lapic_addr = mpc->lapic; |
1da177e4 | 310 | |
888032cd AS |
311 | if (early) |
312 | return 1; | |
313 | ||
6c65da50 JSR |
314 | if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) { |
315 | struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr; | |
316 | x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize); | |
64898a8b YL |
317 | } |
318 | ||
1da177e4 | 319 | /* |
4ef81297 | 320 | * Now process the configuration blocks. |
1da177e4 | 321 | */ |
64898a8b YL |
322 | if (x86_quirks->mpc_record) |
323 | *x86_quirks->mpc_record = 0; | |
324 | ||
6c65da50 | 325 | while (count < mpc->length) { |
4ef81297 AS |
326 | switch (*mpt) { |
327 | case MP_PROCESSOR: | |
a6830278 JSR |
328 | /* ACPI may have already provided this data */ |
329 | if (!acpi_lapic) | |
c58603e8 | 330 | MP_processor_info((struct mpc_cpu *)mpt); |
a6830278 JSR |
331 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
332 | break; | |
4ef81297 | 333 | case MP_BUS: |
c58603e8 | 334 | MP_bus_info((struct mpc_bus *)mpt); |
a6830278 JSR |
335 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
336 | break; | |
4ef81297 | 337 | case MP_IOAPIC: |
c58603e8 | 338 | MP_ioapic_info((struct mpc_ioapic *)mpt); |
a6830278 JSR |
339 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
340 | break; | |
4ef81297 | 341 | case MP_INTSRC: |
c58603e8 | 342 | MP_intsrc_info((struct mpc_intsrc *)mpt); |
a6830278 JSR |
343 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
344 | break; | |
4ef81297 | 345 | case MP_LINTSRC: |
c58603e8 | 346 | MP_lintsrc_info((struct mpc_lintsrc *)mpt); |
a6830278 JSR |
347 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
348 | break; | |
4ef81297 | 349 | default: |
711554db | 350 | /* wrong mptable */ |
5a5737ea | 351 | smp_dump_mptable(mpc, mpt); |
6c65da50 | 352 | count = mpc->length; |
711554db | 353 | break; |
1da177e4 | 354 | } |
64898a8b YL |
355 | if (x86_quirks->mpc_record) |
356 | (*x86_quirks->mpc_record)++; | |
1da177e4 | 357 | } |
e0da3364 | 358 | |
26f7ef14 YL |
359 | #ifdef CONFIG_X86_BIGSMP |
360 | generic_bigsmp_probe(); | |
e0da3364 YL |
361 | #endif |
362 | ||
72ce0165 IM |
363 | if (apic->setup_apic_routing) |
364 | apic->setup_apic_routing(); | |
365 | ||
1da177e4 | 366 | if (!num_processors) |
e950bea8 | 367 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
368 | return num_processors; |
369 | } | |
370 | ||
61048c63 AS |
371 | #ifdef CONFIG_X86_IO_APIC |
372 | ||
1da177e4 LT |
373 | static int __init ELCR_trigger(unsigned int irq) |
374 | { | |
375 | unsigned int port; | |
376 | ||
377 | port = 0x4d0 + (irq >> 3); | |
378 | return (inb(port) >> (irq & 7)) & 1; | |
379 | } | |
380 | ||
381 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
382 | { | |
540d4e72 | 383 | struct mpc_intsrc intsrc; |
1da177e4 LT |
384 | int i; |
385 | int ELCR_fallback = 0; | |
386 | ||
e253b396 JSR |
387 | intsrc.type = MP_INTSRC; |
388 | intsrc.irqflag = 0; /* conforming */ | |
389 | intsrc.srcbus = 0; | |
b5ba7e6d | 390 | intsrc.dstapic = mp_ioapics[0].apicid; |
1da177e4 | 391 | |
e253b396 | 392 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
393 | |
394 | /* | |
395 | * If true, we have an ISA/PCI system with no IRQ entries | |
396 | * in the MP table. To prevent the PCI interrupts from being set up | |
397 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
398 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
399 | * never be level sensitive, so we simply see if the ELCR agrees. | |
400 | * If it does, we assume it's valid. | |
401 | */ | |
402 | if (mpc_default_type == 5) { | |
62441bf1 AS |
403 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
404 | "falling back to ELCR\n"); | |
1da177e4 | 405 | |
62441bf1 AS |
406 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
407 | ELCR_trigger(13)) | |
408 | printk(KERN_ERR "ELCR contains invalid data... " | |
409 | "not using ELCR\n"); | |
1da177e4 | 410 | else { |
4ef81297 AS |
411 | printk(KERN_INFO |
412 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
413 | ELCR_fallback = 1; |
414 | } | |
415 | } | |
416 | ||
417 | for (i = 0; i < 16; i++) { | |
418 | switch (mpc_default_type) { | |
419 | case 2: | |
420 | if (i == 0 || i == 13) | |
421 | continue; /* IRQ0 & IRQ13 not connected */ | |
422 | /* fall through */ | |
423 | default: | |
424 | if (i == 2) | |
425 | continue; /* IRQ2 is never connected */ | |
426 | } | |
427 | ||
428 | if (ELCR_fallback) { | |
429 | /* | |
430 | * If the ELCR indicates a level-sensitive interrupt, we | |
431 | * copy that information over to the MP table in the | |
432 | * irqflag field (level sensitive, active high polarity). | |
433 | */ | |
434 | if (ELCR_trigger(i)) | |
e253b396 | 435 | intsrc.irqflag = 13; |
1da177e4 | 436 | else |
e253b396 | 437 | intsrc.irqflag = 0; |
1da177e4 LT |
438 | } |
439 | ||
e253b396 JSR |
440 | intsrc.srcbusirq = i; |
441 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
442 | MP_intsrc_info(&intsrc); |
443 | } | |
444 | ||
e253b396 JSR |
445 | intsrc.irqtype = mp_ExtINT; |
446 | intsrc.srcbusirq = 0; | |
447 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
448 | MP_intsrc_info(&intsrc); |
449 | } | |
450 | ||
61048c63 | 451 | |
39e00fe2 | 452 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 453 | { |
2b85b5fb | 454 | struct mpc_ioapic ioapic; |
00fb8606 | 455 | struct mpc_bus bus; |
1da177e4 | 456 | |
d4c715fa JSR |
457 | bus.type = MP_BUS; |
458 | bus.busid = 0; | |
1da177e4 | 459 | switch (mpc_default_type) { |
4ef81297 | 460 | default: |
62441bf1 | 461 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
462 | mpc_default_type); |
463 | /* fall through */ | |
464 | case 1: | |
465 | case 5: | |
d4c715fa | 466 | memcpy(bus.bustype, "ISA ", 6); |
4ef81297 AS |
467 | break; |
468 | case 2: | |
469 | case 6: | |
470 | case 3: | |
d4c715fa | 471 | memcpy(bus.bustype, "EISA ", 6); |
4ef81297 AS |
472 | break; |
473 | case 4: | |
474 | case 7: | |
d4c715fa | 475 | memcpy(bus.bustype, "MCA ", 6); |
1da177e4 LT |
476 | } |
477 | MP_bus_info(&bus); | |
478 | if (mpc_default_type > 4) { | |
d4c715fa JSR |
479 | bus.busid = 1; |
480 | memcpy(bus.bustype, "PCI ", 6); | |
1da177e4 LT |
481 | MP_bus_info(&bus); |
482 | } | |
483 | ||
5df82c7d JSR |
484 | ioapic.type = MP_IOAPIC; |
485 | ioapic.apicid = 2; | |
486 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
487 | ioapic.flags = MPC_APIC_USABLE; | |
488 | ioapic.apicaddr = 0xFEC00000; | |
1da177e4 LT |
489 | MP_ioapic_info(&ioapic); |
490 | ||
491 | /* | |
492 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
493 | */ | |
494 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
495 | } |
496 | #else | |
39e00fe2 | 497 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 498 | #endif |
85cc35fa TG |
499 | |
500 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
501 | { | |
f4f21b71 | 502 | struct mpc_cpu processor; |
8fb2952b | 503 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
504 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
505 | int i; | |
506 | ||
507 | /* | |
508 | * local APIC has default address | |
509 | */ | |
510 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
511 | ||
512 | /* | |
513 | * 2 CPUs, numbered 0 & 1. | |
514 | */ | |
c4563826 | 515 | processor.type = MP_PROCESSOR; |
85cc35fa | 516 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
517 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
518 | processor.cpuflag = CPU_ENABLED; | |
519 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 520 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
521 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
522 | processor.reserved[0] = 0; | |
523 | processor.reserved[1] = 0; | |
85cc35fa | 524 | for (i = 0; i < 2; i++) { |
c4563826 | 525 | processor.apicid = i; |
85cc35fa TG |
526 | MP_processor_info(&processor); |
527 | } | |
528 | ||
529 | construct_ioapic_table(mpc_default_type); | |
530 | ||
b5ced7cd JSR |
531 | lintsrc.type = MP_LINTSRC; |
532 | lintsrc.irqflag = 0; /* conforming */ | |
533 | lintsrc.srcbusid = 0; | |
534 | lintsrc.srcbusirq = 0; | |
535 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 536 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
537 | lintsrc.irqtype = linttypes[i]; |
538 | lintsrc.destapiclint = i; | |
1da177e4 LT |
539 | MP_lintsrc_info(&lintsrc); |
540 | } | |
541 | } | |
542 | ||
41401db6 | 543 | static struct mpf_intel *mpf_found; |
1da177e4 | 544 | |
8d4dd919 YL |
545 | static unsigned long __init get_mpc_size(unsigned long physptr) |
546 | { | |
547 | struct mpc_table *mpc; | |
548 | unsigned long size; | |
549 | ||
550 | mpc = early_ioremap(physptr, PAGE_SIZE); | |
551 | size = mpc->length; | |
552 | early_iounmap(mpc, PAGE_SIZE); | |
553 | apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); | |
554 | ||
555 | return size; | |
556 | } | |
557 | ||
0b3ba0c3 JSR |
558 | static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) |
559 | { | |
560 | struct mpc_table *mpc; | |
561 | unsigned long size; | |
562 | ||
563 | size = get_mpc_size(mpf->physptr); | |
564 | mpc = early_ioremap(mpf->physptr, size); | |
565 | /* | |
566 | * Read the physical hardware table. Anything here will | |
567 | * override the defaults. | |
568 | */ | |
569 | if (!smp_read_mpc(mpc, early)) { | |
570 | #ifdef CONFIG_X86_LOCAL_APIC | |
571 | smp_found_config = 0; | |
572 | #endif | |
573 | printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" | |
574 | "... disabling SMP support. (tell your hw vendor)\n"); | |
575 | early_iounmap(mpc, size); | |
576 | return -1; | |
577 | } | |
578 | early_iounmap(mpc, size); | |
579 | ||
580 | if (early) | |
581 | return -1; | |
582 | ||
583 | #ifdef CONFIG_X86_IO_APIC | |
584 | /* | |
585 | * If there are no explicit MP IRQ entries, then we are | |
586 | * broken. We set up most of the low 16 IO-APIC pins to | |
587 | * ISA defaults and hope it will work. | |
588 | */ | |
589 | if (!mp_irq_entries) { | |
590 | struct mpc_bus bus; | |
591 | ||
592 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " | |
593 | "using default mptable. (tell your hw vendor)\n"); | |
594 | ||
595 | bus.type = MP_BUS; | |
596 | bus.busid = 0; | |
597 | memcpy(bus.bustype, "ISA ", 6); | |
598 | MP_bus_info(&bus); | |
599 | ||
600 | construct_default_ioirq_mptable(0); | |
601 | } | |
602 | #endif | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
1da177e4 LT |
607 | /* |
608 | * Scan the memory blocks for an SMP configuration block. | |
609 | */ | |
3b33553b | 610 | static void __init __get_smp_config(unsigned int early) |
1da177e4 | 611 | { |
41401db6 | 612 | struct mpf_intel *mpf = mpf_found; |
1da177e4 | 613 | |
69b88afa YL |
614 | if (!mpf) |
615 | return; | |
616 | ||
888032cd AS |
617 | if (acpi_lapic && early) |
618 | return; | |
69b88afa | 619 | |
1da177e4 | 620 | /* |
69b88afa YL |
621 | * MPS doesn't support hyperthreading, aka only have |
622 | * thread 0 apic id in MPS table | |
1da177e4 | 623 | */ |
69b88afa | 624 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 625 | return; |
1da177e4 | 626 | |
69b88afa YL |
627 | if (x86_quirks->mach_get_smp_config) { |
628 | if (x86_quirks->mach_get_smp_config(early)) | |
629 | return; | |
630 | } | |
9adc1386 | 631 | |
4ef81297 | 632 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
1eb1b3b6 | 633 | mpf->specification); |
b3e24164 | 634 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
1eb1b3b6 | 635 | if (mpf->feature2 & (1 << 7)) { |
1da177e4 LT |
636 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
637 | pic_mode = 1; | |
638 | } else { | |
639 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
640 | pic_mode = 0; | |
641 | } | |
4421b1c8 | 642 | #endif |
1da177e4 LT |
643 | /* |
644 | * Now see if we need to read further. | |
645 | */ | |
1eb1b3b6 | 646 | if (mpf->feature1 != 0) { |
888032cd AS |
647 | if (early) { |
648 | /* | |
649 | * local APIC has default address | |
650 | */ | |
651 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
652 | return; | |
653 | } | |
1da177e4 | 654 | |
4ef81297 | 655 | printk(KERN_INFO "Default MP configuration #%d\n", |
1eb1b3b6 JSR |
656 | mpf->feature1); |
657 | construct_default_ISA_mptable(mpf->feature1); | |
1da177e4 | 658 | |
1eb1b3b6 | 659 | } else if (mpf->physptr) { |
0b3ba0c3 | 660 | if (check_physptr(mpf, early)) |
1da177e4 | 661 | return; |
1da177e4 LT |
662 | } else |
663 | BUG(); | |
664 | ||
888032cd AS |
665 | if (!early) |
666 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
667 | /* |
668 | * Only use the first configuration found. | |
669 | */ | |
670 | } | |
671 | ||
888032cd AS |
672 | void __init early_get_smp_config(void) |
673 | { | |
674 | __get_smp_config(1); | |
675 | } | |
676 | ||
677 | void __init get_smp_config(void) | |
678 | { | |
679 | __get_smp_config(0); | |
680 | } | |
681 | ||
57592224 | 682 | static void __init smp_reserve_bootmem(struct mpf_intel *mpf) |
a6830278 JSR |
683 | { |
684 | unsigned long size = get_mpc_size(mpf->physptr); | |
685 | #ifdef CONFIG_X86_32 | |
686 | /* | |
687 | * We cannot access to MPC table to compute table size yet, | |
688 | * as only few megabytes from the bottom is mapped now. | |
689 | * PC-9800's MPC table places on the very last of physical | |
690 | * memory; so that simply reserving PAGE_SIZE from mpf->physptr | |
691 | * yields BUG() in reserve_bootmem. | |
692 | * also need to make sure physptr is below than max_low_pfn | |
693 | * we don't need reserve the area above max_low_pfn | |
694 | */ | |
695 | unsigned long end = max_low_pfn * PAGE_SIZE; | |
696 | ||
697 | if (mpf->physptr < end) { | |
698 | if (mpf->physptr + size > end) | |
699 | size = end - mpf->physptr; | |
700 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
701 | } | |
702 | #else | |
703 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
704 | #endif | |
705 | } | |
706 | ||
888032cd AS |
707 | static int __init smp_scan_config(unsigned long base, unsigned long length, |
708 | unsigned reserve) | |
1da177e4 | 709 | { |
92fd4b7a | 710 | unsigned int *bp = phys_to_virt(base); |
41401db6 | 711 | struct mpf_intel *mpf; |
1da177e4 | 712 | |
eeb0d7d1 RH |
713 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
714 | bp, length); | |
5d47a271 | 715 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
716 | |
717 | while (length > 0) { | |
41401db6 | 718 | mpf = (struct mpf_intel *)bp; |
1da177e4 | 719 | if ((*bp == SMP_MAGIC_IDENT) && |
1eb1b3b6 | 720 | (mpf->length == 1) && |
4ef81297 | 721 | !mpf_checksum((unsigned char *)bp, 16) && |
1eb1b3b6 JSR |
722 | ((mpf->specification == 1) |
723 | || (mpf->specification == 4))) { | |
bab4b27c | 724 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 725 | smp_found_config = 1; |
bab4b27c | 726 | #endif |
92fd4b7a | 727 | mpf_found = mpf; |
b1f006b6 | 728 | |
ba1511bf JSR |
729 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
730 | mpf, (u64)virt_to_phys(mpf)); | |
b1f006b6 YL |
731 | |
732 | if (!reserve) | |
733 | return 1; | |
f6243239 | 734 | reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf), |
72a7fe39 | 735 | BOOTMEM_DEFAULT); |
a6830278 JSR |
736 | if (mpf->physptr) |
737 | smp_reserve_bootmem(mpf); | |
1da177e4 | 738 | |
d2dbf343 | 739 | return 1; |
1da177e4 LT |
740 | } |
741 | bp += 4; | |
742 | length -= 16; | |
743 | } | |
744 | return 0; | |
745 | } | |
746 | ||
3b33553b | 747 | static void __init __find_smp_config(unsigned int reserve) |
1da177e4 LT |
748 | { |
749 | unsigned int address; | |
750 | ||
3c9cb6de YL |
751 | if (x86_quirks->mach_find_smp_config) { |
752 | if (x86_quirks->mach_find_smp_config(reserve)) | |
3b33553b IM |
753 | return; |
754 | } | |
1da177e4 LT |
755 | /* |
756 | * FIXME: Linux assumes you have 640K of base ram.. | |
757 | * this continues the error... | |
758 | * | |
759 | * 1) Scan the bottom 1K for a signature | |
760 | * 2) Scan the top 1K of base RAM | |
761 | * 3) Scan the 64K of bios | |
762 | */ | |
888032cd AS |
763 | if (smp_scan_config(0x0, 0x400, reserve) || |
764 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
765 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
766 | return; |
767 | /* | |
768 | * If it is an SMP machine we should know now, unless the | |
769 | * configuration is in an EISA/MCA bus machine with an | |
770 | * extended bios data area. | |
771 | * | |
772 | * there is a real-mode segmented pointer pointing to the | |
773 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
774 | * | |
775 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
776 | * area, and as such this kind of SMP config may be less | |
777 | * trustworthy, simply because the SMP table may have been | |
778 | * stomped on during early boot. These loaders are buggy and | |
779 | * should be fixed. | |
780 | * | |
781 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
782 | */ | |
783 | ||
784 | address = get_bios_ebda(); | |
785 | if (address) | |
888032cd AS |
786 | smp_scan_config(address, 0x400, reserve); |
787 | } | |
788 | ||
789 | void __init early_find_smp_config(void) | |
790 | { | |
791 | __find_smp_config(0); | |
792 | } | |
793 | ||
794 | void __init find_smp_config(void) | |
795 | { | |
796 | __find_smp_config(1); | |
1da177e4 | 797 | } |
2944e16b YL |
798 | |
799 | #ifdef CONFIG_X86_IO_APIC | |
800 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
801 | ||
540d4e72 | 802 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
803 | { |
804 | int i; | |
805 | ||
e253b396 | 806 | if (m->irqtype != mp_INT) |
2944e16b YL |
807 | return 0; |
808 | ||
e253b396 | 809 | if (m->irqflag != 0x0f) |
2944e16b YL |
810 | return 0; |
811 | ||
812 | /* not legacy */ | |
813 | ||
814 | for (i = 0; i < mp_irq_entries; i++) { | |
c2c21745 | 815 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
816 | continue; |
817 | ||
c2c21745 | 818 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
819 | continue; |
820 | ||
c2c21745 | 821 | if (mp_irqs[i].srcbus != m->srcbus) |
2944e16b | 822 | continue; |
c2c21745 | 823 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
2944e16b YL |
824 | continue; |
825 | if (irq_used[i]) { | |
826 | /* already claimed */ | |
827 | return -2; | |
828 | } | |
829 | irq_used[i] = 1; | |
830 | return i; | |
831 | } | |
832 | ||
833 | /* not found */ | |
834 | return -1; | |
835 | } | |
836 | ||
837 | #define SPARE_SLOT_NUM 20 | |
838 | ||
540d4e72 | 839 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
a6830278 | 840 | |
57592224 | 841 | static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) |
a6830278 JSR |
842 | { |
843 | int i; | |
844 | ||
845 | apic_printk(APIC_VERBOSE, "OLD "); | |
846 | print_MP_intsrc_info(m); | |
847 | ||
848 | i = get_MP_intsrc_index(m); | |
849 | if (i > 0) { | |
850 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
851 | apic_printk(APIC_VERBOSE, "NEW "); | |
852 | print_mp_irq_info(&mp_irqs[i]); | |
853 | return; | |
854 | } | |
855 | if (!i) { | |
856 | /* legacy, do nothing */ | |
857 | return; | |
858 | } | |
859 | if (*nr_m_spare < SPARE_SLOT_NUM) { | |
860 | /* | |
861 | * not found (-1), or duplicated (-2) are invalid entries, | |
862 | * we need to use the slot later | |
863 | */ | |
864 | m_spare[*nr_m_spare] = m; | |
865 | *nr_m_spare += 1; | |
866 | } | |
867 | } | |
868 | #else /* CONFIG_X86_IO_APIC */ | |
57592224 RM |
869 | static |
870 | inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} | |
a6830278 JSR |
871 | #endif /* CONFIG_X86_IO_APIC */ |
872 | ||
ee214558 YL |
873 | static int |
874 | check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) | |
a6830278 | 875 | { |
ee214558 YL |
876 | int ret = 0; |
877 | ||
878 | if (!mpc_new_phys || count <= mpc_new_length) { | |
879 | WARN(1, "update_mptable: No spare slots (length: %x)\n", count); | |
880 | return -1; | |
a6830278 JSR |
881 | } |
882 | ||
ee214558 | 883 | return ret; |
a6830278 | 884 | } |
2944e16b | 885 | |
f29521e4 | 886 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
887 | unsigned long mpc_new_phys, |
888 | unsigned long mpc_new_length) | |
889 | { | |
890 | #ifdef CONFIG_X86_IO_APIC | |
891 | int i; | |
2944e16b | 892 | #endif |
2944e16b | 893 | int count = sizeof(*mpc); |
a6830278 | 894 | int nr_m_spare = 0; |
2944e16b YL |
895 | unsigned char *mpt = ((unsigned char *)mpc) + count; |
896 | ||
6c65da50 JSR |
897 | printk(KERN_INFO "mpc_length %x\n", mpc->length); |
898 | while (count < mpc->length) { | |
2944e16b YL |
899 | switch (*mpt) { |
900 | case MP_PROCESSOR: | |
a6830278 JSR |
901 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
902 | break; | |
2944e16b | 903 | case MP_BUS: |
a6830278 JSR |
904 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
905 | break; | |
2944e16b | 906 | case MP_IOAPIC: |
a6830278 JSR |
907 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
908 | break; | |
2944e16b | 909 | case MP_INTSRC: |
c58603e8 | 910 | check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); |
a6830278 JSR |
911 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
912 | break; | |
2944e16b | 913 | case MP_LINTSRC: |
a6830278 JSR |
914 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
915 | break; | |
2944e16b YL |
916 | default: |
917 | /* wrong mptable */ | |
5a5737ea | 918 | smp_dump_mptable(mpc, mpt); |
2944e16b YL |
919 | goto out; |
920 | } | |
921 | } | |
922 | ||
923 | #ifdef CONFIG_X86_IO_APIC | |
924 | for (i = 0; i < mp_irq_entries; i++) { | |
925 | if (irq_used[i]) | |
926 | continue; | |
927 | ||
c2c21745 | 928 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
929 | continue; |
930 | ||
c2c21745 | 931 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
932 | continue; |
933 | ||
934 | if (nr_m_spare > 0) { | |
82034d6f | 935 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); |
2944e16b YL |
936 | nr_m_spare--; |
937 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
938 | m_spare[nr_m_spare] = NULL; | |
939 | } else { | |
540d4e72 JSR |
940 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
941 | count += sizeof(struct mpc_intsrc); | |
ee214558 | 942 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) |
a6830278 | 943 | goto out; |
2944e16b | 944 | assign_to_mpc_intsrc(&mp_irqs[i], m); |
6c65da50 | 945 | mpc->length = count; |
540d4e72 | 946 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
947 | } |
948 | print_mp_irq_info(&mp_irqs[i]); | |
949 | } | |
950 | #endif | |
951 | out: | |
952 | /* update checksum */ | |
6c65da50 JSR |
953 | mpc->checksum = 0; |
954 | mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
955 | |
956 | return 0; | |
957 | } | |
958 | ||
fcfa146e YL |
959 | static int __initdata enable_update_mptable; |
960 | ||
2944e16b YL |
961 | static int __init update_mptable_setup(char *str) |
962 | { | |
963 | enable_update_mptable = 1; | |
964 | return 0; | |
965 | } | |
966 | early_param("update_mptable", update_mptable_setup); | |
967 | ||
968 | static unsigned long __initdata mpc_new_phys; | |
969 | static unsigned long mpc_new_length __initdata = 4096; | |
970 | ||
971 | /* alloc_mptable or alloc_mptable=4k */ | |
972 | static int __initdata alloc_mptable; | |
973 | static int __init parse_alloc_mptable_opt(char *p) | |
974 | { | |
975 | enable_update_mptable = 1; | |
976 | alloc_mptable = 1; | |
977 | if (!p) | |
978 | return 0; | |
979 | mpc_new_length = memparse(p, &p); | |
980 | return 0; | |
981 | } | |
982 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
983 | ||
984 | void __init early_reserve_e820_mpc_new(void) | |
985 | { | |
986 | if (enable_update_mptable && alloc_mptable) { | |
987 | u64 startt = 0; | |
988 | #ifdef CONFIG_X86_TRAMPOLINE | |
989 | startt = TRAMPOLINE_BASE; | |
990 | #endif | |
991 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); | |
992 | } | |
993 | } | |
994 | ||
995 | static int __init update_mp_table(void) | |
996 | { | |
997 | char str[16]; | |
998 | char oem[10]; | |
41401db6 | 999 | struct mpf_intel *mpf; |
f29521e4 | 1000 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
1001 | |
1002 | if (!enable_update_mptable) | |
1003 | return 0; | |
1004 | ||
1005 | mpf = mpf_found; | |
1006 | if (!mpf) | |
1007 | return 0; | |
1008 | ||
1009 | /* | |
1010 | * Now see if we need to go further. | |
1011 | */ | |
1eb1b3b6 | 1012 | if (mpf->feature1 != 0) |
2944e16b YL |
1013 | return 0; |
1014 | ||
1eb1b3b6 | 1015 | if (!mpf->physptr) |
2944e16b YL |
1016 | return 0; |
1017 | ||
1eb1b3b6 | 1018 | mpc = phys_to_virt(mpf->physptr); |
2944e16b YL |
1019 | |
1020 | if (!smp_check_mpc(mpc, oem, str)) | |
1021 | return 0; | |
1022 | ||
ba1511bf | 1023 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1eb1b3b6 | 1024 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
2944e16b | 1025 | |
6c65da50 | 1026 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
2944e16b YL |
1027 | mpc_new_phys = 0; |
1028 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
1029 | mpc_new_length); | |
1030 | } | |
1031 | ||
1032 | if (!mpc_new_phys) { | |
1033 | unsigned char old, new; | |
1034 | /* check if we can change the postion */ | |
6c65da50 JSR |
1035 | mpc->checksum = 0; |
1036 | old = mpf_checksum((unsigned char *)mpc, mpc->length); | |
1037 | mpc->checksum = 0xff; | |
1038 | new = mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
1039 | if (old == new) { |
1040 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
1041 | return 0; | |
1042 | } | |
1043 | printk(KERN_INFO "use in-positon replacing\n"); | |
1044 | } else { | |
1eb1b3b6 | 1045 | mpf->physptr = mpc_new_phys; |
2944e16b | 1046 | mpc_new = phys_to_virt(mpc_new_phys); |
6c65da50 | 1047 | memcpy(mpc_new, mpc, mpc->length); |
2944e16b YL |
1048 | mpc = mpc_new; |
1049 | /* check if we can modify that */ | |
1eb1b3b6 | 1050 | if (mpc_new_phys - mpf->physptr) { |
41401db6 | 1051 | struct mpf_intel *mpf_new; |
2944e16b YL |
1052 | /* steal 16 bytes from [0, 1k) */ |
1053 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
1054 | mpf_new = phys_to_virt(0x400 - 16); | |
1055 | memcpy(mpf_new, mpf, 16); | |
1056 | mpf = mpf_new; | |
1eb1b3b6 | 1057 | mpf->physptr = mpc_new_phys; |
2944e16b | 1058 | } |
1eb1b3b6 JSR |
1059 | mpf->checksum = 0; |
1060 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
1061 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); | |
2944e16b YL |
1062 | } |
1063 | ||
1064 | /* | |
1065 | * only replace the one with mp_INT and | |
1066 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
1067 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
1068 | * may need pci=routeirq for all coverage | |
1069 | */ | |
1070 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
1071 | ||
1072 | return 0; | |
1073 | } | |
1074 | ||
1075 | late_initcall(update_mp_table); |