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Commit | Line | Data |
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1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
87c6fe26 | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
8f47e163 | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb | 19 | #include <linux/smp.h> |
1da177e4 | 20 | |
1da177e4 LT |
21 | #include <asm/mtrr.h> |
22 | #include <asm/mpspec.h> | |
85bdddec | 23 | #include <asm/pgalloc.h> |
1da177e4 | 24 | #include <asm/io_apic.h> |
85bdddec | 25 | #include <asm/proto.h> |
ce3fe6b2 | 26 | #include <asm/bios_ebda.h> |
2944e16b YL |
27 | #include <asm/e820.h> |
28 | #include <asm/trampoline.h> | |
3c9cb6de | 29 | #include <asm/setup.h> |
4884d8e6 | 30 | #include <asm/smp.h> |
1da177e4 | 31 | |
7b6aa335 | 32 | #include <asm/apic.h> |
1da177e4 LT |
33 | /* |
34 | * Checksum an MP configuration block. | |
35 | */ | |
36 | ||
37 | static int __init mpf_checksum(unsigned char *mp, int len) | |
38 | { | |
39 | int sum = 0; | |
40 | ||
41 | while (len--) | |
42 | sum += *mp++; | |
43 | ||
44 | return sum & 0xFF; | |
45 | } | |
46 | ||
f4f21b71 | 47 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
48 | { |
49 | int apicid; | |
746f2244 | 50 | char *bootup_cpu = ""; |
c853c676 | 51 | |
c4563826 | 52 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 53 | disabled_cpus++; |
1da177e4 | 54 | return; |
7b1292e2 | 55 | } |
64898a8b YL |
56 | |
57 | if (x86_quirks->mpc_apic_id) | |
58 | apicid = x86_quirks->mpc_apic_id(m); | |
ab530e1f | 59 | else |
c4563826 | 60 | apicid = m->apicid; |
64898a8b | 61 | |
c4563826 | 62 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 63 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 64 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
65 | } |
66 | ||
c4563826 JSR |
67 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
68 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
69 | } |
70 | ||
85cc35fa | 71 | #ifdef CONFIG_X86_IO_APIC |
00fb8606 | 72 | static void __init MP_bus_info(struct mpc_bus *m) |
1da177e4 LT |
73 | { |
74 | char str[7]; | |
d4c715fa | 75 | memcpy(str, m->bustype, 6); |
1da177e4 LT |
76 | str[6] = 0; |
77 | ||
64898a8b YL |
78 | if (x86_quirks->mpc_oem_bus_info) |
79 | x86_quirks->mpc_oem_bus_info(m, str); | |
80 | else | |
d4c715fa | 81 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); |
1da177e4 | 82 | |
5e4edbb7 | 83 | #if MAX_MP_BUSSES < 256 |
d4c715fa | 84 | if (m->busid >= MAX_MP_BUSSES) { |
c0ec31ad | 85 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " |
4ef81297 | 86 | " is too large, max. supported is %d\n", |
d4c715fa | 87 | m->busid, str, MAX_MP_BUSSES - 1); |
c0ec31ad RD |
88 | return; |
89 | } | |
5e4edbb7 | 90 | #endif |
c0ec31ad | 91 | |
f8924e77 | 92 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
d4c715fa | 93 | set_bit(m->busid, mp_bus_not_pci); |
103ceffb | 94 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 95 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
f8924e77 AS |
96 | #endif |
97 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
64898a8b YL |
98 | if (x86_quirks->mpc_oem_pci_bus) |
99 | x86_quirks->mpc_oem_pci_bus(m); | |
100 | ||
d4c715fa | 101 | clear_bit(m->busid, mp_bus_not_pci); |
103ceffb | 102 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 103 | mp_bus_id_to_type[m->busid] = MP_BUS_PCI; |
4ef81297 | 104 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
d4c715fa | 105 | mp_bus_id_to_type[m->busid] = MP_BUS_EISA; |
4ef81297 | 106 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
d4c715fa | 107 | mp_bus_id_to_type[m->busid] = MP_BUS_MCA; |
c0a282c2 | 108 | #endif |
f8924e77 AS |
109 | } else |
110 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 111 | } |
61048c63 | 112 | |
857033a6 AS |
113 | static int bad_ioapic(unsigned long address) |
114 | { | |
115 | if (nr_ioapics >= MAX_IO_APICS) { | |
116 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
117 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
118 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
119 | } | |
120 | if (!address) { | |
121 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
122 | " found in table, skipping!\n"); | |
123 | return 1; | |
124 | } | |
125 | return 0; | |
126 | } | |
127 | ||
2b85b5fb | 128 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 129 | { |
5df82c7d | 130 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
131 | return; |
132 | ||
64883ab0 | 133 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 134 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 135 | |
5df82c7d | 136 | if (bad_ioapic(m->apicaddr)) |
1da177e4 | 137 | return; |
857033a6 | 138 | |
b5ba7e6d JSR |
139 | mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; |
140 | mp_ioapics[nr_ioapics].apicid = m->apicid; | |
141 | mp_ioapics[nr_ioapics].type = m->type; | |
142 | mp_ioapics[nr_ioapics].apicver = m->apicver; | |
143 | mp_ioapics[nr_ioapics].flags = m->flags; | |
1da177e4 LT |
144 | nr_ioapics++; |
145 | } | |
146 | ||
540d4e72 | 147 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 148 | { |
eeb0d7d1 | 149 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 150 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
151 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
152 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
153 | } |
154 | ||
c2c21745 | 155 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
2944e16b | 156 | { |
eeb0d7d1 | 157 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b | 158 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
c2c21745 JSR |
159 | mp_irq->irqtype, mp_irq->irqflag & 3, |
160 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, | |
161 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | |
2944e16b YL |
162 | } |
163 | ||
540d4e72 | 164 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
c2c21745 | 165 | struct mpc_intsrc *mp_irq) |
2944e16b | 166 | { |
c2c21745 JSR |
167 | mp_irq->dstapic = m->dstapic; |
168 | mp_irq->type = m->type; | |
169 | mp_irq->irqtype = m->irqtype; | |
170 | mp_irq->irqflag = m->irqflag; | |
171 | mp_irq->srcbus = m->srcbus; | |
172 | mp_irq->srcbusirq = m->srcbusirq; | |
173 | mp_irq->dstirq = m->dstirq; | |
2944e16b YL |
174 | } |
175 | ||
c2c21745 | 176 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
540d4e72 | 177 | struct mpc_intsrc *m) |
2944e16b | 178 | { |
c2c21745 JSR |
179 | m->dstapic = mp_irq->dstapic; |
180 | m->type = mp_irq->type; | |
181 | m->irqtype = mp_irq->irqtype; | |
182 | m->irqflag = mp_irq->irqflag; | |
183 | m->srcbus = mp_irq->srcbus; | |
184 | m->srcbusirq = mp_irq->srcbusirq; | |
185 | m->dstirq = mp_irq->dstirq; | |
2944e16b YL |
186 | } |
187 | ||
c2c21745 | 188 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
540d4e72 | 189 | struct mpc_intsrc *m) |
2944e16b | 190 | { |
c2c21745 | 191 | if (mp_irq->dstapic != m->dstapic) |
2944e16b | 192 | return 1; |
c2c21745 | 193 | if (mp_irq->type != m->type) |
2944e16b | 194 | return 2; |
c2c21745 | 195 | if (mp_irq->irqtype != m->irqtype) |
2944e16b | 196 | return 3; |
c2c21745 | 197 | if (mp_irq->irqflag != m->irqflag) |
2944e16b | 198 | return 4; |
c2c21745 | 199 | if (mp_irq->srcbus != m->srcbus) |
2944e16b | 200 | return 5; |
c2c21745 | 201 | if (mp_irq->srcbusirq != m->srcbusirq) |
2944e16b | 202 | return 6; |
c2c21745 | 203 | if (mp_irq->dstirq != m->dstirq) |
2944e16b YL |
204 | return 7; |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
540d4e72 | 209 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
210 | { |
211 | int i; | |
212 | ||
213 | print_MP_intsrc_info(m); | |
214 | ||
fcfa146e YL |
215 | for (i = 0; i < mp_irq_entries; i++) { |
216 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
217 | return; | |
218 | } | |
2944e16b YL |
219 | |
220 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
221 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
222 | panic("Max # of irq sources exceeded!!\n"); | |
223 | } | |
a6830278 JSR |
224 | #else /* CONFIG_X86_IO_APIC */ |
225 | static inline void __init MP_bus_info(struct mpc_bus *m) {} | |
226 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} | |
227 | static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} | |
228 | #endif /* CONFIG_X86_IO_APIC */ | |
1da177e4 | 229 | |
61048c63 | 230 | |
8fb2952b | 231 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 232 | { |
eeb0d7d1 | 233 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 234 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
235 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
236 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
237 | } |
238 | ||
1da177e4 LT |
239 | /* |
240 | * Read/parse the MPC | |
241 | */ | |
242 | ||
f29521e4 | 243 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 244 | { |
1da177e4 | 245 | |
6c65da50 | 246 | if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { |
e950bea8 | 247 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
6c65da50 JSR |
248 | mpc->signature[0], mpc->signature[1], |
249 | mpc->signature[2], mpc->signature[3]); | |
1da177e4 LT |
250 | return 0; |
251 | } | |
6c65da50 | 252 | if (mpf_checksum((unsigned char *)mpc, mpc->length)) { |
e950bea8 | 253 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
254 | return 0; |
255 | } | |
6c65da50 | 256 | if (mpc->spec != 0x01 && mpc->spec != 0x04) { |
e950bea8 | 257 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
6c65da50 | 258 | mpc->spec); |
1da177e4 LT |
259 | return 0; |
260 | } | |
6c65da50 | 261 | if (!mpc->lapic) { |
e950bea8 | 262 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
263 | return 0; |
264 | } | |
6c65da50 | 265 | memcpy(oem, mpc->oem, 8); |
4ef81297 | 266 | oem[8] = 0; |
11a62a05 | 267 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 268 | |
6c65da50 | 269 | memcpy(str, mpc->productid, 12); |
4ef81297 | 270 | str[12] = 0; |
1da177e4 | 271 | |
11a62a05 | 272 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 273 | |
6c65da50 | 274 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); |
1da177e4 | 275 | |
2944e16b YL |
276 | return 1; |
277 | } | |
278 | ||
a6830278 JSR |
279 | static void skip_entry(unsigned char **ptr, int *count, int size) |
280 | { | |
281 | *ptr += size; | |
282 | *count += size; | |
283 | } | |
284 | ||
f29521e4 | 285 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
286 | { |
287 | char str[16]; | |
288 | char oem[10]; | |
289 | ||
290 | int count = sizeof(*mpc); | |
291 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
292 | ||
293 | if (!smp_check_mpc(mpc, oem, str)) | |
294 | return 0; | |
295 | ||
296 | #ifdef CONFIG_X86_32 | |
9c764247 | 297 | generic_mps_oem_check(mpc, oem, str); |
2944e16b | 298 | #endif |
e950bea8 | 299 | /* save the local APIC address, it might be non-default */ |
1da177e4 | 300 | if (!acpi_lapic) |
6c65da50 | 301 | mp_lapic_addr = mpc->lapic; |
1da177e4 | 302 | |
888032cd AS |
303 | if (early) |
304 | return 1; | |
305 | ||
6c65da50 JSR |
306 | if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) { |
307 | struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr; | |
308 | x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize); | |
64898a8b YL |
309 | } |
310 | ||
1da177e4 | 311 | /* |
4ef81297 | 312 | * Now process the configuration blocks. |
1da177e4 | 313 | */ |
64898a8b YL |
314 | if (x86_quirks->mpc_record) |
315 | *x86_quirks->mpc_record = 0; | |
316 | ||
6c65da50 | 317 | while (count < mpc->length) { |
4ef81297 AS |
318 | switch (*mpt) { |
319 | case MP_PROCESSOR: | |
a6830278 JSR |
320 | /* ACPI may have already provided this data */ |
321 | if (!acpi_lapic) | |
322 | MP_processor_info((struct mpc_cpu *)&mpt); | |
323 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); | |
324 | break; | |
4ef81297 | 325 | case MP_BUS: |
a6830278 JSR |
326 | MP_bus_info((struct mpc_bus *)&mpt); |
327 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); | |
328 | break; | |
4ef81297 | 329 | case MP_IOAPIC: |
a6830278 JSR |
330 | MP_ioapic_info((struct mpc_ioapic *)&mpt); |
331 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); | |
332 | break; | |
4ef81297 | 333 | case MP_INTSRC: |
a6830278 JSR |
334 | MP_intsrc_info((struct mpc_intsrc *)&mpt); |
335 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); | |
336 | break; | |
4ef81297 | 337 | case MP_LINTSRC: |
a6830278 JSR |
338 | MP_lintsrc_info((struct mpc_lintsrc *)&mpt); |
339 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); | |
340 | break; | |
4ef81297 | 341 | default: |
711554db YL |
342 | /* wrong mptable */ |
343 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
344 | printk(KERN_ERR "type %x\n", *mpt); | |
345 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
6c65da50 JSR |
346 | 1, mpc, mpc->length, 1); |
347 | count = mpc->length; | |
711554db | 348 | break; |
1da177e4 | 349 | } |
64898a8b YL |
350 | if (x86_quirks->mpc_record) |
351 | (*x86_quirks->mpc_record)++; | |
1da177e4 | 352 | } |
e0da3364 | 353 | |
26f7ef14 YL |
354 | #ifdef CONFIG_X86_BIGSMP |
355 | generic_bigsmp_probe(); | |
e0da3364 YL |
356 | #endif |
357 | ||
72ce0165 IM |
358 | if (apic->setup_apic_routing) |
359 | apic->setup_apic_routing(); | |
360 | ||
1da177e4 | 361 | if (!num_processors) |
e950bea8 | 362 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
363 | return num_processors; |
364 | } | |
365 | ||
61048c63 AS |
366 | #ifdef CONFIG_X86_IO_APIC |
367 | ||
1da177e4 LT |
368 | static int __init ELCR_trigger(unsigned int irq) |
369 | { | |
370 | unsigned int port; | |
371 | ||
372 | port = 0x4d0 + (irq >> 3); | |
373 | return (inb(port) >> (irq & 7)) & 1; | |
374 | } | |
375 | ||
376 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
377 | { | |
540d4e72 | 378 | struct mpc_intsrc intsrc; |
1da177e4 LT |
379 | int i; |
380 | int ELCR_fallback = 0; | |
381 | ||
e253b396 JSR |
382 | intsrc.type = MP_INTSRC; |
383 | intsrc.irqflag = 0; /* conforming */ | |
384 | intsrc.srcbus = 0; | |
b5ba7e6d | 385 | intsrc.dstapic = mp_ioapics[0].apicid; |
1da177e4 | 386 | |
e253b396 | 387 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
388 | |
389 | /* | |
390 | * If true, we have an ISA/PCI system with no IRQ entries | |
391 | * in the MP table. To prevent the PCI interrupts from being set up | |
392 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
393 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
394 | * never be level sensitive, so we simply see if the ELCR agrees. | |
395 | * If it does, we assume it's valid. | |
396 | */ | |
397 | if (mpc_default_type == 5) { | |
62441bf1 AS |
398 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
399 | "falling back to ELCR\n"); | |
1da177e4 | 400 | |
62441bf1 AS |
401 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
402 | ELCR_trigger(13)) | |
403 | printk(KERN_ERR "ELCR contains invalid data... " | |
404 | "not using ELCR\n"); | |
1da177e4 | 405 | else { |
4ef81297 AS |
406 | printk(KERN_INFO |
407 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
408 | ELCR_fallback = 1; |
409 | } | |
410 | } | |
411 | ||
412 | for (i = 0; i < 16; i++) { | |
413 | switch (mpc_default_type) { | |
414 | case 2: | |
415 | if (i == 0 || i == 13) | |
416 | continue; /* IRQ0 & IRQ13 not connected */ | |
417 | /* fall through */ | |
418 | default: | |
419 | if (i == 2) | |
420 | continue; /* IRQ2 is never connected */ | |
421 | } | |
422 | ||
423 | if (ELCR_fallback) { | |
424 | /* | |
425 | * If the ELCR indicates a level-sensitive interrupt, we | |
426 | * copy that information over to the MP table in the | |
427 | * irqflag field (level sensitive, active high polarity). | |
428 | */ | |
429 | if (ELCR_trigger(i)) | |
e253b396 | 430 | intsrc.irqflag = 13; |
1da177e4 | 431 | else |
e253b396 | 432 | intsrc.irqflag = 0; |
1da177e4 LT |
433 | } |
434 | ||
e253b396 JSR |
435 | intsrc.srcbusirq = i; |
436 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
437 | MP_intsrc_info(&intsrc); |
438 | } | |
439 | ||
e253b396 JSR |
440 | intsrc.irqtype = mp_ExtINT; |
441 | intsrc.srcbusirq = 0; | |
442 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
443 | MP_intsrc_info(&intsrc); |
444 | } | |
445 | ||
61048c63 | 446 | |
39e00fe2 | 447 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 448 | { |
2b85b5fb | 449 | struct mpc_ioapic ioapic; |
00fb8606 | 450 | struct mpc_bus bus; |
1da177e4 | 451 | |
d4c715fa JSR |
452 | bus.type = MP_BUS; |
453 | bus.busid = 0; | |
1da177e4 | 454 | switch (mpc_default_type) { |
4ef81297 | 455 | default: |
62441bf1 | 456 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
457 | mpc_default_type); |
458 | /* fall through */ | |
459 | case 1: | |
460 | case 5: | |
d4c715fa | 461 | memcpy(bus.bustype, "ISA ", 6); |
4ef81297 AS |
462 | break; |
463 | case 2: | |
464 | case 6: | |
465 | case 3: | |
d4c715fa | 466 | memcpy(bus.bustype, "EISA ", 6); |
4ef81297 AS |
467 | break; |
468 | case 4: | |
469 | case 7: | |
d4c715fa | 470 | memcpy(bus.bustype, "MCA ", 6); |
1da177e4 LT |
471 | } |
472 | MP_bus_info(&bus); | |
473 | if (mpc_default_type > 4) { | |
d4c715fa JSR |
474 | bus.busid = 1; |
475 | memcpy(bus.bustype, "PCI ", 6); | |
1da177e4 LT |
476 | MP_bus_info(&bus); |
477 | } | |
478 | ||
5df82c7d JSR |
479 | ioapic.type = MP_IOAPIC; |
480 | ioapic.apicid = 2; | |
481 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
482 | ioapic.flags = MPC_APIC_USABLE; | |
483 | ioapic.apicaddr = 0xFEC00000; | |
1da177e4 LT |
484 | MP_ioapic_info(&ioapic); |
485 | ||
486 | /* | |
487 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
488 | */ | |
489 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
490 | } |
491 | #else | |
39e00fe2 | 492 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 493 | #endif |
85cc35fa TG |
494 | |
495 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
496 | { | |
f4f21b71 | 497 | struct mpc_cpu processor; |
8fb2952b | 498 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
499 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
500 | int i; | |
501 | ||
502 | /* | |
503 | * local APIC has default address | |
504 | */ | |
505 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
506 | ||
507 | /* | |
508 | * 2 CPUs, numbered 0 & 1. | |
509 | */ | |
c4563826 | 510 | processor.type = MP_PROCESSOR; |
85cc35fa | 511 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
512 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
513 | processor.cpuflag = CPU_ENABLED; | |
514 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 515 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
516 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
517 | processor.reserved[0] = 0; | |
518 | processor.reserved[1] = 0; | |
85cc35fa | 519 | for (i = 0; i < 2; i++) { |
c4563826 | 520 | processor.apicid = i; |
85cc35fa TG |
521 | MP_processor_info(&processor); |
522 | } | |
523 | ||
524 | construct_ioapic_table(mpc_default_type); | |
525 | ||
b5ced7cd JSR |
526 | lintsrc.type = MP_LINTSRC; |
527 | lintsrc.irqflag = 0; /* conforming */ | |
528 | lintsrc.srcbusid = 0; | |
529 | lintsrc.srcbusirq = 0; | |
530 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 531 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
532 | lintsrc.irqtype = linttypes[i]; |
533 | lintsrc.destapiclint = i; | |
1da177e4 LT |
534 | MP_lintsrc_info(&lintsrc); |
535 | } | |
536 | } | |
537 | ||
41401db6 | 538 | static struct mpf_intel *mpf_found; |
1da177e4 | 539 | |
8d4dd919 YL |
540 | static unsigned long __init get_mpc_size(unsigned long physptr) |
541 | { | |
542 | struct mpc_table *mpc; | |
543 | unsigned long size; | |
544 | ||
545 | mpc = early_ioremap(physptr, PAGE_SIZE); | |
546 | size = mpc->length; | |
547 | early_iounmap(mpc, PAGE_SIZE); | |
548 | apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); | |
549 | ||
550 | return size; | |
551 | } | |
552 | ||
1da177e4 LT |
553 | /* |
554 | * Scan the memory blocks for an SMP configuration block. | |
555 | */ | |
3b33553b | 556 | static void __init __get_smp_config(unsigned int early) |
1da177e4 | 557 | { |
41401db6 | 558 | struct mpf_intel *mpf = mpf_found; |
1da177e4 | 559 | |
69b88afa YL |
560 | if (!mpf) |
561 | return; | |
562 | ||
888032cd AS |
563 | if (acpi_lapic && early) |
564 | return; | |
69b88afa | 565 | |
1da177e4 | 566 | /* |
69b88afa YL |
567 | * MPS doesn't support hyperthreading, aka only have |
568 | * thread 0 apic id in MPS table | |
1da177e4 | 569 | */ |
69b88afa | 570 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 571 | return; |
1da177e4 | 572 | |
69b88afa YL |
573 | if (x86_quirks->mach_get_smp_config) { |
574 | if (x86_quirks->mach_get_smp_config(early)) | |
575 | return; | |
576 | } | |
9adc1386 | 577 | |
4ef81297 | 578 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
1eb1b3b6 | 579 | mpf->specification); |
b3e24164 | 580 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
1eb1b3b6 | 581 | if (mpf->feature2 & (1 << 7)) { |
1da177e4 LT |
582 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
583 | pic_mode = 1; | |
584 | } else { | |
585 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
586 | pic_mode = 0; | |
587 | } | |
4421b1c8 | 588 | #endif |
1da177e4 LT |
589 | /* |
590 | * Now see if we need to read further. | |
591 | */ | |
1eb1b3b6 | 592 | if (mpf->feature1 != 0) { |
888032cd AS |
593 | if (early) { |
594 | /* | |
595 | * local APIC has default address | |
596 | */ | |
597 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
598 | return; | |
599 | } | |
1da177e4 | 600 | |
4ef81297 | 601 | printk(KERN_INFO "Default MP configuration #%d\n", |
1eb1b3b6 JSR |
602 | mpf->feature1); |
603 | construct_default_ISA_mptable(mpf->feature1); | |
1da177e4 | 604 | |
1eb1b3b6 | 605 | } else if (mpf->physptr) { |
8d4dd919 YL |
606 | struct mpc_table *mpc; |
607 | unsigned long size; | |
1da177e4 | 608 | |
8d4dd919 YL |
609 | size = get_mpc_size(mpf->physptr); |
610 | mpc = early_ioremap(mpf->physptr, size); | |
1da177e4 LT |
611 | /* |
612 | * Read the physical hardware table. Anything here will | |
613 | * override the defaults. | |
614 | */ | |
8d4dd919 | 615 | if (!smp_read_mpc(mpc, early)) { |
bab4b27c | 616 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 617 | smp_found_config = 0; |
bab4b27c | 618 | #endif |
4ef81297 AS |
619 | printk(KERN_ERR |
620 | "BIOS bug, MP table errors detected!...\n"); | |
4421b1c8 AS |
621 | printk(KERN_ERR "... disabling SMP support. " |
622 | "(tell your hw vendor)\n"); | |
8d4dd919 | 623 | early_iounmap(mpc, size); |
1da177e4 LT |
624 | return; |
625 | } | |
8d4dd919 | 626 | early_iounmap(mpc, size); |
61048c63 | 627 | |
888032cd AS |
628 | if (early) |
629 | return; | |
61048c63 | 630 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
631 | /* |
632 | * If there are no explicit MP IRQ entries, then we are | |
633 | * broken. We set up most of the low 16 IO-APIC pins to | |
634 | * ISA defaults and hope it will work. | |
635 | */ | |
636 | if (!mp_irq_entries) { | |
00fb8606 | 637 | struct mpc_bus bus; |
1da177e4 | 638 | |
4421b1c8 AS |
639 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " |
640 | "using default mptable. " | |
641 | "(tell your hw vendor)\n"); | |
1da177e4 | 642 | |
d4c715fa JSR |
643 | bus.type = MP_BUS; |
644 | bus.busid = 0; | |
645 | memcpy(bus.bustype, "ISA ", 6); | |
1da177e4 LT |
646 | MP_bus_info(&bus); |
647 | ||
648 | construct_default_ioirq_mptable(0); | |
649 | } | |
61048c63 | 650 | #endif |
1da177e4 LT |
651 | } else |
652 | BUG(); | |
653 | ||
888032cd AS |
654 | if (!early) |
655 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
656 | /* |
657 | * Only use the first configuration found. | |
658 | */ | |
659 | } | |
660 | ||
888032cd AS |
661 | void __init early_get_smp_config(void) |
662 | { | |
663 | __get_smp_config(1); | |
664 | } | |
665 | ||
666 | void __init get_smp_config(void) | |
667 | { | |
668 | __get_smp_config(0); | |
669 | } | |
670 | ||
a6830278 JSR |
671 | static void smp_reserve_bootmem(struct mpf_intel *mpf) |
672 | { | |
673 | unsigned long size = get_mpc_size(mpf->physptr); | |
674 | #ifdef CONFIG_X86_32 | |
675 | /* | |
676 | * We cannot access to MPC table to compute table size yet, | |
677 | * as only few megabytes from the bottom is mapped now. | |
678 | * PC-9800's MPC table places on the very last of physical | |
679 | * memory; so that simply reserving PAGE_SIZE from mpf->physptr | |
680 | * yields BUG() in reserve_bootmem. | |
681 | * also need to make sure physptr is below than max_low_pfn | |
682 | * we don't need reserve the area above max_low_pfn | |
683 | */ | |
684 | unsigned long end = max_low_pfn * PAGE_SIZE; | |
685 | ||
686 | if (mpf->physptr < end) { | |
687 | if (mpf->physptr + size > end) | |
688 | size = end - mpf->physptr; | |
689 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
690 | } | |
691 | #else | |
692 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
693 | #endif | |
694 | } | |
695 | ||
888032cd AS |
696 | static int __init smp_scan_config(unsigned long base, unsigned long length, |
697 | unsigned reserve) | |
1da177e4 | 698 | { |
92fd4b7a | 699 | unsigned int *bp = phys_to_virt(base); |
41401db6 | 700 | struct mpf_intel *mpf; |
1da177e4 | 701 | |
eeb0d7d1 RH |
702 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
703 | bp, length); | |
5d47a271 | 704 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
705 | |
706 | while (length > 0) { | |
41401db6 | 707 | mpf = (struct mpf_intel *)bp; |
1da177e4 | 708 | if ((*bp == SMP_MAGIC_IDENT) && |
1eb1b3b6 | 709 | (mpf->length == 1) && |
4ef81297 | 710 | !mpf_checksum((unsigned char *)bp, 16) && |
1eb1b3b6 JSR |
711 | ((mpf->specification == 1) |
712 | || (mpf->specification == 4))) { | |
bab4b27c | 713 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 714 | smp_found_config = 1; |
bab4b27c | 715 | #endif |
92fd4b7a | 716 | mpf_found = mpf; |
b1f006b6 | 717 | |
ba1511bf JSR |
718 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
719 | mpf, (u64)virt_to_phys(mpf)); | |
b1f006b6 YL |
720 | |
721 | if (!reserve) | |
722 | return 1; | |
f6243239 | 723 | reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf), |
72a7fe39 | 724 | BOOTMEM_DEFAULT); |
a6830278 JSR |
725 | if (mpf->physptr) |
726 | smp_reserve_bootmem(mpf); | |
1da177e4 | 727 | |
d2dbf343 | 728 | return 1; |
1da177e4 LT |
729 | } |
730 | bp += 4; | |
731 | length -= 16; | |
732 | } | |
733 | return 0; | |
734 | } | |
735 | ||
3b33553b | 736 | static void __init __find_smp_config(unsigned int reserve) |
1da177e4 LT |
737 | { |
738 | unsigned int address; | |
739 | ||
3c9cb6de YL |
740 | if (x86_quirks->mach_find_smp_config) { |
741 | if (x86_quirks->mach_find_smp_config(reserve)) | |
3b33553b IM |
742 | return; |
743 | } | |
1da177e4 LT |
744 | /* |
745 | * FIXME: Linux assumes you have 640K of base ram.. | |
746 | * this continues the error... | |
747 | * | |
748 | * 1) Scan the bottom 1K for a signature | |
749 | * 2) Scan the top 1K of base RAM | |
750 | * 3) Scan the 64K of bios | |
751 | */ | |
888032cd AS |
752 | if (smp_scan_config(0x0, 0x400, reserve) || |
753 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
754 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
755 | return; |
756 | /* | |
757 | * If it is an SMP machine we should know now, unless the | |
758 | * configuration is in an EISA/MCA bus machine with an | |
759 | * extended bios data area. | |
760 | * | |
761 | * there is a real-mode segmented pointer pointing to the | |
762 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
763 | * | |
764 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
765 | * area, and as such this kind of SMP config may be less | |
766 | * trustworthy, simply because the SMP table may have been | |
767 | * stomped on during early boot. These loaders are buggy and | |
768 | * should be fixed. | |
769 | * | |
770 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
771 | */ | |
772 | ||
773 | address = get_bios_ebda(); | |
774 | if (address) | |
888032cd AS |
775 | smp_scan_config(address, 0x400, reserve); |
776 | } | |
777 | ||
778 | void __init early_find_smp_config(void) | |
779 | { | |
780 | __find_smp_config(0); | |
781 | } | |
782 | ||
783 | void __init find_smp_config(void) | |
784 | { | |
785 | __find_smp_config(1); | |
1da177e4 | 786 | } |
2944e16b YL |
787 | |
788 | #ifdef CONFIG_X86_IO_APIC | |
789 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
790 | ||
540d4e72 | 791 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
792 | { |
793 | int i; | |
794 | ||
e253b396 | 795 | if (m->irqtype != mp_INT) |
2944e16b YL |
796 | return 0; |
797 | ||
e253b396 | 798 | if (m->irqflag != 0x0f) |
2944e16b YL |
799 | return 0; |
800 | ||
801 | /* not legacy */ | |
802 | ||
803 | for (i = 0; i < mp_irq_entries; i++) { | |
c2c21745 | 804 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
805 | continue; |
806 | ||
c2c21745 | 807 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
808 | continue; |
809 | ||
c2c21745 | 810 | if (mp_irqs[i].srcbus != m->srcbus) |
2944e16b | 811 | continue; |
c2c21745 | 812 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
2944e16b YL |
813 | continue; |
814 | if (irq_used[i]) { | |
815 | /* already claimed */ | |
816 | return -2; | |
817 | } | |
818 | irq_used[i] = 1; | |
819 | return i; | |
820 | } | |
821 | ||
822 | /* not found */ | |
823 | return -1; | |
824 | } | |
825 | ||
826 | #define SPARE_SLOT_NUM 20 | |
827 | ||
540d4e72 | 828 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
a6830278 JSR |
829 | |
830 | static void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) | |
831 | { | |
832 | int i; | |
833 | ||
834 | apic_printk(APIC_VERBOSE, "OLD "); | |
835 | print_MP_intsrc_info(m); | |
836 | ||
837 | i = get_MP_intsrc_index(m); | |
838 | if (i > 0) { | |
839 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
840 | apic_printk(APIC_VERBOSE, "NEW "); | |
841 | print_mp_irq_info(&mp_irqs[i]); | |
842 | return; | |
843 | } | |
844 | if (!i) { | |
845 | /* legacy, do nothing */ | |
846 | return; | |
847 | } | |
848 | if (*nr_m_spare < SPARE_SLOT_NUM) { | |
849 | /* | |
850 | * not found (-1), or duplicated (-2) are invalid entries, | |
851 | * we need to use the slot later | |
852 | */ | |
853 | m_spare[*nr_m_spare] = m; | |
854 | *nr_m_spare += 1; | |
855 | } | |
856 | } | |
857 | #else /* CONFIG_X86_IO_APIC */ | |
858 | static inline void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} | |
859 | #endif /* CONFIG_X86_IO_APIC */ | |
860 | ||
861 | static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, | |
862 | int count) | |
863 | { | |
864 | if (!mpc_new_phys) { | |
865 | pr_info("No spare slots, try to append...take your risk, " | |
866 | "new mpc_length %x\n", count); | |
867 | } else { | |
868 | if (count <= mpc_new_length) | |
869 | pr_info("No spare slots, try to append..., " | |
870 | "new mpc_length %x\n", count); | |
871 | else { | |
872 | pr_err("mpc_new_length %lx is too small\n", | |
873 | mpc_new_length); | |
874 | return -1; | |
875 | } | |
876 | } | |
877 | ||
878 | return 0; | |
879 | } | |
2944e16b | 880 | |
f29521e4 | 881 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
882 | unsigned long mpc_new_phys, |
883 | unsigned long mpc_new_length) | |
884 | { | |
885 | #ifdef CONFIG_X86_IO_APIC | |
886 | int i; | |
2944e16b | 887 | #endif |
2944e16b | 888 | int count = sizeof(*mpc); |
a6830278 | 889 | int nr_m_spare = 0; |
2944e16b YL |
890 | unsigned char *mpt = ((unsigned char *)mpc) + count; |
891 | ||
6c65da50 JSR |
892 | printk(KERN_INFO "mpc_length %x\n", mpc->length); |
893 | while (count < mpc->length) { | |
2944e16b YL |
894 | switch (*mpt) { |
895 | case MP_PROCESSOR: | |
a6830278 JSR |
896 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
897 | break; | |
2944e16b | 898 | case MP_BUS: |
a6830278 JSR |
899 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
900 | break; | |
2944e16b | 901 | case MP_IOAPIC: |
a6830278 JSR |
902 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
903 | break; | |
2944e16b | 904 | case MP_INTSRC: |
a6830278 JSR |
905 | check_irq_src((struct mpc_intsrc *)&mpt, &nr_m_spare); |
906 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); | |
907 | break; | |
2944e16b | 908 | case MP_LINTSRC: |
a6830278 JSR |
909 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
910 | break; | |
2944e16b YL |
911 | default: |
912 | /* wrong mptable */ | |
913 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
914 | printk(KERN_ERR "type %x\n", *mpt); | |
915 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
6c65da50 | 916 | 1, mpc, mpc->length, 1); |
2944e16b YL |
917 | goto out; |
918 | } | |
919 | } | |
920 | ||
921 | #ifdef CONFIG_X86_IO_APIC | |
922 | for (i = 0; i < mp_irq_entries; i++) { | |
923 | if (irq_used[i]) | |
924 | continue; | |
925 | ||
c2c21745 | 926 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
927 | continue; |
928 | ||
c2c21745 | 929 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
930 | continue; |
931 | ||
932 | if (nr_m_spare > 0) { | |
82034d6f | 933 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); |
2944e16b YL |
934 | nr_m_spare--; |
935 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
936 | m_spare[nr_m_spare] = NULL; | |
937 | } else { | |
540d4e72 JSR |
938 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
939 | count += sizeof(struct mpc_intsrc); | |
a6830278 JSR |
940 | if (!check_slot(mpc_new_phys, mpc_new_length, count)) |
941 | goto out; | |
2944e16b | 942 | assign_to_mpc_intsrc(&mp_irqs[i], m); |
6c65da50 | 943 | mpc->length = count; |
540d4e72 | 944 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
945 | } |
946 | print_mp_irq_info(&mp_irqs[i]); | |
947 | } | |
948 | #endif | |
949 | out: | |
950 | /* update checksum */ | |
6c65da50 JSR |
951 | mpc->checksum = 0; |
952 | mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
953 | |
954 | return 0; | |
955 | } | |
956 | ||
fcfa146e YL |
957 | static int __initdata enable_update_mptable; |
958 | ||
2944e16b YL |
959 | static int __init update_mptable_setup(char *str) |
960 | { | |
961 | enable_update_mptable = 1; | |
962 | return 0; | |
963 | } | |
964 | early_param("update_mptable", update_mptable_setup); | |
965 | ||
966 | static unsigned long __initdata mpc_new_phys; | |
967 | static unsigned long mpc_new_length __initdata = 4096; | |
968 | ||
969 | /* alloc_mptable or alloc_mptable=4k */ | |
970 | static int __initdata alloc_mptable; | |
971 | static int __init parse_alloc_mptable_opt(char *p) | |
972 | { | |
973 | enable_update_mptable = 1; | |
974 | alloc_mptable = 1; | |
975 | if (!p) | |
976 | return 0; | |
977 | mpc_new_length = memparse(p, &p); | |
978 | return 0; | |
979 | } | |
980 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
981 | ||
982 | void __init early_reserve_e820_mpc_new(void) | |
983 | { | |
984 | if (enable_update_mptable && alloc_mptable) { | |
985 | u64 startt = 0; | |
986 | #ifdef CONFIG_X86_TRAMPOLINE | |
987 | startt = TRAMPOLINE_BASE; | |
988 | #endif | |
989 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); | |
990 | } | |
991 | } | |
992 | ||
993 | static int __init update_mp_table(void) | |
994 | { | |
995 | char str[16]; | |
996 | char oem[10]; | |
41401db6 | 997 | struct mpf_intel *mpf; |
f29521e4 | 998 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
999 | |
1000 | if (!enable_update_mptable) | |
1001 | return 0; | |
1002 | ||
1003 | mpf = mpf_found; | |
1004 | if (!mpf) | |
1005 | return 0; | |
1006 | ||
1007 | /* | |
1008 | * Now see if we need to go further. | |
1009 | */ | |
1eb1b3b6 | 1010 | if (mpf->feature1 != 0) |
2944e16b YL |
1011 | return 0; |
1012 | ||
1eb1b3b6 | 1013 | if (!mpf->physptr) |
2944e16b YL |
1014 | return 0; |
1015 | ||
1eb1b3b6 | 1016 | mpc = phys_to_virt(mpf->physptr); |
2944e16b YL |
1017 | |
1018 | if (!smp_check_mpc(mpc, oem, str)) | |
1019 | return 0; | |
1020 | ||
ba1511bf | 1021 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1eb1b3b6 | 1022 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
2944e16b | 1023 | |
6c65da50 | 1024 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
2944e16b YL |
1025 | mpc_new_phys = 0; |
1026 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
1027 | mpc_new_length); | |
1028 | } | |
1029 | ||
1030 | if (!mpc_new_phys) { | |
1031 | unsigned char old, new; | |
1032 | /* check if we can change the postion */ | |
6c65da50 JSR |
1033 | mpc->checksum = 0; |
1034 | old = mpf_checksum((unsigned char *)mpc, mpc->length); | |
1035 | mpc->checksum = 0xff; | |
1036 | new = mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
1037 | if (old == new) { |
1038 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
1039 | return 0; | |
1040 | } | |
1041 | printk(KERN_INFO "use in-positon replacing\n"); | |
1042 | } else { | |
1eb1b3b6 | 1043 | mpf->physptr = mpc_new_phys; |
2944e16b | 1044 | mpc_new = phys_to_virt(mpc_new_phys); |
6c65da50 | 1045 | memcpy(mpc_new, mpc, mpc->length); |
2944e16b YL |
1046 | mpc = mpc_new; |
1047 | /* check if we can modify that */ | |
1eb1b3b6 | 1048 | if (mpc_new_phys - mpf->physptr) { |
41401db6 | 1049 | struct mpf_intel *mpf_new; |
2944e16b YL |
1050 | /* steal 16 bytes from [0, 1k) */ |
1051 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
1052 | mpf_new = phys_to_virt(0x400 - 16); | |
1053 | memcpy(mpf_new, mpf, 16); | |
1054 | mpf = mpf_new; | |
1eb1b3b6 | 1055 | mpf->physptr = mpc_new_phys; |
2944e16b | 1056 | } |
1eb1b3b6 JSR |
1057 | mpf->checksum = 0; |
1058 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
1059 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); | |
2944e16b YL |
1060 | } |
1061 | ||
1062 | /* | |
1063 | * only replace the one with mp_INT and | |
1064 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
1065 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
1066 | * may need pci=routeirq for all coverage | |
1067 | */ | |
1068 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
1069 | ||
1070 | return 0; | |
1071 | } | |
1072 | ||
1073 | late_initcall(update_mp_table); |