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x86: rename all fields of mpc_lintsrc mpc_X to X
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1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb
JSR
19#include <linux/smp.h>
20#include <linux/acpi.h>
1da177e4 21
1da177e4
LT
22#include <asm/mtrr.h>
23#include <asm/mpspec.h>
85bdddec 24#include <asm/pgalloc.h>
1da177e4 25#include <asm/io_apic.h>
85bdddec 26#include <asm/proto.h>
ce3fe6b2 27#include <asm/bios_ebda.h>
2944e16b
YL
28#include <asm/e820.h>
29#include <asm/trampoline.h>
3c9cb6de 30#include <asm/setup.h>
1da177e4
LT
31
32#include <mach_apic.h>
85bdddec 33#ifdef CONFIG_X86_32
874c4fe3 34#include <mach_apicdef.h>
1da177e4 35#include <mach_mpparse.h>
85bdddec 36#endif
1da177e4 37
1da177e4
LT
38/*
39 * Checksum an MP configuration block.
40 */
41
42static int __init mpf_checksum(unsigned char *mp, int len)
43{
44 int sum = 0;
45
46 while (len--)
47 sum += *mp++;
48
49 return sum & 0xFF;
50}
51
f4f21b71 52static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
53{
54 int apicid;
746f2244 55 char *bootup_cpu = "";
c853c676 56
7b1292e2
GC
57 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
58 disabled_cpus++;
1da177e4 59 return;
7b1292e2 60 }
64898a8b
YL
61
62 if (x86_quirks->mpc_apic_id)
63 apicid = x86_quirks->mpc_apic_id(m);
ab530e1f
YL
64 else
65 apicid = m->mpc_apicid;
64898a8b 66
1da177e4 67 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
746f2244 68 bootup_cpu = " (Bootup-CPU)";
1da177e4 69 boot_cpu_physical_apicid = m->mpc_apicid;
1da177e4
LT
70 }
71
746f2244 72 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
c853c676 73 generic_processor_info(apicid, m->mpc_apicver);
1da177e4
LT
74}
75
85cc35fa 76#ifdef CONFIG_X86_IO_APIC
00fb8606 77static void __init MP_bus_info(struct mpc_bus *m)
1da177e4
LT
78{
79 char str[7];
1da177e4
LT
80 memcpy(str, m->mpc_bustype, 6);
81 str[6] = 0;
82
64898a8b
YL
83 if (x86_quirks->mpc_oem_bus_info)
84 x86_quirks->mpc_oem_bus_info(m, str);
85 else
eeb0d7d1 86 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->mpc_busid, str);
1da177e4 87
5e4edbb7 88#if MAX_MP_BUSSES < 256
c0ec31ad
RD
89 if (m->mpc_busid >= MAX_MP_BUSSES) {
90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297
AS
91 " is too large, max. supported is %d\n",
92 m->mpc_busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
93 return;
94 }
5e4edbb7 95#endif
c0ec31ad 96
f8924e77 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
103ceffb
JSR
98 set_bit(m->mpc_busid, mp_bus_not_pci);
99#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
f8924e77
AS
100 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
101#endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
64898a8b
YL
103 if (x86_quirks->mpc_oem_pci_bus)
104 x86_quirks->mpc_oem_pci_bus(m);
105
a6333c3c 106 clear_bit(m->mpc_busid, mp_bus_not_pci);
103ceffb 107#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
c0a282c2 108 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
4ef81297 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
9e0a2de2 110 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
4ef81297 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
1da177e4 112 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
c0a282c2 113#endif
f8924e77
AS
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 116}
85cc35fa 117#endif
1da177e4 118
61048c63
AS
119#ifdef CONFIG_X86_IO_APIC
120
857033a6
AS
121static int bad_ioapic(unsigned long address)
122{
123 if (nr_ioapics >= MAX_IO_APICS) {
124 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
125 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
126 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
127 }
128 if (!address) {
129 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
130 " found in table, skipping!\n");
131 return 1;
132 }
133 return 0;
134}
135
2b85b5fb 136static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4 137{
5df82c7d 138 if (!(m->flags & MPC_APIC_USABLE))
1da177e4
LT
139 return;
140
64883ab0 141 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
5df82c7d 142 m->apicid, m->apicver, m->apicaddr);
857033a6 143
5df82c7d 144 if (bad_ioapic(m->apicaddr))
1da177e4 145 return;
857033a6 146
5df82c7d
JSR
147 mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr;
148 mp_ioapics[nr_ioapics].mp_apicid = m->apicid;
149 mp_ioapics[nr_ioapics].mp_type = m->type;
150 mp_ioapics[nr_ioapics].mp_apicver = m->apicver;
151 mp_ioapics[nr_ioapics].mp_flags = m->flags;
1da177e4
LT
152 nr_ioapics++;
153}
154
540d4e72 155static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 156{
eeb0d7d1 157 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 158 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
4ef81297
AS
159 m->mpc_irqtype, m->mpc_irqflag & 3,
160 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
161 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
2944e16b
YL
162}
163
164static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
165{
eeb0d7d1 166 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b
YL
167 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
168 mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
169 (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
170 mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
171}
172
540d4e72 173static void __init assign_to_mp_irq(struct mpc_intsrc *m,
2944e16b
YL
174 struct mp_config_intsrc *mp_irq)
175{
176 mp_irq->mp_dstapic = m->mpc_dstapic;
177 mp_irq->mp_type = m->mpc_type;
178 mp_irq->mp_irqtype = m->mpc_irqtype;
179 mp_irq->mp_irqflag = m->mpc_irqflag;
180 mp_irq->mp_srcbus = m->mpc_srcbus;
181 mp_irq->mp_srcbusirq = m->mpc_srcbusirq;
182 mp_irq->mp_dstirq = m->mpc_dstirq;
183}
184
185static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
540d4e72 186 struct mpc_intsrc *m)
2944e16b
YL
187{
188 m->mpc_dstapic = mp_irq->mp_dstapic;
189 m->mpc_type = mp_irq->mp_type;
190 m->mpc_irqtype = mp_irq->mp_irqtype;
191 m->mpc_irqflag = mp_irq->mp_irqflag;
192 m->mpc_srcbus = mp_irq->mp_srcbus;
193 m->mpc_srcbusirq = mp_irq->mp_srcbusirq;
194 m->mpc_dstirq = mp_irq->mp_dstirq;
195}
196
fcfa146e 197static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
540d4e72 198 struct mpc_intsrc *m)
2944e16b
YL
199{
200 if (mp_irq->mp_dstapic != m->mpc_dstapic)
201 return 1;
202 if (mp_irq->mp_type != m->mpc_type)
203 return 2;
204 if (mp_irq->mp_irqtype != m->mpc_irqtype)
205 return 3;
206 if (mp_irq->mp_irqflag != m->mpc_irqflag)
207 return 4;
208 if (mp_irq->mp_srcbus != m->mpc_srcbus)
209 return 5;
210 if (mp_irq->mp_srcbusirq != m->mpc_srcbusirq)
211 return 6;
212 if (mp_irq->mp_dstirq != m->mpc_dstirq)
213 return 7;
214
215 return 0;
216}
217
540d4e72 218static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
219{
220 int i;
221
222 print_MP_intsrc_info(m);
223
fcfa146e
YL
224 for (i = 0; i < mp_irq_entries; i++) {
225 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
226 return;
227 }
2944e16b
YL
228
229 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
230 if (++mp_irq_entries == MAX_IRQ_SOURCES)
231 panic("Max # of irq sources exceeded!!\n");
232}
233
61048c63
AS
234#endif
235
8fb2952b 236static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 237{
eeb0d7d1 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
b5ced7cd
JSR
240 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
241 m->srcbusirq, m->destapic, m->destapiclint);
1da177e4
LT
242}
243
1da177e4
LT
244/*
245 * Read/parse the MPC
246 */
247
f29521e4 248static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 249{
1da177e4 250
4ef81297 251 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
e950bea8
AS
252 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
253 mpc->mpc_signature[0], mpc->mpc_signature[1],
254 mpc->mpc_signature[2], mpc->mpc_signature[3]);
1da177e4
LT
255 return 0;
256 }
4ef81297 257 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
e950bea8 258 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
259 return 0;
260 }
4ef81297 261 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
e950bea8 262 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
4ef81297 263 mpc->mpc_spec);
1da177e4
LT
264 return 0;
265 }
266 if (!mpc->mpc_lapic) {
e950bea8 267 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
268 return 0;
269 }
4ef81297
AS
270 memcpy(oem, mpc->mpc_oem, 8);
271 oem[8] = 0;
11a62a05 272 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 273
4ef81297
AS
274 memcpy(str, mpc->mpc_productid, 12);
275 str[12] = 0;
1da177e4 276
11a62a05 277 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 278
e950bea8 279 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
1da177e4 280
2944e16b
YL
281 return 1;
282}
283
f29521e4 284static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
285{
286 char str[16];
287 char oem[10];
288
289 int count = sizeof(*mpc);
290 unsigned char *mpt = ((unsigned char *)mpc) + count;
291
292 if (!smp_check_mpc(mpc, oem, str))
293 return 0;
294
295#ifdef CONFIG_X86_32
d49c4288
YL
296 /*
297 * need to make sure summit and es7000's mps_oem_check is safe to be
298 * called early via genericarch 's mps_oem_check
299 */
300 if (early) {
301#ifdef CONFIG_X86_NUMAQ
302 numaq_mps_oem_check(mpc, oem, str);
303#endif
304 } else
305 mps_oem_check(mpc, oem, str);
2944e16b 306#endif
e950bea8 307 /* save the local APIC address, it might be non-default */
1da177e4
LT
308 if (!acpi_lapic)
309 mp_lapic_addr = mpc->mpc_lapic;
310
888032cd
AS
311 if (early)
312 return 1;
313
64898a8b 314 if (mpc->mpc_oemptr && x86_quirks->smp_read_mpc_oem) {
b0e239ff 315 struct mpc_oemtable *oem_table = (void *)(long)mpc->mpc_oemptr;
64898a8b
YL
316 x86_quirks->smp_read_mpc_oem(oem_table, mpc->mpc_oemsize);
317 }
318
1da177e4 319 /*
4ef81297 320 * Now process the configuration blocks.
1da177e4 321 */
64898a8b
YL
322 if (x86_quirks->mpc_record)
323 *x86_quirks->mpc_record = 0;
324
1da177e4 325 while (count < mpc->mpc_length) {
4ef81297
AS
326 switch (*mpt) {
327 case MP_PROCESSOR:
1da177e4 328 {
f4f21b71 329 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
1da177e4
LT
330 /* ACPI may have already provided this data */
331 if (!acpi_lapic)
332 MP_processor_info(m);
333 mpt += sizeof(*m);
334 count += sizeof(*m);
335 break;
336 }
4ef81297 337 case MP_BUS:
1da177e4 338 {
00fb8606 339 struct mpc_bus *m = (struct mpc_bus *)mpt;
85cc35fa 340#ifdef CONFIG_X86_IO_APIC
1da177e4 341 MP_bus_info(m);
85cc35fa 342#endif
1da177e4
LT
343 mpt += sizeof(*m);
344 count += sizeof(*m);
345 break;
346 }
4ef81297 347 case MP_IOAPIC:
1da177e4 348 {
61048c63 349#ifdef CONFIG_X86_IO_APIC
2b85b5fb 350 struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
1da177e4 351 MP_ioapic_info(m);
61048c63 352#endif
2b85b5fb
JSR
353 mpt += sizeof(struct mpc_ioapic);
354 count += sizeof(struct mpc_ioapic);
1da177e4
LT
355 break;
356 }
4ef81297 357 case MP_INTSRC:
1da177e4 358 {
61048c63 359#ifdef CONFIG_X86_IO_APIC
540d4e72 360 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
1da177e4
LT
361
362 MP_intsrc_info(m);
61048c63 363#endif
540d4e72
JSR
364 mpt += sizeof(struct mpc_intsrc);
365 count += sizeof(struct mpc_intsrc);
1da177e4
LT
366 break;
367 }
4ef81297 368 case MP_LINTSRC:
1da177e4 369 {
8fb2952b
JSR
370 struct mpc_lintsrc *m =
371 (struct mpc_lintsrc *)mpt;
1da177e4 372 MP_lintsrc_info(m);
4ef81297
AS
373 mpt += sizeof(*m);
374 count += sizeof(*m);
1da177e4
LT
375 break;
376 }
4ef81297 377 default:
711554db
YL
378 /* wrong mptable */
379 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
380 printk(KERN_ERR "type %x\n", *mpt);
381 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
382 1, mpc, mpc->mpc_length, 1);
383 count = mpc->mpc_length;
384 break;
1da177e4 385 }
64898a8b
YL
386 if (x86_quirks->mpc_record)
387 (*x86_quirks->mpc_record)++;
1da177e4 388 }
e0da3364
YL
389
390#ifdef CONFIG_X86_GENERICARCH
391 generic_bigsmp_probe();
392#endif
393
6e1cb38a 394#ifdef CONFIG_X86_32
3c43f039 395 setup_apic_routing();
6e1cb38a 396#endif
1da177e4 397 if (!num_processors)
e950bea8 398 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
399 return num_processors;
400}
401
61048c63
AS
402#ifdef CONFIG_X86_IO_APIC
403
1da177e4
LT
404static int __init ELCR_trigger(unsigned int irq)
405{
406 unsigned int port;
407
408 port = 0x4d0 + (irq >> 3);
409 return (inb(port) >> (irq & 7)) & 1;
410}
411
412static void __init construct_default_ioirq_mptable(int mpc_default_type)
413{
540d4e72 414 struct mpc_intsrc intsrc;
1da177e4
LT
415 int i;
416 int ELCR_fallback = 0;
417
418 intsrc.mpc_type = MP_INTSRC;
4ef81297 419 intsrc.mpc_irqflag = 0; /* conforming */
1da177e4 420 intsrc.mpc_srcbus = 0;
ec2cd0a2 421 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
1da177e4
LT
422
423 intsrc.mpc_irqtype = mp_INT;
424
425 /*
426 * If true, we have an ISA/PCI system with no IRQ entries
427 * in the MP table. To prevent the PCI interrupts from being set up
428 * incorrectly, we try to use the ELCR. The sanity check to see if
429 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
430 * never be level sensitive, so we simply see if the ELCR agrees.
431 * If it does, we assume it's valid.
432 */
433 if (mpc_default_type == 5) {
62441bf1
AS
434 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
435 "falling back to ELCR\n");
1da177e4 436
62441bf1
AS
437 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
438 ELCR_trigger(13))
439 printk(KERN_ERR "ELCR contains invalid data... "
440 "not using ELCR\n");
1da177e4 441 else {
4ef81297
AS
442 printk(KERN_INFO
443 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
444 ELCR_fallback = 1;
445 }
446 }
447
448 for (i = 0; i < 16; i++) {
449 switch (mpc_default_type) {
450 case 2:
451 if (i == 0 || i == 13)
452 continue; /* IRQ0 & IRQ13 not connected */
453 /* fall through */
454 default:
455 if (i == 2)
456 continue; /* IRQ2 is never connected */
457 }
458
459 if (ELCR_fallback) {
460 /*
461 * If the ELCR indicates a level-sensitive interrupt, we
462 * copy that information over to the MP table in the
463 * irqflag field (level sensitive, active high polarity).
464 */
465 if (ELCR_trigger(i))
466 intsrc.mpc_irqflag = 13;
467 else
468 intsrc.mpc_irqflag = 0;
469 }
470
471 intsrc.mpc_srcbusirq = i;
4ef81297 472 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
473 MP_intsrc_info(&intsrc);
474 }
475
476 intsrc.mpc_irqtype = mp_ExtINT;
477 intsrc.mpc_srcbusirq = 0;
4ef81297 478 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
479 MP_intsrc_info(&intsrc);
480}
481
61048c63 482
39e00fe2 483static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 484{
2b85b5fb 485 struct mpc_ioapic ioapic;
00fb8606 486 struct mpc_bus bus;
1da177e4
LT
487
488 bus.mpc_type = MP_BUS;
489 bus.mpc_busid = 0;
490 switch (mpc_default_type) {
4ef81297 491 default:
62441bf1 492 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
493 mpc_default_type);
494 /* fall through */
495 case 1:
496 case 5:
497 memcpy(bus.mpc_bustype, "ISA ", 6);
498 break;
499 case 2:
500 case 6:
501 case 3:
502 memcpy(bus.mpc_bustype, "EISA ", 6);
503 break;
504 case 4:
505 case 7:
506 memcpy(bus.mpc_bustype, "MCA ", 6);
1da177e4
LT
507 }
508 MP_bus_info(&bus);
509 if (mpc_default_type > 4) {
510 bus.mpc_busid = 1;
511 memcpy(bus.mpc_bustype, "PCI ", 6);
512 MP_bus_info(&bus);
513 }
514
5df82c7d
JSR
515 ioapic.type = MP_IOAPIC;
516 ioapic.apicid = 2;
517 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
518 ioapic.flags = MPC_APIC_USABLE;
519 ioapic.apicaddr = 0xFEC00000;
1da177e4
LT
520 MP_ioapic_info(&ioapic);
521
522 /*
523 * We set up most of the low 16 IO-APIC pins according to MPS rules.
524 */
525 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
526}
527#else
39e00fe2 528static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 529#endif
85cc35fa
TG
530
531static inline void __init construct_default_ISA_mptable(int mpc_default_type)
532{
f4f21b71 533 struct mpc_cpu processor;
8fb2952b 534 struct mpc_lintsrc lintsrc;
85cc35fa
TG
535 int linttypes[2] = { mp_ExtINT, mp_NMI };
536 int i;
537
538 /*
539 * local APIC has default address
540 */
541 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
542
543 /*
544 * 2 CPUs, numbered 0 & 1.
545 */
546 processor.mpc_type = MP_PROCESSOR;
547 /* Either an integrated APIC or a discrete 82489DX. */
548 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
549 processor.mpc_cpuflag = CPU_ENABLED;
550 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
551 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
552 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
553 processor.mpc_reserved[0] = 0;
554 processor.mpc_reserved[1] = 0;
555 for (i = 0; i < 2; i++) {
556 processor.mpc_apicid = i;
557 MP_processor_info(&processor);
558 }
559
560 construct_ioapic_table(mpc_default_type);
561
b5ced7cd
JSR
562 lintsrc.type = MP_LINTSRC;
563 lintsrc.irqflag = 0; /* conforming */
564 lintsrc.srcbusid = 0;
565 lintsrc.srcbusirq = 0;
566 lintsrc.destapic = MP_APIC_ALL;
1da177e4 567 for (i = 0; i < 2; i++) {
b5ced7cd
JSR
568 lintsrc.irqtype = linttypes[i];
569 lintsrc.destapiclint = i;
1da177e4
LT
570 MP_lintsrc_info(&lintsrc);
571 }
572}
573
574static struct intel_mp_floating *mpf_found;
575
576/*
577 * Scan the memory blocks for an SMP configuration block.
578 */
3b33553b 579static void __init __get_smp_config(unsigned int early)
1da177e4
LT
580{
581 struct intel_mp_floating *mpf = mpf_found;
582
69b88afa
YL
583 if (!mpf)
584 return;
585
888032cd
AS
586 if (acpi_lapic && early)
587 return;
69b88afa 588
1da177e4 589 /*
69b88afa
YL
590 * MPS doesn't support hyperthreading, aka only have
591 * thread 0 apic id in MPS table
1da177e4 592 */
69b88afa 593 if (acpi_lapic && acpi_ioapic)
1da177e4 594 return;
1da177e4 595
69b88afa
YL
596 if (x86_quirks->mach_get_smp_config) {
597 if (x86_quirks->mach_get_smp_config(early))
598 return;
599 }
9adc1386 600
4ef81297
AS
601 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
602 mpf->mpf_specification);
b3e24164 603#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
4ef81297 604 if (mpf->mpf_feature2 & (1 << 7)) {
1da177e4
LT
605 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
606 pic_mode = 1;
607 } else {
608 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
609 pic_mode = 0;
610 }
4421b1c8 611#endif
1da177e4
LT
612 /*
613 * Now see if we need to read further.
614 */
615 if (mpf->mpf_feature1 != 0) {
888032cd
AS
616 if (early) {
617 /*
618 * local APIC has default address
619 */
620 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
621 return;
622 }
1da177e4 623
4ef81297
AS
624 printk(KERN_INFO "Default MP configuration #%d\n",
625 mpf->mpf_feature1);
1da177e4
LT
626 construct_default_ISA_mptable(mpf->mpf_feature1);
627
628 } else if (mpf->mpf_physptr) {
629
630 /*
631 * Read the physical hardware table. Anything here will
632 * override the defaults.
633 */
888032cd 634 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
bab4b27c 635#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 636 smp_found_config = 0;
bab4b27c 637#endif
4ef81297
AS
638 printk(KERN_ERR
639 "BIOS bug, MP table errors detected!...\n");
4421b1c8
AS
640 printk(KERN_ERR "... disabling SMP support. "
641 "(tell your hw vendor)\n");
1da177e4
LT
642 return;
643 }
61048c63 644
888032cd
AS
645 if (early)
646 return;
61048c63 647#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
648 /*
649 * If there are no explicit MP IRQ entries, then we are
650 * broken. We set up most of the low 16 IO-APIC pins to
651 * ISA defaults and hope it will work.
652 */
653 if (!mp_irq_entries) {
00fb8606 654 struct mpc_bus bus;
1da177e4 655
4421b1c8
AS
656 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
657 "using default mptable. "
658 "(tell your hw vendor)\n");
1da177e4
LT
659
660 bus.mpc_type = MP_BUS;
661 bus.mpc_busid = 0;
662 memcpy(bus.mpc_bustype, "ISA ", 6);
663 MP_bus_info(&bus);
664
665 construct_default_ioirq_mptable(0);
666 }
61048c63 667#endif
1da177e4
LT
668 } else
669 BUG();
670
888032cd
AS
671 if (!early)
672 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
673 /*
674 * Only use the first configuration found.
675 */
676}
677
888032cd
AS
678void __init early_get_smp_config(void)
679{
680 __get_smp_config(1);
681}
682
683void __init get_smp_config(void)
684{
685 __get_smp_config(0);
686}
687
688static int __init smp_scan_config(unsigned long base, unsigned long length,
689 unsigned reserve)
1da177e4 690{
92fd4b7a 691 unsigned int *bp = phys_to_virt(base);
1da177e4
LT
692 struct intel_mp_floating *mpf;
693
eeb0d7d1
RH
694 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
695 bp, length);
5d47a271 696 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
697
698 while (length > 0) {
699 mpf = (struct intel_mp_floating *)bp;
700 if ((*bp == SMP_MAGIC_IDENT) &&
4ef81297
AS
701 (mpf->mpf_length == 1) &&
702 !mpf_checksum((unsigned char *)bp, 16) &&
703 ((mpf->mpf_specification == 1)
704 || (mpf->mpf_specification == 4))) {
bab4b27c 705#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 706 smp_found_config = 1;
bab4b27c 707#endif
92fd4b7a 708 mpf_found = mpf;
b1f006b6 709
e91a3b43 710 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
4ef81297 711 mpf, virt_to_phys(mpf));
b1f006b6
YL
712
713 if (!reserve)
714 return 1;
d2dbf343 715 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
72a7fe39 716 BOOTMEM_DEFAULT);
1da177e4 717 if (mpf->mpf_physptr) {
d2dbf343
YL
718 unsigned long size = PAGE_SIZE;
719#ifdef CONFIG_X86_32
1da177e4
LT
720 /*
721 * We cannot access to MPC table to compute
722 * table size yet, as only few megabytes from
723 * the bottom is mapped now.
724 * PC-9800's MPC table places on the very last
725 * of physical memory; so that simply reserving
726 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
727 * in reserve_bootmem.
728 */
1da177e4
LT
729 unsigned long end = max_low_pfn * PAGE_SIZE;
730 if (mpf->mpf_physptr + size > end)
731 size = end - mpf->mpf_physptr;
d2dbf343
YL
732#endif
733 reserve_bootmem_generic(mpf->mpf_physptr, size,
72a7fe39 734 BOOTMEM_DEFAULT);
1da177e4
LT
735 }
736
d2dbf343 737 return 1;
1da177e4
LT
738 }
739 bp += 4;
740 length -= 16;
741 }
742 return 0;
743}
744
3b33553b 745static void __init __find_smp_config(unsigned int reserve)
1da177e4
LT
746{
747 unsigned int address;
748
3c9cb6de
YL
749 if (x86_quirks->mach_find_smp_config) {
750 if (x86_quirks->mach_find_smp_config(reserve))
3b33553b
IM
751 return;
752 }
1da177e4
LT
753 /*
754 * FIXME: Linux assumes you have 640K of base ram..
755 * this continues the error...
756 *
757 * 1) Scan the bottom 1K for a signature
758 * 2) Scan the top 1K of base RAM
759 * 3) Scan the 64K of bios
760 */
888032cd
AS
761 if (smp_scan_config(0x0, 0x400, reserve) ||
762 smp_scan_config(639 * 0x400, 0x400, reserve) ||
763 smp_scan_config(0xF0000, 0x10000, reserve))
1da177e4
LT
764 return;
765 /*
766 * If it is an SMP machine we should know now, unless the
767 * configuration is in an EISA/MCA bus machine with an
768 * extended bios data area.
769 *
770 * there is a real-mode segmented pointer pointing to the
771 * 4K EBDA area at 0x40E, calculate and scan it here.
772 *
773 * NOTE! There are Linux loaders that will corrupt the EBDA
774 * area, and as such this kind of SMP config may be less
775 * trustworthy, simply because the SMP table may have been
776 * stomped on during early boot. These loaders are buggy and
777 * should be fixed.
778 *
779 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
780 */
781
782 address = get_bios_ebda();
783 if (address)
888032cd
AS
784 smp_scan_config(address, 0x400, reserve);
785}
786
787void __init early_find_smp_config(void)
788{
789 __find_smp_config(0);
790}
791
792void __init find_smp_config(void)
793{
794 __find_smp_config(1);
1da177e4 795}
2944e16b
YL
796
797#ifdef CONFIG_X86_IO_APIC
798static u8 __initdata irq_used[MAX_IRQ_SOURCES];
799
540d4e72 800static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
801{
802 int i;
803
804 if (m->mpc_irqtype != mp_INT)
805 return 0;
806
807 if (m->mpc_irqflag != 0x0f)
808 return 0;
809
810 /* not legacy */
811
812 for (i = 0; i < mp_irq_entries; i++) {
813 if (mp_irqs[i].mp_irqtype != mp_INT)
814 continue;
815
816 if (mp_irqs[i].mp_irqflag != 0x0f)
817 continue;
818
819 if (mp_irqs[i].mp_srcbus != m->mpc_srcbus)
820 continue;
821 if (mp_irqs[i].mp_srcbusirq != m->mpc_srcbusirq)
822 continue;
823 if (irq_used[i]) {
824 /* already claimed */
825 return -2;
826 }
827 irq_used[i] = 1;
828 return i;
829 }
830
831 /* not found */
832 return -1;
833}
834
835#define SPARE_SLOT_NUM 20
836
540d4e72 837static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
2944e16b
YL
838#endif
839
f29521e4 840static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
841 unsigned long mpc_new_phys,
842 unsigned long mpc_new_length)
843{
844#ifdef CONFIG_X86_IO_APIC
845 int i;
846 int nr_m_spare = 0;
847#endif
848
849 int count = sizeof(*mpc);
850 unsigned char *mpt = ((unsigned char *)mpc) + count;
851
852 printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length);
853 while (count < mpc->mpc_length) {
854 switch (*mpt) {
855 case MP_PROCESSOR:
856 {
f4f21b71 857 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
2944e16b
YL
858 mpt += sizeof(*m);
859 count += sizeof(*m);
860 break;
861 }
862 case MP_BUS:
863 {
00fb8606 864 struct mpc_bus *m = (struct mpc_bus *)mpt;
2944e16b
YL
865 mpt += sizeof(*m);
866 count += sizeof(*m);
867 break;
868 }
869 case MP_IOAPIC:
870 {
2b85b5fb
JSR
871 mpt += sizeof(struct mpc_ioapic);
872 count += sizeof(struct mpc_ioapic);
2944e16b
YL
873 break;
874 }
875 case MP_INTSRC:
876 {
877#ifdef CONFIG_X86_IO_APIC
540d4e72 878 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
2944e16b
YL
879
880 printk(KERN_INFO "OLD ");
881 print_MP_intsrc_info(m);
882 i = get_MP_intsrc_index(m);
883 if (i > 0) {
884 assign_to_mpc_intsrc(&mp_irqs[i], m);
885 printk(KERN_INFO "NEW ");
886 print_mp_irq_info(&mp_irqs[i]);
887 } else if (!i) {
888 /* legacy, do nothing */
889 } else if (nr_m_spare < SPARE_SLOT_NUM) {
890 /*
891 * not found (-1), or duplicated (-2)
892 * are invalid entries,
893 * we need to use the slot later
894 */
895 m_spare[nr_m_spare] = m;
896 nr_m_spare++;
897 }
898#endif
540d4e72
JSR
899 mpt += sizeof(struct mpc_intsrc);
900 count += sizeof(struct mpc_intsrc);
2944e16b
YL
901 break;
902 }
903 case MP_LINTSRC:
904 {
8fb2952b
JSR
905 struct mpc_lintsrc *m =
906 (struct mpc_lintsrc *)mpt;
2944e16b
YL
907 mpt += sizeof(*m);
908 count += sizeof(*m);
909 break;
910 }
911 default:
912 /* wrong mptable */
913 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
914 printk(KERN_ERR "type %x\n", *mpt);
915 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
916 1, mpc, mpc->mpc_length, 1);
917 goto out;
918 }
919 }
920
921#ifdef CONFIG_X86_IO_APIC
922 for (i = 0; i < mp_irq_entries; i++) {
923 if (irq_used[i])
924 continue;
925
926 if (mp_irqs[i].mp_irqtype != mp_INT)
927 continue;
928
929 if (mp_irqs[i].mp_irqflag != 0x0f)
930 continue;
931
932 if (nr_m_spare > 0) {
933 printk(KERN_INFO "*NEW* found ");
934 nr_m_spare--;
935 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
936 m_spare[nr_m_spare] = NULL;
937 } else {
540d4e72
JSR
938 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
939 count += sizeof(struct mpc_intsrc);
2944e16b
YL
940 if (!mpc_new_phys) {
941 printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
942 } else {
943 if (count <= mpc_new_length)
944 printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
945 else {
946 printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
947 goto out;
948 }
949 }
950 assign_to_mpc_intsrc(&mp_irqs[i], m);
951 mpc->mpc_length = count;
540d4e72 952 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
953 }
954 print_mp_irq_info(&mp_irqs[i]);
955 }
956#endif
957out:
958 /* update checksum */
959 mpc->mpc_checksum = 0;
960 mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc,
961 mpc->mpc_length);
962
963 return 0;
964}
965
fcfa146e
YL
966static int __initdata enable_update_mptable;
967
2944e16b
YL
968static int __init update_mptable_setup(char *str)
969{
970 enable_update_mptable = 1;
971 return 0;
972}
973early_param("update_mptable", update_mptable_setup);
974
975static unsigned long __initdata mpc_new_phys;
976static unsigned long mpc_new_length __initdata = 4096;
977
978/* alloc_mptable or alloc_mptable=4k */
979static int __initdata alloc_mptable;
980static int __init parse_alloc_mptable_opt(char *p)
981{
982 enable_update_mptable = 1;
983 alloc_mptable = 1;
984 if (!p)
985 return 0;
986 mpc_new_length = memparse(p, &p);
987 return 0;
988}
989early_param("alloc_mptable", parse_alloc_mptable_opt);
990
991void __init early_reserve_e820_mpc_new(void)
992{
993 if (enable_update_mptable && alloc_mptable) {
994 u64 startt = 0;
995#ifdef CONFIG_X86_TRAMPOLINE
996 startt = TRAMPOLINE_BASE;
997#endif
998 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
999 }
1000}
1001
1002static int __init update_mp_table(void)
1003{
1004 char str[16];
1005 char oem[10];
1006 struct intel_mp_floating *mpf;
f29521e4 1007 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
1008
1009 if (!enable_update_mptable)
1010 return 0;
1011
1012 mpf = mpf_found;
1013 if (!mpf)
1014 return 0;
1015
1016 /*
1017 * Now see if we need to go further.
1018 */
1019 if (mpf->mpf_feature1 != 0)
1020 return 0;
1021
1022 if (!mpf->mpf_physptr)
1023 return 0;
1024
1025 mpc = phys_to_virt(mpf->mpf_physptr);
1026
1027 if (!smp_check_mpc(mpc, oem, str))
1028 return 0;
1029
1030 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
1031 printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
1032
1033 if (mpc_new_phys && mpc->mpc_length > mpc_new_length) {
1034 mpc_new_phys = 0;
1035 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1036 mpc_new_length);
1037 }
1038
1039 if (!mpc_new_phys) {
1040 unsigned char old, new;
1041 /* check if we can change the postion */
1042 mpc->mpc_checksum = 0;
1043 old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1044 mpc->mpc_checksum = 0xff;
1045 new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1046 if (old == new) {
1047 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1048 return 0;
1049 }
1050 printk(KERN_INFO "use in-positon replacing\n");
1051 } else {
1052 mpf->mpf_physptr = mpc_new_phys;
1053 mpc_new = phys_to_virt(mpc_new_phys);
1054 memcpy(mpc_new, mpc, mpc->mpc_length);
1055 mpc = mpc_new;
1056 /* check if we can modify that */
1057 if (mpc_new_phys - mpf->mpf_physptr) {
1058 struct intel_mp_floating *mpf_new;
1059 /* steal 16 bytes from [0, 1k) */
1060 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1061 mpf_new = phys_to_virt(0x400 - 16);
1062 memcpy(mpf_new, mpf, 16);
1063 mpf = mpf_new;
1064 mpf->mpf_physptr = mpc_new_phys;
1065 }
1066 mpf->mpf_checksum = 0;
1067 mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
1068 printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
1069 }
1070
1071 /*
1072 * only replace the one with mp_INT and
1073 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1074 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1075 * may need pci=routeirq for all coverage
1076 */
1077 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1078
1079 return 0;
1080}
1081
1082late_initcall(update_mp_table);