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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
87c6fe26 | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
8f47e163 | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb | 19 | #include <linux/smp.h> |
1da177e4 | 20 | |
1da177e4 LT |
21 | #include <asm/mtrr.h> |
22 | #include <asm/mpspec.h> | |
85bdddec | 23 | #include <asm/pgalloc.h> |
1da177e4 | 24 | #include <asm/io_apic.h> |
85bdddec | 25 | #include <asm/proto.h> |
ce3fe6b2 | 26 | #include <asm/bios_ebda.h> |
2944e16b YL |
27 | #include <asm/e820.h> |
28 | #include <asm/trampoline.h> | |
3c9cb6de | 29 | #include <asm/setup.h> |
4884d8e6 | 30 | #include <asm/smp.h> |
1da177e4 | 31 | |
7b6aa335 | 32 | #include <asm/apic.h> |
1da177e4 LT |
33 | /* |
34 | * Checksum an MP configuration block. | |
35 | */ | |
36 | ||
37 | static int __init mpf_checksum(unsigned char *mp, int len) | |
38 | { | |
39 | int sum = 0; | |
40 | ||
41 | while (len--) | |
42 | sum += *mp++; | |
43 | ||
44 | return sum & 0xFF; | |
45 | } | |
46 | ||
f4f21b71 | 47 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
48 | { |
49 | int apicid; | |
746f2244 | 50 | char *bootup_cpu = ""; |
c853c676 | 51 | |
c4563826 | 52 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 53 | disabled_cpus++; |
1da177e4 | 54 | return; |
7b1292e2 | 55 | } |
64898a8b YL |
56 | |
57 | if (x86_quirks->mpc_apic_id) | |
58 | apicid = x86_quirks->mpc_apic_id(m); | |
ab530e1f | 59 | else |
c4563826 | 60 | apicid = m->apicid; |
64898a8b | 61 | |
c4563826 | 62 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 63 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 64 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
65 | } |
66 | ||
c4563826 JSR |
67 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
68 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
69 | } |
70 | ||
85cc35fa | 71 | #ifdef CONFIG_X86_IO_APIC |
00fb8606 | 72 | static void __init MP_bus_info(struct mpc_bus *m) |
1da177e4 LT |
73 | { |
74 | char str[7]; | |
d4c715fa | 75 | memcpy(str, m->bustype, 6); |
1da177e4 LT |
76 | str[6] = 0; |
77 | ||
64898a8b YL |
78 | if (x86_quirks->mpc_oem_bus_info) |
79 | x86_quirks->mpc_oem_bus_info(m, str); | |
80 | else | |
d4c715fa | 81 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); |
1da177e4 | 82 | |
5e4edbb7 | 83 | #if MAX_MP_BUSSES < 256 |
d4c715fa | 84 | if (m->busid >= MAX_MP_BUSSES) { |
c0ec31ad | 85 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " |
4ef81297 | 86 | " is too large, max. supported is %d\n", |
d4c715fa | 87 | m->busid, str, MAX_MP_BUSSES - 1); |
c0ec31ad RD |
88 | return; |
89 | } | |
5e4edbb7 | 90 | #endif |
c0ec31ad | 91 | |
f8924e77 | 92 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
d4c715fa | 93 | set_bit(m->busid, mp_bus_not_pci); |
103ceffb | 94 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 95 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
f8924e77 AS |
96 | #endif |
97 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
64898a8b YL |
98 | if (x86_quirks->mpc_oem_pci_bus) |
99 | x86_quirks->mpc_oem_pci_bus(m); | |
100 | ||
d4c715fa | 101 | clear_bit(m->busid, mp_bus_not_pci); |
103ceffb | 102 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 103 | mp_bus_id_to_type[m->busid] = MP_BUS_PCI; |
4ef81297 | 104 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
d4c715fa | 105 | mp_bus_id_to_type[m->busid] = MP_BUS_EISA; |
4ef81297 | 106 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
d4c715fa | 107 | mp_bus_id_to_type[m->busid] = MP_BUS_MCA; |
c0a282c2 | 108 | #endif |
f8924e77 AS |
109 | } else |
110 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 111 | } |
85cc35fa | 112 | #endif |
1da177e4 | 113 | |
61048c63 AS |
114 | #ifdef CONFIG_X86_IO_APIC |
115 | ||
857033a6 AS |
116 | static int bad_ioapic(unsigned long address) |
117 | { | |
118 | if (nr_ioapics >= MAX_IO_APICS) { | |
119 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
120 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
121 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
122 | } | |
123 | if (!address) { | |
124 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
125 | " found in table, skipping!\n"); | |
126 | return 1; | |
127 | } | |
128 | return 0; | |
129 | } | |
130 | ||
2b85b5fb | 131 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 132 | { |
5df82c7d | 133 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
134 | return; |
135 | ||
64883ab0 | 136 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 137 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 138 | |
5df82c7d | 139 | if (bad_ioapic(m->apicaddr)) |
1da177e4 | 140 | return; |
857033a6 | 141 | |
b5ba7e6d JSR |
142 | mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; |
143 | mp_ioapics[nr_ioapics].apicid = m->apicid; | |
144 | mp_ioapics[nr_ioapics].type = m->type; | |
145 | mp_ioapics[nr_ioapics].apicver = m->apicver; | |
146 | mp_ioapics[nr_ioapics].flags = m->flags; | |
1da177e4 LT |
147 | nr_ioapics++; |
148 | } | |
149 | ||
540d4e72 | 150 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 151 | { |
eeb0d7d1 | 152 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 153 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
154 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
155 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
156 | } |
157 | ||
c2c21745 | 158 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
2944e16b | 159 | { |
eeb0d7d1 | 160 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b | 161 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
c2c21745 JSR |
162 | mp_irq->irqtype, mp_irq->irqflag & 3, |
163 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, | |
164 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | |
2944e16b YL |
165 | } |
166 | ||
540d4e72 | 167 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
c2c21745 | 168 | struct mpc_intsrc *mp_irq) |
2944e16b | 169 | { |
c2c21745 JSR |
170 | mp_irq->dstapic = m->dstapic; |
171 | mp_irq->type = m->type; | |
172 | mp_irq->irqtype = m->irqtype; | |
173 | mp_irq->irqflag = m->irqflag; | |
174 | mp_irq->srcbus = m->srcbus; | |
175 | mp_irq->srcbusirq = m->srcbusirq; | |
176 | mp_irq->dstirq = m->dstirq; | |
2944e16b YL |
177 | } |
178 | ||
c2c21745 | 179 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
540d4e72 | 180 | struct mpc_intsrc *m) |
2944e16b | 181 | { |
c2c21745 JSR |
182 | m->dstapic = mp_irq->dstapic; |
183 | m->type = mp_irq->type; | |
184 | m->irqtype = mp_irq->irqtype; | |
185 | m->irqflag = mp_irq->irqflag; | |
186 | m->srcbus = mp_irq->srcbus; | |
187 | m->srcbusirq = mp_irq->srcbusirq; | |
188 | m->dstirq = mp_irq->dstirq; | |
2944e16b YL |
189 | } |
190 | ||
c2c21745 | 191 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
540d4e72 | 192 | struct mpc_intsrc *m) |
2944e16b | 193 | { |
c2c21745 | 194 | if (mp_irq->dstapic != m->dstapic) |
2944e16b | 195 | return 1; |
c2c21745 | 196 | if (mp_irq->type != m->type) |
2944e16b | 197 | return 2; |
c2c21745 | 198 | if (mp_irq->irqtype != m->irqtype) |
2944e16b | 199 | return 3; |
c2c21745 | 200 | if (mp_irq->irqflag != m->irqflag) |
2944e16b | 201 | return 4; |
c2c21745 | 202 | if (mp_irq->srcbus != m->srcbus) |
2944e16b | 203 | return 5; |
c2c21745 | 204 | if (mp_irq->srcbusirq != m->srcbusirq) |
2944e16b | 205 | return 6; |
c2c21745 | 206 | if (mp_irq->dstirq != m->dstirq) |
2944e16b YL |
207 | return 7; |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
540d4e72 | 212 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
213 | { |
214 | int i; | |
215 | ||
216 | print_MP_intsrc_info(m); | |
217 | ||
fcfa146e YL |
218 | for (i = 0; i < mp_irq_entries; i++) { |
219 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
220 | return; | |
221 | } | |
2944e16b YL |
222 | |
223 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
224 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
225 | panic("Max # of irq sources exceeded!!\n"); | |
226 | } | |
227 | ||
61048c63 AS |
228 | #endif |
229 | ||
8fb2952b | 230 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 231 | { |
eeb0d7d1 | 232 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 233 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
234 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
235 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
236 | } |
237 | ||
1da177e4 LT |
238 | /* |
239 | * Read/parse the MPC | |
240 | */ | |
241 | ||
f29521e4 | 242 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 243 | { |
1da177e4 | 244 | |
6c65da50 | 245 | if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { |
e950bea8 | 246 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
6c65da50 JSR |
247 | mpc->signature[0], mpc->signature[1], |
248 | mpc->signature[2], mpc->signature[3]); | |
1da177e4 LT |
249 | return 0; |
250 | } | |
6c65da50 | 251 | if (mpf_checksum((unsigned char *)mpc, mpc->length)) { |
e950bea8 | 252 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
253 | return 0; |
254 | } | |
6c65da50 | 255 | if (mpc->spec != 0x01 && mpc->spec != 0x04) { |
e950bea8 | 256 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
6c65da50 | 257 | mpc->spec); |
1da177e4 LT |
258 | return 0; |
259 | } | |
6c65da50 | 260 | if (!mpc->lapic) { |
e950bea8 | 261 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
262 | return 0; |
263 | } | |
6c65da50 | 264 | memcpy(oem, mpc->oem, 8); |
4ef81297 | 265 | oem[8] = 0; |
11a62a05 | 266 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 267 | |
6c65da50 | 268 | memcpy(str, mpc->productid, 12); |
4ef81297 | 269 | str[12] = 0; |
1da177e4 | 270 | |
11a62a05 | 271 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 272 | |
6c65da50 | 273 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); |
1da177e4 | 274 | |
2944e16b YL |
275 | return 1; |
276 | } | |
277 | ||
f29521e4 | 278 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
279 | { |
280 | char str[16]; | |
281 | char oem[10]; | |
282 | ||
283 | int count = sizeof(*mpc); | |
284 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
285 | ||
286 | if (!smp_check_mpc(mpc, oem, str)) | |
287 | return 0; | |
288 | ||
289 | #ifdef CONFIG_X86_32 | |
9c764247 | 290 | generic_mps_oem_check(mpc, oem, str); |
2944e16b | 291 | #endif |
e950bea8 | 292 | /* save the local APIC address, it might be non-default */ |
1da177e4 | 293 | if (!acpi_lapic) |
6c65da50 | 294 | mp_lapic_addr = mpc->lapic; |
1da177e4 | 295 | |
888032cd AS |
296 | if (early) |
297 | return 1; | |
298 | ||
6c65da50 JSR |
299 | if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) { |
300 | struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr; | |
301 | x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize); | |
64898a8b YL |
302 | } |
303 | ||
1da177e4 | 304 | /* |
4ef81297 | 305 | * Now process the configuration blocks. |
1da177e4 | 306 | */ |
64898a8b YL |
307 | if (x86_quirks->mpc_record) |
308 | *x86_quirks->mpc_record = 0; | |
309 | ||
6c65da50 | 310 | while (count < mpc->length) { |
4ef81297 AS |
311 | switch (*mpt) { |
312 | case MP_PROCESSOR: | |
1da177e4 | 313 | { |
f4f21b71 | 314 | struct mpc_cpu *m = (struct mpc_cpu *)mpt; |
1da177e4 LT |
315 | /* ACPI may have already provided this data */ |
316 | if (!acpi_lapic) | |
317 | MP_processor_info(m); | |
318 | mpt += sizeof(*m); | |
319 | count += sizeof(*m); | |
320 | break; | |
321 | } | |
4ef81297 | 322 | case MP_BUS: |
1da177e4 | 323 | { |
00fb8606 | 324 | struct mpc_bus *m = (struct mpc_bus *)mpt; |
85cc35fa | 325 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 | 326 | MP_bus_info(m); |
85cc35fa | 327 | #endif |
1da177e4 LT |
328 | mpt += sizeof(*m); |
329 | count += sizeof(*m); | |
330 | break; | |
331 | } | |
4ef81297 | 332 | case MP_IOAPIC: |
1da177e4 | 333 | { |
61048c63 | 334 | #ifdef CONFIG_X86_IO_APIC |
2b85b5fb | 335 | struct mpc_ioapic *m = (struct mpc_ioapic *)mpt; |
1da177e4 | 336 | MP_ioapic_info(m); |
61048c63 | 337 | #endif |
2b85b5fb JSR |
338 | mpt += sizeof(struct mpc_ioapic); |
339 | count += sizeof(struct mpc_ioapic); | |
1da177e4 LT |
340 | break; |
341 | } | |
4ef81297 | 342 | case MP_INTSRC: |
1da177e4 | 343 | { |
61048c63 | 344 | #ifdef CONFIG_X86_IO_APIC |
540d4e72 | 345 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
1da177e4 LT |
346 | |
347 | MP_intsrc_info(m); | |
61048c63 | 348 | #endif |
540d4e72 JSR |
349 | mpt += sizeof(struct mpc_intsrc); |
350 | count += sizeof(struct mpc_intsrc); | |
1da177e4 LT |
351 | break; |
352 | } | |
4ef81297 | 353 | case MP_LINTSRC: |
1da177e4 | 354 | { |
8fb2952b JSR |
355 | struct mpc_lintsrc *m = |
356 | (struct mpc_lintsrc *)mpt; | |
1da177e4 | 357 | MP_lintsrc_info(m); |
4ef81297 AS |
358 | mpt += sizeof(*m); |
359 | count += sizeof(*m); | |
1da177e4 LT |
360 | break; |
361 | } | |
4ef81297 | 362 | default: |
711554db YL |
363 | /* wrong mptable */ |
364 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
365 | printk(KERN_ERR "type %x\n", *mpt); | |
366 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
6c65da50 JSR |
367 | 1, mpc, mpc->length, 1); |
368 | count = mpc->length; | |
711554db | 369 | break; |
1da177e4 | 370 | } |
64898a8b YL |
371 | if (x86_quirks->mpc_record) |
372 | (*x86_quirks->mpc_record)++; | |
1da177e4 | 373 | } |
e0da3364 | 374 | |
26f7ef14 YL |
375 | #ifdef CONFIG_X86_BIGSMP |
376 | generic_bigsmp_probe(); | |
e0da3364 YL |
377 | #endif |
378 | ||
72ce0165 IM |
379 | if (apic->setup_apic_routing) |
380 | apic->setup_apic_routing(); | |
381 | ||
1da177e4 | 382 | if (!num_processors) |
e950bea8 | 383 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
384 | return num_processors; |
385 | } | |
386 | ||
61048c63 AS |
387 | #ifdef CONFIG_X86_IO_APIC |
388 | ||
1da177e4 LT |
389 | static int __init ELCR_trigger(unsigned int irq) |
390 | { | |
391 | unsigned int port; | |
392 | ||
393 | port = 0x4d0 + (irq >> 3); | |
394 | return (inb(port) >> (irq & 7)) & 1; | |
395 | } | |
396 | ||
397 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
398 | { | |
540d4e72 | 399 | struct mpc_intsrc intsrc; |
1da177e4 LT |
400 | int i; |
401 | int ELCR_fallback = 0; | |
402 | ||
e253b396 JSR |
403 | intsrc.type = MP_INTSRC; |
404 | intsrc.irqflag = 0; /* conforming */ | |
405 | intsrc.srcbus = 0; | |
b5ba7e6d | 406 | intsrc.dstapic = mp_ioapics[0].apicid; |
1da177e4 | 407 | |
e253b396 | 408 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
409 | |
410 | /* | |
411 | * If true, we have an ISA/PCI system with no IRQ entries | |
412 | * in the MP table. To prevent the PCI interrupts from being set up | |
413 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
414 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
415 | * never be level sensitive, so we simply see if the ELCR agrees. | |
416 | * If it does, we assume it's valid. | |
417 | */ | |
418 | if (mpc_default_type == 5) { | |
62441bf1 AS |
419 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
420 | "falling back to ELCR\n"); | |
1da177e4 | 421 | |
62441bf1 AS |
422 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
423 | ELCR_trigger(13)) | |
424 | printk(KERN_ERR "ELCR contains invalid data... " | |
425 | "not using ELCR\n"); | |
1da177e4 | 426 | else { |
4ef81297 AS |
427 | printk(KERN_INFO |
428 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
429 | ELCR_fallback = 1; |
430 | } | |
431 | } | |
432 | ||
433 | for (i = 0; i < 16; i++) { | |
434 | switch (mpc_default_type) { | |
435 | case 2: | |
436 | if (i == 0 || i == 13) | |
437 | continue; /* IRQ0 & IRQ13 not connected */ | |
438 | /* fall through */ | |
439 | default: | |
440 | if (i == 2) | |
441 | continue; /* IRQ2 is never connected */ | |
442 | } | |
443 | ||
444 | if (ELCR_fallback) { | |
445 | /* | |
446 | * If the ELCR indicates a level-sensitive interrupt, we | |
447 | * copy that information over to the MP table in the | |
448 | * irqflag field (level sensitive, active high polarity). | |
449 | */ | |
450 | if (ELCR_trigger(i)) | |
e253b396 | 451 | intsrc.irqflag = 13; |
1da177e4 | 452 | else |
e253b396 | 453 | intsrc.irqflag = 0; |
1da177e4 LT |
454 | } |
455 | ||
e253b396 JSR |
456 | intsrc.srcbusirq = i; |
457 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
458 | MP_intsrc_info(&intsrc); |
459 | } | |
460 | ||
e253b396 JSR |
461 | intsrc.irqtype = mp_ExtINT; |
462 | intsrc.srcbusirq = 0; | |
463 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
464 | MP_intsrc_info(&intsrc); |
465 | } | |
466 | ||
61048c63 | 467 | |
39e00fe2 | 468 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 469 | { |
2b85b5fb | 470 | struct mpc_ioapic ioapic; |
00fb8606 | 471 | struct mpc_bus bus; |
1da177e4 | 472 | |
d4c715fa JSR |
473 | bus.type = MP_BUS; |
474 | bus.busid = 0; | |
1da177e4 | 475 | switch (mpc_default_type) { |
4ef81297 | 476 | default: |
62441bf1 | 477 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
478 | mpc_default_type); |
479 | /* fall through */ | |
480 | case 1: | |
481 | case 5: | |
d4c715fa | 482 | memcpy(bus.bustype, "ISA ", 6); |
4ef81297 AS |
483 | break; |
484 | case 2: | |
485 | case 6: | |
486 | case 3: | |
d4c715fa | 487 | memcpy(bus.bustype, "EISA ", 6); |
4ef81297 AS |
488 | break; |
489 | case 4: | |
490 | case 7: | |
d4c715fa | 491 | memcpy(bus.bustype, "MCA ", 6); |
1da177e4 LT |
492 | } |
493 | MP_bus_info(&bus); | |
494 | if (mpc_default_type > 4) { | |
d4c715fa JSR |
495 | bus.busid = 1; |
496 | memcpy(bus.bustype, "PCI ", 6); | |
1da177e4 LT |
497 | MP_bus_info(&bus); |
498 | } | |
499 | ||
5df82c7d JSR |
500 | ioapic.type = MP_IOAPIC; |
501 | ioapic.apicid = 2; | |
502 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
503 | ioapic.flags = MPC_APIC_USABLE; | |
504 | ioapic.apicaddr = 0xFEC00000; | |
1da177e4 LT |
505 | MP_ioapic_info(&ioapic); |
506 | ||
507 | /* | |
508 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
509 | */ | |
510 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
511 | } |
512 | #else | |
39e00fe2 | 513 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 514 | #endif |
85cc35fa TG |
515 | |
516 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
517 | { | |
f4f21b71 | 518 | struct mpc_cpu processor; |
8fb2952b | 519 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
520 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
521 | int i; | |
522 | ||
523 | /* | |
524 | * local APIC has default address | |
525 | */ | |
526 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
527 | ||
528 | /* | |
529 | * 2 CPUs, numbered 0 & 1. | |
530 | */ | |
c4563826 | 531 | processor.type = MP_PROCESSOR; |
85cc35fa | 532 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
533 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
534 | processor.cpuflag = CPU_ENABLED; | |
535 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 536 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
537 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
538 | processor.reserved[0] = 0; | |
539 | processor.reserved[1] = 0; | |
85cc35fa | 540 | for (i = 0; i < 2; i++) { |
c4563826 | 541 | processor.apicid = i; |
85cc35fa TG |
542 | MP_processor_info(&processor); |
543 | } | |
544 | ||
545 | construct_ioapic_table(mpc_default_type); | |
546 | ||
b5ced7cd JSR |
547 | lintsrc.type = MP_LINTSRC; |
548 | lintsrc.irqflag = 0; /* conforming */ | |
549 | lintsrc.srcbusid = 0; | |
550 | lintsrc.srcbusirq = 0; | |
551 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 552 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
553 | lintsrc.irqtype = linttypes[i]; |
554 | lintsrc.destapiclint = i; | |
1da177e4 LT |
555 | MP_lintsrc_info(&lintsrc); |
556 | } | |
557 | } | |
558 | ||
41401db6 | 559 | static struct mpf_intel *mpf_found; |
1da177e4 LT |
560 | |
561 | /* | |
562 | * Scan the memory blocks for an SMP configuration block. | |
563 | */ | |
3b33553b | 564 | static void __init __get_smp_config(unsigned int early) |
1da177e4 | 565 | { |
41401db6 | 566 | struct mpf_intel *mpf = mpf_found; |
1da177e4 | 567 | |
69b88afa YL |
568 | if (!mpf) |
569 | return; | |
570 | ||
888032cd AS |
571 | if (acpi_lapic && early) |
572 | return; | |
69b88afa | 573 | |
1da177e4 | 574 | /* |
69b88afa YL |
575 | * MPS doesn't support hyperthreading, aka only have |
576 | * thread 0 apic id in MPS table | |
1da177e4 | 577 | */ |
69b88afa | 578 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 579 | return; |
1da177e4 | 580 | |
69b88afa YL |
581 | if (x86_quirks->mach_get_smp_config) { |
582 | if (x86_quirks->mach_get_smp_config(early)) | |
583 | return; | |
584 | } | |
9adc1386 | 585 | |
4ef81297 | 586 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
1eb1b3b6 | 587 | mpf->specification); |
b3e24164 | 588 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
1eb1b3b6 | 589 | if (mpf->feature2 & (1 << 7)) { |
1da177e4 LT |
590 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
591 | pic_mode = 1; | |
592 | } else { | |
593 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
594 | pic_mode = 0; | |
595 | } | |
4421b1c8 | 596 | #endif |
1da177e4 LT |
597 | /* |
598 | * Now see if we need to read further. | |
599 | */ | |
1eb1b3b6 | 600 | if (mpf->feature1 != 0) { |
888032cd AS |
601 | if (early) { |
602 | /* | |
603 | * local APIC has default address | |
604 | */ | |
605 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
606 | return; | |
607 | } | |
1da177e4 | 608 | |
4ef81297 | 609 | printk(KERN_INFO "Default MP configuration #%d\n", |
1eb1b3b6 JSR |
610 | mpf->feature1); |
611 | construct_default_ISA_mptable(mpf->feature1); | |
1da177e4 | 612 | |
1eb1b3b6 | 613 | } else if (mpf->physptr) { |
1da177e4 LT |
614 | |
615 | /* | |
616 | * Read the physical hardware table. Anything here will | |
617 | * override the defaults. | |
618 | */ | |
1eb1b3b6 | 619 | if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) { |
bab4b27c | 620 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 621 | smp_found_config = 0; |
bab4b27c | 622 | #endif |
4ef81297 AS |
623 | printk(KERN_ERR |
624 | "BIOS bug, MP table errors detected!...\n"); | |
4421b1c8 AS |
625 | printk(KERN_ERR "... disabling SMP support. " |
626 | "(tell your hw vendor)\n"); | |
1da177e4 LT |
627 | return; |
628 | } | |
61048c63 | 629 | |
888032cd AS |
630 | if (early) |
631 | return; | |
61048c63 | 632 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
633 | /* |
634 | * If there are no explicit MP IRQ entries, then we are | |
635 | * broken. We set up most of the low 16 IO-APIC pins to | |
636 | * ISA defaults and hope it will work. | |
637 | */ | |
638 | if (!mp_irq_entries) { | |
00fb8606 | 639 | struct mpc_bus bus; |
1da177e4 | 640 | |
4421b1c8 AS |
641 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " |
642 | "using default mptable. " | |
643 | "(tell your hw vendor)\n"); | |
1da177e4 | 644 | |
d4c715fa JSR |
645 | bus.type = MP_BUS; |
646 | bus.busid = 0; | |
647 | memcpy(bus.bustype, "ISA ", 6); | |
1da177e4 LT |
648 | MP_bus_info(&bus); |
649 | ||
650 | construct_default_ioirq_mptable(0); | |
651 | } | |
61048c63 | 652 | #endif |
1da177e4 LT |
653 | } else |
654 | BUG(); | |
655 | ||
888032cd AS |
656 | if (!early) |
657 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
658 | /* |
659 | * Only use the first configuration found. | |
660 | */ | |
661 | } | |
662 | ||
888032cd AS |
663 | void __init early_get_smp_config(void) |
664 | { | |
665 | __get_smp_config(1); | |
666 | } | |
667 | ||
668 | void __init get_smp_config(void) | |
669 | { | |
670 | __get_smp_config(0); | |
671 | } | |
672 | ||
673 | static int __init smp_scan_config(unsigned long base, unsigned long length, | |
674 | unsigned reserve) | |
1da177e4 | 675 | { |
92fd4b7a | 676 | unsigned int *bp = phys_to_virt(base); |
41401db6 | 677 | struct mpf_intel *mpf; |
1da177e4 | 678 | |
eeb0d7d1 RH |
679 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
680 | bp, length); | |
5d47a271 | 681 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
682 | |
683 | while (length > 0) { | |
41401db6 | 684 | mpf = (struct mpf_intel *)bp; |
1da177e4 | 685 | if ((*bp == SMP_MAGIC_IDENT) && |
1eb1b3b6 | 686 | (mpf->length == 1) && |
4ef81297 | 687 | !mpf_checksum((unsigned char *)bp, 16) && |
1eb1b3b6 JSR |
688 | ((mpf->specification == 1) |
689 | || (mpf->specification == 4))) { | |
bab4b27c | 690 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 691 | smp_found_config = 1; |
bab4b27c | 692 | #endif |
92fd4b7a | 693 | mpf_found = mpf; |
b1f006b6 | 694 | |
ba1511bf JSR |
695 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
696 | mpf, (u64)virt_to_phys(mpf)); | |
b1f006b6 YL |
697 | |
698 | if (!reserve) | |
699 | return 1; | |
d2dbf343 | 700 | reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, |
72a7fe39 | 701 | BOOTMEM_DEFAULT); |
1eb1b3b6 | 702 | if (mpf->physptr) { |
d2dbf343 YL |
703 | unsigned long size = PAGE_SIZE; |
704 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
705 | /* |
706 | * We cannot access to MPC table to compute | |
707 | * table size yet, as only few megabytes from | |
708 | * the bottom is mapped now. | |
709 | * PC-9800's MPC table places on the very last | |
710 | * of physical memory; so that simply reserving | |
1eb1b3b6 | 711 | * PAGE_SIZE from mpf->physptr yields BUG() |
1da177e4 | 712 | * in reserve_bootmem. |
ecda0628 YL |
713 | * also need to make sure physptr is below than |
714 | * max_low_pfn | |
715 | * we don't need reserve the area above max_low_pfn | |
1da177e4 | 716 | */ |
1da177e4 | 717 | unsigned long end = max_low_pfn * PAGE_SIZE; |
ecda0628 YL |
718 | |
719 | if (mpf->physptr < end) { | |
720 | if (mpf->physptr + size > end) | |
721 | size = end - mpf->physptr; | |
722 | reserve_bootmem_generic(mpf->physptr, size, | |
723 | BOOTMEM_DEFAULT); | |
724 | } | |
725 | #else | |
1eb1b3b6 | 726 | reserve_bootmem_generic(mpf->physptr, size, |
72a7fe39 | 727 | BOOTMEM_DEFAULT); |
ecda0628 | 728 | #endif |
1da177e4 LT |
729 | } |
730 | ||
d2dbf343 | 731 | return 1; |
1da177e4 LT |
732 | } |
733 | bp += 4; | |
734 | length -= 16; | |
735 | } | |
736 | return 0; | |
737 | } | |
738 | ||
3b33553b | 739 | static void __init __find_smp_config(unsigned int reserve) |
1da177e4 LT |
740 | { |
741 | unsigned int address; | |
742 | ||
3c9cb6de YL |
743 | if (x86_quirks->mach_find_smp_config) { |
744 | if (x86_quirks->mach_find_smp_config(reserve)) | |
3b33553b IM |
745 | return; |
746 | } | |
1da177e4 LT |
747 | /* |
748 | * FIXME: Linux assumes you have 640K of base ram.. | |
749 | * this continues the error... | |
750 | * | |
751 | * 1) Scan the bottom 1K for a signature | |
752 | * 2) Scan the top 1K of base RAM | |
753 | * 3) Scan the 64K of bios | |
754 | */ | |
888032cd AS |
755 | if (smp_scan_config(0x0, 0x400, reserve) || |
756 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
757 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
758 | return; |
759 | /* | |
760 | * If it is an SMP machine we should know now, unless the | |
761 | * configuration is in an EISA/MCA bus machine with an | |
762 | * extended bios data area. | |
763 | * | |
764 | * there is a real-mode segmented pointer pointing to the | |
765 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
766 | * | |
767 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
768 | * area, and as such this kind of SMP config may be less | |
769 | * trustworthy, simply because the SMP table may have been | |
770 | * stomped on during early boot. These loaders are buggy and | |
771 | * should be fixed. | |
772 | * | |
773 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
774 | */ | |
775 | ||
776 | address = get_bios_ebda(); | |
777 | if (address) | |
888032cd AS |
778 | smp_scan_config(address, 0x400, reserve); |
779 | } | |
780 | ||
781 | void __init early_find_smp_config(void) | |
782 | { | |
783 | __find_smp_config(0); | |
784 | } | |
785 | ||
786 | void __init find_smp_config(void) | |
787 | { | |
788 | __find_smp_config(1); | |
1da177e4 | 789 | } |
2944e16b YL |
790 | |
791 | #ifdef CONFIG_X86_IO_APIC | |
792 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
793 | ||
540d4e72 | 794 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
795 | { |
796 | int i; | |
797 | ||
e253b396 | 798 | if (m->irqtype != mp_INT) |
2944e16b YL |
799 | return 0; |
800 | ||
e253b396 | 801 | if (m->irqflag != 0x0f) |
2944e16b YL |
802 | return 0; |
803 | ||
804 | /* not legacy */ | |
805 | ||
806 | for (i = 0; i < mp_irq_entries; i++) { | |
c2c21745 | 807 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
808 | continue; |
809 | ||
c2c21745 | 810 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
811 | continue; |
812 | ||
c2c21745 | 813 | if (mp_irqs[i].srcbus != m->srcbus) |
2944e16b | 814 | continue; |
c2c21745 | 815 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
2944e16b YL |
816 | continue; |
817 | if (irq_used[i]) { | |
818 | /* already claimed */ | |
819 | return -2; | |
820 | } | |
821 | irq_used[i] = 1; | |
822 | return i; | |
823 | } | |
824 | ||
825 | /* not found */ | |
826 | return -1; | |
827 | } | |
828 | ||
829 | #define SPARE_SLOT_NUM 20 | |
830 | ||
540d4e72 | 831 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
2944e16b YL |
832 | #endif |
833 | ||
f29521e4 | 834 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
835 | unsigned long mpc_new_phys, |
836 | unsigned long mpc_new_length) | |
837 | { | |
838 | #ifdef CONFIG_X86_IO_APIC | |
839 | int i; | |
840 | int nr_m_spare = 0; | |
841 | #endif | |
842 | ||
843 | int count = sizeof(*mpc); | |
844 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
845 | ||
6c65da50 JSR |
846 | printk(KERN_INFO "mpc_length %x\n", mpc->length); |
847 | while (count < mpc->length) { | |
2944e16b YL |
848 | switch (*mpt) { |
849 | case MP_PROCESSOR: | |
850 | { | |
f4f21b71 | 851 | struct mpc_cpu *m = (struct mpc_cpu *)mpt; |
2944e16b YL |
852 | mpt += sizeof(*m); |
853 | count += sizeof(*m); | |
854 | break; | |
855 | } | |
856 | case MP_BUS: | |
857 | { | |
00fb8606 | 858 | struct mpc_bus *m = (struct mpc_bus *)mpt; |
2944e16b YL |
859 | mpt += sizeof(*m); |
860 | count += sizeof(*m); | |
861 | break; | |
862 | } | |
863 | case MP_IOAPIC: | |
864 | { | |
2b85b5fb JSR |
865 | mpt += sizeof(struct mpc_ioapic); |
866 | count += sizeof(struct mpc_ioapic); | |
2944e16b YL |
867 | break; |
868 | } | |
869 | case MP_INTSRC: | |
870 | { | |
871 | #ifdef CONFIG_X86_IO_APIC | |
540d4e72 | 872 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
2944e16b YL |
873 | |
874 | printk(KERN_INFO "OLD "); | |
875 | print_MP_intsrc_info(m); | |
876 | i = get_MP_intsrc_index(m); | |
877 | if (i > 0) { | |
878 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
879 | printk(KERN_INFO "NEW "); | |
880 | print_mp_irq_info(&mp_irqs[i]); | |
881 | } else if (!i) { | |
882 | /* legacy, do nothing */ | |
883 | } else if (nr_m_spare < SPARE_SLOT_NUM) { | |
884 | /* | |
885 | * not found (-1), or duplicated (-2) | |
886 | * are invalid entries, | |
887 | * we need to use the slot later | |
888 | */ | |
889 | m_spare[nr_m_spare] = m; | |
890 | nr_m_spare++; | |
891 | } | |
892 | #endif | |
540d4e72 JSR |
893 | mpt += sizeof(struct mpc_intsrc); |
894 | count += sizeof(struct mpc_intsrc); | |
2944e16b YL |
895 | break; |
896 | } | |
897 | case MP_LINTSRC: | |
898 | { | |
8fb2952b JSR |
899 | struct mpc_lintsrc *m = |
900 | (struct mpc_lintsrc *)mpt; | |
2944e16b YL |
901 | mpt += sizeof(*m); |
902 | count += sizeof(*m); | |
903 | break; | |
904 | } | |
905 | default: | |
906 | /* wrong mptable */ | |
907 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
908 | printk(KERN_ERR "type %x\n", *mpt); | |
909 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
6c65da50 | 910 | 1, mpc, mpc->length, 1); |
2944e16b YL |
911 | goto out; |
912 | } | |
913 | } | |
914 | ||
915 | #ifdef CONFIG_X86_IO_APIC | |
916 | for (i = 0; i < mp_irq_entries; i++) { | |
917 | if (irq_used[i]) | |
918 | continue; | |
919 | ||
c2c21745 | 920 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
921 | continue; |
922 | ||
c2c21745 | 923 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
924 | continue; |
925 | ||
926 | if (nr_m_spare > 0) { | |
927 | printk(KERN_INFO "*NEW* found "); | |
928 | nr_m_spare--; | |
929 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
930 | m_spare[nr_m_spare] = NULL; | |
931 | } else { | |
540d4e72 JSR |
932 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
933 | count += sizeof(struct mpc_intsrc); | |
2944e16b YL |
934 | if (!mpc_new_phys) { |
935 | printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count); | |
936 | } else { | |
937 | if (count <= mpc_new_length) | |
938 | printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count); | |
939 | else { | |
940 | printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length); | |
941 | goto out; | |
942 | } | |
943 | } | |
944 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
6c65da50 | 945 | mpc->length = count; |
540d4e72 | 946 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
947 | } |
948 | print_mp_irq_info(&mp_irqs[i]); | |
949 | } | |
950 | #endif | |
951 | out: | |
952 | /* update checksum */ | |
6c65da50 JSR |
953 | mpc->checksum = 0; |
954 | mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
955 | |
956 | return 0; | |
957 | } | |
958 | ||
fcfa146e YL |
959 | static int __initdata enable_update_mptable; |
960 | ||
2944e16b YL |
961 | static int __init update_mptable_setup(char *str) |
962 | { | |
963 | enable_update_mptable = 1; | |
964 | return 0; | |
965 | } | |
966 | early_param("update_mptable", update_mptable_setup); | |
967 | ||
968 | static unsigned long __initdata mpc_new_phys; | |
969 | static unsigned long mpc_new_length __initdata = 4096; | |
970 | ||
971 | /* alloc_mptable or alloc_mptable=4k */ | |
972 | static int __initdata alloc_mptable; | |
973 | static int __init parse_alloc_mptable_opt(char *p) | |
974 | { | |
975 | enable_update_mptable = 1; | |
976 | alloc_mptable = 1; | |
977 | if (!p) | |
978 | return 0; | |
979 | mpc_new_length = memparse(p, &p); | |
980 | return 0; | |
981 | } | |
982 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
983 | ||
984 | void __init early_reserve_e820_mpc_new(void) | |
985 | { | |
986 | if (enable_update_mptable && alloc_mptable) { | |
987 | u64 startt = 0; | |
988 | #ifdef CONFIG_X86_TRAMPOLINE | |
989 | startt = TRAMPOLINE_BASE; | |
990 | #endif | |
991 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); | |
992 | } | |
993 | } | |
994 | ||
995 | static int __init update_mp_table(void) | |
996 | { | |
997 | char str[16]; | |
998 | char oem[10]; | |
41401db6 | 999 | struct mpf_intel *mpf; |
f29521e4 | 1000 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
1001 | |
1002 | if (!enable_update_mptable) | |
1003 | return 0; | |
1004 | ||
1005 | mpf = mpf_found; | |
1006 | if (!mpf) | |
1007 | return 0; | |
1008 | ||
1009 | /* | |
1010 | * Now see if we need to go further. | |
1011 | */ | |
1eb1b3b6 | 1012 | if (mpf->feature1 != 0) |
2944e16b YL |
1013 | return 0; |
1014 | ||
1eb1b3b6 | 1015 | if (!mpf->physptr) |
2944e16b YL |
1016 | return 0; |
1017 | ||
1eb1b3b6 | 1018 | mpc = phys_to_virt(mpf->physptr); |
2944e16b YL |
1019 | |
1020 | if (!smp_check_mpc(mpc, oem, str)) | |
1021 | return 0; | |
1022 | ||
ba1511bf | 1023 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1eb1b3b6 | 1024 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
2944e16b | 1025 | |
6c65da50 | 1026 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
2944e16b YL |
1027 | mpc_new_phys = 0; |
1028 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
1029 | mpc_new_length); | |
1030 | } | |
1031 | ||
1032 | if (!mpc_new_phys) { | |
1033 | unsigned char old, new; | |
1034 | /* check if we can change the postion */ | |
6c65da50 JSR |
1035 | mpc->checksum = 0; |
1036 | old = mpf_checksum((unsigned char *)mpc, mpc->length); | |
1037 | mpc->checksum = 0xff; | |
1038 | new = mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
1039 | if (old == new) { |
1040 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
1041 | return 0; | |
1042 | } | |
1043 | printk(KERN_INFO "use in-positon replacing\n"); | |
1044 | } else { | |
1eb1b3b6 | 1045 | mpf->physptr = mpc_new_phys; |
2944e16b | 1046 | mpc_new = phys_to_virt(mpc_new_phys); |
6c65da50 | 1047 | memcpy(mpc_new, mpc, mpc->length); |
2944e16b YL |
1048 | mpc = mpc_new; |
1049 | /* check if we can modify that */ | |
1eb1b3b6 | 1050 | if (mpc_new_phys - mpf->physptr) { |
41401db6 | 1051 | struct mpf_intel *mpf_new; |
2944e16b YL |
1052 | /* steal 16 bytes from [0, 1k) */ |
1053 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
1054 | mpf_new = phys_to_virt(0x400 - 16); | |
1055 | memcpy(mpf_new, mpf, 16); | |
1056 | mpf = mpf_new; | |
1eb1b3b6 | 1057 | mpf->physptr = mpc_new_phys; |
2944e16b | 1058 | } |
1eb1b3b6 JSR |
1059 | mpf->checksum = 0; |
1060 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
1061 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); | |
2944e16b YL |
1062 | } |
1063 | ||
1064 | /* | |
1065 | * only replace the one with mp_INT and | |
1066 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
1067 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
1068 | * may need pci=routeirq for all coverage | |
1069 | */ | |
1070 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
1071 | ||
1072 | return 0; | |
1073 | } | |
1074 | ||
1075 | late_initcall(update_mp_table); |