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1da177e4 1/* ----------------------------------------------------------------------- *
2b06ac86
PA
2 *
3 * Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
ff55df53 4 * Copyright 2009 Intel Corporation; author: H. Peter Anvin
1da177e4
LT
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
9 * USA; either version 2 of the License, or (at your option) any later
10 * version; incorporated herein by reference.
11 *
12 * ----------------------------------------------------------------------- */
13
14/*
1da177e4
LT
15 * x86 MSR access device
16 *
17 * This device is accessed by lseek() to the appropriate register number
18 * and then read/write in chunks of 8 bytes. A larger size means multiple
19 * reads or writes of the same register.
20 *
21 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
22 * an SMP box will direct the access to CPU %d.
23 */
24
951a18c6
FF
25#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
1da177e4 27#include <linux/module.h>
1da177e4
LT
28
29#include <linux/types.h>
30#include <linux/errno.h>
31#include <linux/fcntl.h>
32#include <linux/init.h>
33#include <linux/poll.h>
34#include <linux/smp.h>
1da177e4
LT
35#include <linux/major.h>
36#include <linux/fs.h>
37#include <linux/device.h>
38#include <linux/cpu.h>
39#include <linux/notifier.h>
448dd2fa 40#include <linux/uaccess.h>
5a0e3ad6 41#include <linux/gfp.h>
1da177e4 42
cd4d09ec 43#include <asm/cpufeature.h>
1da177e4 44#include <asm/msr.h>
1da177e4 45
8874b414 46static struct class *msr_class;
8fba38c9 47static enum cpuhp_state cpuhp_msr_state;
1da177e4 48
94a9fa41
PC
49static ssize_t msr_read(struct file *file, char __user *buf,
50 size_t count, loff_t *ppos)
1da177e4
LT
51{
52 u32 __user *tmp = (u32 __user *) buf;
53 u32 data[2];
1da177e4 54 u32 reg = *ppos;
6131ffaa 55 int cpu = iminor(file_inode(file));
85f1cb60
PA
56 int err = 0;
57 ssize_t bytes = 0;
1da177e4
LT
58
59 if (count % 8)
60 return -EINVAL; /* Invalid chunk size */
61
6926d570 62 for (; count; count -= 8) {
78a62d2c 63 err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
0cc0213e 64 if (err)
85f1cb60 65 break;
85f1cb60
PA
66 if (copy_to_user(tmp, &data, 8)) {
67 err = -EFAULT;
68 break;
c6f31932 69 }
1da177e4 70 tmp += 2;
85f1cb60 71 bytes += 8;
1da177e4
LT
72 }
73
85f1cb60 74 return bytes ? bytes : err;
1da177e4
LT
75}
76
77static ssize_t msr_write(struct file *file, const char __user *buf,
78 size_t count, loff_t *ppos)
79{
80 const u32 __user *tmp = (const u32 __user *)buf;
81 u32 data[2];
1da177e4 82 u32 reg = *ppos;
6131ffaa 83 int cpu = iminor(file_inode(file));
85f1cb60
PA
84 int err = 0;
85 ssize_t bytes = 0;
1da177e4
LT
86
87 if (count % 8)
88 return -EINVAL; /* Invalid chunk size */
89
f475ff35 90 for (; count; count -= 8) {
85f1cb60
PA
91 if (copy_from_user(&data, tmp, 8)) {
92 err = -EFAULT;
93 break;
94 }
78a62d2c 95 err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
0cc0213e 96 if (err)
85f1cb60 97 break;
1da177e4 98 tmp += 2;
85f1cb60 99 bytes += 8;
1da177e4
LT
100 }
101
85f1cb60 102 return bytes ? bytes : err;
1da177e4
LT
103}
104
ff55df53
PA
105static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
106{
107 u32 __user *uregs = (u32 __user *)arg;
108 u32 regs[8];
6131ffaa 109 int cpu = iminor(file_inode(file));
ff55df53
PA
110 int err;
111
112 switch (ioc) {
113 case X86_IOC_RDMSR_REGS:
114 if (!(file->f_mode & FMODE_READ)) {
115 err = -EBADF;
116 break;
117 }
118 if (copy_from_user(&regs, uregs, sizeof regs)) {
119 err = -EFAULT;
120 break;
121 }
122 err = rdmsr_safe_regs_on_cpu(cpu, regs);
123 if (err)
124 break;
125 if (copy_to_user(uregs, &regs, sizeof regs))
126 err = -EFAULT;
127 break;
128
129 case X86_IOC_WRMSR_REGS:
130 if (!(file->f_mode & FMODE_WRITE)) {
131 err = -EBADF;
132 break;
133 }
134 if (copy_from_user(&regs, uregs, sizeof regs)) {
135 err = -EFAULT;
136 break;
137 }
138 err = wrmsr_safe_regs_on_cpu(cpu, regs);
139 if (err)
140 break;
141 if (copy_to_user(uregs, &regs, sizeof regs))
142 err = -EFAULT;
143 break;
144
145 default:
146 err = -ENOTTY;
147 break;
148 }
149
150 return err;
151}
152
1da177e4
LT
153static int msr_open(struct inode *inode, struct file *file)
154{
6131ffaa 155 unsigned int cpu = iminor(file_inode(file));
494c2ebf 156 struct cpuinfo_x86 *c;
1da177e4 157
c903f045
AC
158 if (!capable(CAP_SYS_RAWIO))
159 return -EPERM;
160
d6c30405
FW
161 if (cpu >= nr_cpu_ids || !cpu_online(cpu))
162 return -ENXIO; /* No such CPU */
163
5119e92e
JC
164 c = &cpu_data(cpu);
165 if (!cpu_has(c, X86_FEATURE_MSR))
d6c30405
FW
166 return -EIO; /* MSR not supported */
167
168 return 0;
1da177e4
LT
169}
170
171/*
172 * File operations we support
173 */
5dfe4c96 174static const struct file_operations msr_fops = {
1da177e4 175 .owner = THIS_MODULE,
b25472f9 176 .llseek = no_seek_end_llseek,
1da177e4
LT
177 .read = msr_read,
178 .write = msr_write,
179 .open = msr_open,
ff55df53
PA
180 .unlocked_ioctl = msr_ioctl,
181 .compat_ioctl = msr_ioctl,
1da177e4
LT
182};
183
8fba38c9 184static int msr_device_create(unsigned int cpu)
1da177e4 185{
a271aaf1 186 struct device *dev;
1da177e4 187
a9b12619
GKH
188 dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
189 "msr%d", cpu);
cba0fdbc 190 return PTR_ERR_OR_ZERO(dev);
881a841f
AM
191}
192
8fba38c9 193static int msr_device_destroy(unsigned int cpu)
881a841f
AM
194{
195 device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
8fba38c9 196 return 0;
1da177e4
LT
197}
198
2c9ede55 199static char *msr_devnode(struct device *dev, umode_t *mode)
07e9bb8e
KS
200{
201 return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
202}
203
1da177e4
LT
204static int __init msr_init(void)
205{
8fba38c9 206 int err;
1da177e4 207
0b962d47 208 if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
951a18c6 209 pr_err("unable to get major %d for msr\n", MSR_MAJOR);
8fba38c9 210 return -EBUSY;
1da177e4 211 }
8874b414 212 msr_class = class_create(THIS_MODULE, "msr");
1da177e4
LT
213 if (IS_ERR(msr_class)) {
214 err = PTR_ERR(msr_class);
215 goto out_chrdev;
216 }
e454cea2 217 msr_class->devnode = msr_devnode;
de82a01b 218
8fba38c9
SAS
219 err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/msr:online",
220 msr_device_create, msr_device_destroy);
221 if (err < 0)
222 goto out_class;
223 cpuhp_msr_state = err;
224 return 0;
1da177e4
LT
225
226out_class:
8fba38c9 227 cpuhp_remove_state(cpuhp_msr_state);
8874b414 228 class_destroy(msr_class);
1da177e4 229out_chrdev:
0b962d47 230 __unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
1da177e4
LT
231 return err;
232}
8fba38c9 233module_init(msr_init);
1da177e4
LT
234
235static void __exit msr_exit(void)
236{
8fba38c9 237 cpuhp_remove_state(cpuhp_msr_state);
8874b414 238 class_destroy(msr_class);
da482474 239 __unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
1da177e4 240}
1da177e4
LT
241module_exit(msr_exit)
242
243MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
244MODULE_DESCRIPTION("x86 generic MSR driver");
245MODULE_LICENSE("GPL");