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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * NMI watchdog support on APIC systems |
3 | * | |
4 | * Started by Ingo Molnar <mingo@redhat.com> | |
5 | * | |
6 | * Fixes: | |
7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | |
8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | |
9 | * Pavel Machek and | |
10 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | |
11 | */ | |
12 | ||
bb81a09e | 13 | #include <linux/nmi.h> |
1da177e4 | 14 | #include <linux/mm.h> |
1da177e4 | 15 | #include <linux/delay.h> |
1da177e4 | 16 | #include <linux/interrupt.h> |
1da177e4 LT |
17 | #include <linux/module.h> |
18 | #include <linux/sysdev.h> | |
1da177e4 | 19 | #include <linux/sysctl.h> |
eddb6fb9 | 20 | #include <linux/kprobes.h> |
bb81a09e | 21 | #include <linux/cpumask.h> |
1eeb66a1 | 22 | #include <linux/kdebug.h> |
1da177e4 LT |
23 | |
24 | #include <asm/smp.h> | |
1da177e4 | 25 | #include <asm/nmi.h> |
1da177e4 | 26 | #include <asm/proto.h> |
553f265f | 27 | #include <asm/mce.h> |
1da177e4 | 28 | |
29cbc78b AK |
29 | int unknown_nmi_panic; |
30 | int nmi_watchdog_enabled; | |
31 | int panic_on_unrecovered_nmi; | |
32 | ||
1714f9bf | 33 | static cpumask_t backtrace_mask = CPU_MASK_NONE; |
828f0afd | 34 | |
1da177e4 | 35 | /* nmi_active: |
f2802e7f DZ |
36 | * >0: the lapic NMI watchdog is active, but can be disabled |
37 | * <0: the lapic NMI watchdog has not been set up, and cannot | |
1da177e4 | 38 | * be enabled |
f2802e7f | 39 | * 0: the lapic NMI watchdog is disabled, but can be enabled |
1da177e4 | 40 | */ |
f2802e7f | 41 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ |
1da177e4 LT |
42 | int panic_on_timeout; |
43 | ||
44 | unsigned int nmi_watchdog = NMI_DEFAULT; | |
45 | static unsigned int nmi_hz = HZ; | |
1da177e4 | 46 | |
05cb007d | 47 | static DEFINE_PER_CPU(short, wd_enabled); |
1da177e4 | 48 | |
f2802e7f | 49 | /* local prototypes */ |
f2802e7f | 50 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu); |
75152114 | 51 | |
1da177e4 | 52 | /* Run after command line and cpu_init init, but before all other checks */ |
e33e89ab | 53 | void nmi_watchdog_default(void) |
1da177e4 LT |
54 | { |
55 | if (nmi_watchdog != NMI_DEFAULT) | |
56 | return; | |
8ce5e3e4 | 57 | nmi_watchdog = NMI_NONE; |
1da177e4 LT |
58 | } |
59 | ||
92715e28 RT |
60 | static int endflag __initdata = 0; |
61 | ||
75152114 AK |
62 | #ifdef CONFIG_SMP |
63 | /* The performance counters used by NMI_LOCAL_APIC don't trigger when | |
64 | * the CPU is idle. To make sure the NMI watchdog really ticks on all | |
65 | * CPUs during the test make them busy. | |
66 | */ | |
67 | static __init void nmi_cpu_busy(void *data) | |
1da177e4 | 68 | { |
366c7f55 | 69 | local_irq_enable_in_hardirq(); |
75152114 AK |
70 | /* Intentionally don't use cpu_relax here. This is |
71 | to make sure that the performance counter really ticks, | |
72 | even if there is a simulator or similar that catches the | |
73 | pause instruction. On a real HT machine this is fine because | |
74 | all other CPUs are busy with "useless" delay loops and don't | |
75 | care if they get somewhat less cycles. */ | |
92715e28 RT |
76 | while (endflag == 0) |
77 | mb(); | |
1da177e4 | 78 | } |
75152114 | 79 | #endif |
1da177e4 | 80 | |
75152114 | 81 | int __init check_nmi_watchdog (void) |
1da177e4 | 82 | { |
ac6b931c | 83 | int *counts; |
1da177e4 LT |
84 | int cpu; |
85 | ||
0328ecef | 86 | if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED)) |
f2802e7f DZ |
87 | return 0; |
88 | ||
89 | if (!atomic_read(&nmi_active)) | |
90 | return 0; | |
91 | ||
75152114 AK |
92 | counts = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); |
93 | if (!counts) | |
94 | return -1; | |
1da177e4 | 95 | |
75152114 | 96 | printk(KERN_INFO "testing NMI watchdog ... "); |
ac6b931c | 97 | |
7554c3f0 | 98 | #ifdef CONFIG_SMP |
75152114 AK |
99 | if (nmi_watchdog == NMI_LOCAL_APIC) |
100 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0); | |
7554c3f0 | 101 | #endif |
1da177e4 LT |
102 | |
103 | for (cpu = 0; cpu < NR_CPUS; cpu++) | |
df79efde | 104 | counts[cpu] = cpu_pda(cpu)->__nmi_count; |
1da177e4 | 105 | local_irq_enable(); |
0fb2ebfc | 106 | mdelay((20*1000)/nmi_hz); // wait 20 ticks |
1da177e4 | 107 | |
394e3902 | 108 | for_each_online_cpu(cpu) { |
05cb007d | 109 | if (!per_cpu(wd_enabled, cpu)) |
f2802e7f | 110 | continue; |
df79efde | 111 | if (cpu_pda(cpu)->__nmi_count - counts[cpu] <= 5) { |
75bc122c DZ |
112 | printk(KERN_WARNING "WARNING: CPU#%d: NMI " |
113 | "appears to be stuck (%d->%d)!\n", | |
1da177e4 | 114 | cpu, |
75152114 | 115 | counts[cpu], |
df79efde | 116 | cpu_pda(cpu)->__nmi_count); |
05cb007d | 117 | per_cpu(wd_enabled, cpu) = 0; |
f2802e7f | 118 | atomic_dec(&nmi_active); |
1da177e4 LT |
119 | } |
120 | } | |
f2802e7f DZ |
121 | if (!atomic_read(&nmi_active)) { |
122 | kfree(counts); | |
123 | atomic_set(&nmi_active, -1); | |
92715e28 | 124 | endflag = 1; |
f2802e7f DZ |
125 | return -1; |
126 | } | |
75152114 | 127 | endflag = 1; |
1da177e4 LT |
128 | printk("OK.\n"); |
129 | ||
130 | /* now that we know it works we can reduce NMI frequency to | |
131 | something more reasonable; makes a difference in some configs */ | |
05cb007d AK |
132 | if (nmi_watchdog == NMI_LOCAL_APIC) |
133 | nmi_hz = lapic_adjust_nmi_hz(1); | |
1da177e4 | 134 | |
ac6b931c | 135 | kfree(counts); |
1da177e4 LT |
136 | return 0; |
137 | } | |
138 | ||
139 | int __init setup_nmi_watchdog(char *str) | |
140 | { | |
141 | int nmi; | |
142 | ||
143 | if (!strncmp(str,"panic",5)) { | |
144 | panic_on_timeout = 1; | |
145 | str = strchr(str, ','); | |
146 | if (!str) | |
147 | return 1; | |
148 | ++str; | |
149 | } | |
150 | ||
151 | get_option(&str, &nmi); | |
152 | ||
f2802e7f | 153 | if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE)) |
1da177e4 | 154 | return 0; |
f2802e7f | 155 | |
75152114 | 156 | nmi_watchdog = nmi; |
1da177e4 LT |
157 | return 1; |
158 | } | |
159 | ||
160 | __setup("nmi_watchdog=", setup_nmi_watchdog); | |
161 | ||
1da177e4 | 162 | |
5d0e600d IM |
163 | static void __acpi_nmi_disable(void *__unused) |
164 | { | |
165 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | |
166 | } | |
167 | ||
168 | /* | |
169 | * Disable timer based NMIs on all CPUs: | |
170 | */ | |
171 | void acpi_nmi_disable(void) | |
172 | { | |
173 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
174 | on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); | |
175 | } | |
176 | ||
177 | static void __acpi_nmi_enable(void *__unused) | |
178 | { | |
179 | apic_write(APIC_LVT0, APIC_DM_NMI); | |
180 | } | |
181 | ||
182 | /* | |
183 | * Enable timer based NMIs on all CPUs: | |
184 | */ | |
185 | void acpi_nmi_enable(void) | |
186 | { | |
187 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
188 | on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); | |
189 | } | |
1da177e4 LT |
190 | #ifdef CONFIG_PM |
191 | ||
192 | static int nmi_pm_active; /* nmi_active before suspend */ | |
193 | ||
829ca9a3 | 194 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 | 195 | { |
4038f901 | 196 | /* only CPU0 goes here, other CPUs should be offline */ |
f2802e7f | 197 | nmi_pm_active = atomic_read(&nmi_active); |
4038f901 SL |
198 | stop_apic_nmi_watchdog(NULL); |
199 | BUG_ON(atomic_read(&nmi_active) != 0); | |
1da177e4 LT |
200 | return 0; |
201 | } | |
202 | ||
203 | static int lapic_nmi_resume(struct sys_device *dev) | |
204 | { | |
4038f901 SL |
205 | /* only CPU0 goes here, other CPUs should be offline */ |
206 | if (nmi_pm_active > 0) { | |
207 | setup_apic_nmi_watchdog(NULL); | |
208 | touch_nmi_watchdog(); | |
209 | } | |
1da177e4 LT |
210 | return 0; |
211 | } | |
212 | ||
213 | static struct sysdev_class nmi_sysclass = { | |
af5ca3f4 | 214 | .name = "lapic_nmi", |
1da177e4 LT |
215 | .resume = lapic_nmi_resume, |
216 | .suspend = lapic_nmi_suspend, | |
217 | }; | |
218 | ||
219 | static struct sys_device device_lapic_nmi = { | |
220 | .id = 0, | |
221 | .cls = &nmi_sysclass, | |
222 | }; | |
223 | ||
224 | static int __init init_lapic_nmi_sysfs(void) | |
225 | { | |
226 | int error; | |
227 | ||
f2802e7f DZ |
228 | /* should really be a BUG_ON but b/c this is an |
229 | * init call, it just doesn't work. -dcz | |
230 | */ | |
231 | if (nmi_watchdog != NMI_LOCAL_APIC) | |
232 | return 0; | |
233 | ||
234 | if ( atomic_read(&nmi_active) < 0 ) | |
1da177e4 LT |
235 | return 0; |
236 | ||
237 | error = sysdev_class_register(&nmi_sysclass); | |
238 | if (!error) | |
239 | error = sysdev_register(&device_lapic_nmi); | |
240 | return error; | |
241 | } | |
242 | /* must come after the local APIC's device_initcall() */ | |
243 | late_initcall(init_lapic_nmi_sysfs); | |
244 | ||
245 | #endif /* CONFIG_PM */ | |
246 | ||
f2802e7f DZ |
247 | void setup_apic_nmi_watchdog(void *unused) |
248 | { | |
05cb007d | 249 | if (__get_cpu_var(wd_enabled) == 1) |
4038f901 SL |
250 | return; |
251 | ||
252 | /* cheap hack to support suspend/resume */ | |
253 | /* if cpu0 is not active neither should the other cpus */ | |
254 | if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0)) | |
255 | return; | |
256 | ||
05cb007d AK |
257 | switch (nmi_watchdog) { |
258 | case NMI_LOCAL_APIC: | |
259 | __get_cpu_var(wd_enabled) = 1; | |
260 | if (lapic_watchdog_init(nmi_hz) < 0) { | |
261 | __get_cpu_var(wd_enabled) = 0; | |
75152114 | 262 | return; |
f2802e7f | 263 | } |
05cb007d AK |
264 | /* FALL THROUGH */ |
265 | case NMI_IO_APIC: | |
266 | __get_cpu_var(wd_enabled) = 1; | |
267 | atomic_inc(&nmi_active); | |
f2802e7f | 268 | } |
f2802e7f | 269 | } |
75152114 | 270 | |
4038f901 | 271 | void stop_apic_nmi_watchdog(void *unused) |
f2802e7f DZ |
272 | { |
273 | /* only support LOCAL and IO APICs for now */ | |
274 | if ((nmi_watchdog != NMI_LOCAL_APIC) && | |
275 | (nmi_watchdog != NMI_IO_APIC)) | |
276 | return; | |
05cb007d | 277 | if (__get_cpu_var(wd_enabled) == 0) |
4038f901 | 278 | return; |
05cb007d AK |
279 | if (nmi_watchdog == NMI_LOCAL_APIC) |
280 | lapic_watchdog_stop(); | |
281 | __get_cpu_var(wd_enabled) = 0; | |
f2802e7f | 282 | atomic_dec(&nmi_active); |
1da177e4 LT |
283 | } |
284 | ||
285 | /* | |
286 | * the best way to detect whether a CPU has a 'hard lockup' problem | |
287 | * is to check it's local APIC timer IRQ counts. If they are not | |
288 | * changing then that CPU has some problem. | |
289 | * | |
290 | * as these watchdog NMI IRQs are generated on every CPU, we only | |
291 | * have to check the current processor. | |
1da177e4 LT |
292 | */ |
293 | ||
75152114 AK |
294 | static DEFINE_PER_CPU(unsigned, last_irq_sum); |
295 | static DEFINE_PER_CPU(local_t, alert_counter); | |
296 | static DEFINE_PER_CPU(int, nmi_touch); | |
1da177e4 | 297 | |
567f3e42 | 298 | void touch_nmi_watchdog(void) |
1da177e4 | 299 | { |
99019e91 JB |
300 | if (nmi_watchdog > 0) { |
301 | unsigned cpu; | |
1da177e4 | 302 | |
99019e91 JB |
303 | /* |
304 | * Tell other CPUs to reset their alert counters. We cannot | |
305 | * do it ourselves because the alert count increase is not | |
306 | * atomic. | |
307 | */ | |
567f3e42 AM |
308 | for_each_present_cpu(cpu) { |
309 | if (per_cpu(nmi_touch, cpu) != 1) | |
310 | per_cpu(nmi_touch, cpu) = 1; | |
311 | } | |
99019e91 | 312 | } |
8446f1d3 IM |
313 | |
314 | touch_softlockup_watchdog(); | |
1da177e4 LT |
315 | } |
316 | ||
3adbbcce | 317 | int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason) |
1da177e4 | 318 | { |
75152114 AK |
319 | int sum; |
320 | int touched = 0; | |
bb81a09e | 321 | int cpu = smp_processor_id(); |
05cb007d | 322 | int rc = 0; |
f2802e7f DZ |
323 | |
324 | /* check for other users first */ | |
325 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | |
326 | == NOTIFY_STOP) { | |
3adbbcce | 327 | rc = 1; |
f2802e7f DZ |
328 | touched = 1; |
329 | } | |
1da177e4 | 330 | |
4e77ae3e | 331 | sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs); |
75152114 AK |
332 | if (__get_cpu_var(nmi_touch)) { |
333 | __get_cpu_var(nmi_touch) = 0; | |
334 | touched = 1; | |
335 | } | |
f2802e7f | 336 | |
bb81a09e AM |
337 | if (cpu_isset(cpu, backtrace_mask)) { |
338 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | |
339 | ||
340 | spin_lock(&lock); | |
341 | printk("NMI backtrace for cpu %d\n", cpu); | |
342 | dump_stack(); | |
343 | spin_unlock(&lock); | |
344 | cpu_clear(cpu, backtrace_mask); | |
345 | } | |
346 | ||
553f265f AK |
347 | #ifdef CONFIG_X86_MCE |
348 | /* Could check oops_in_progress here too, but it's safer | |
349 | not too */ | |
350 | if (atomic_read(&mce_entry) > 0) | |
351 | touched = 1; | |
352 | #endif | |
f2802e7f | 353 | /* if the apic timer isn't firing, this cpu isn't doing much */ |
75152114 | 354 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { |
1da177e4 LT |
355 | /* |
356 | * Ayiee, looks like this CPU is stuck ... | |
357 | * wait a few IRQs (5 seconds) before doing the oops ... | |
358 | */ | |
75152114 | 359 | local_inc(&__get_cpu_var(alert_counter)); |
f2802e7f | 360 | if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz) |
fac58550 AK |
361 | die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs, |
362 | panic_on_timeout); | |
1da177e4 | 363 | } else { |
75152114 AK |
364 | __get_cpu_var(last_irq_sum) = sum; |
365 | local_set(&__get_cpu_var(alert_counter), 0); | |
1da177e4 | 366 | } |
f2802e7f DZ |
367 | |
368 | /* see if the nmi watchdog went off */ | |
05cb007d AK |
369 | if (!__get_cpu_var(wd_enabled)) |
370 | return rc; | |
371 | switch (nmi_watchdog) { | |
372 | case NMI_LOCAL_APIC: | |
373 | rc |= lapic_wd_event(nmi_hz); | |
374 | break; | |
375 | case NMI_IO_APIC: | |
376 | /* don't know how to accurately check for this. | |
377 | * just assume it was a watchdog timer interrupt | |
378 | * This matches the old behaviour. | |
379 | */ | |
380 | rc = 1; | |
381 | break; | |
75152114 | 382 | } |
3adbbcce | 383 | return rc; |
1da177e4 LT |
384 | } |
385 | ||
8f4e956b AK |
386 | static unsigned ignore_nmis; |
387 | ||
eddb6fb9 | 388 | asmlinkage __kprobes void do_nmi(struct pt_regs * regs, long error_code) |
1da177e4 | 389 | { |
1da177e4 LT |
390 | nmi_enter(); |
391 | add_pda(__nmi_count,1); | |
8f4e956b AK |
392 | if (!ignore_nmis) |
393 | default_do_nmi(regs); | |
1da177e4 LT |
394 | nmi_exit(); |
395 | } | |
396 | ||
3adbbcce DZ |
397 | int do_nmi_callback(struct pt_regs * regs, int cpu) |
398 | { | |
2fbe7b25 DZ |
399 | #ifdef CONFIG_SYSCTL |
400 | if (unknown_nmi_panic) | |
401 | return unknown_nmi_panic_callback(regs, cpu); | |
402 | #endif | |
403 | return 0; | |
1da177e4 LT |
404 | } |
405 | ||
8f4e956b AK |
406 | void stop_nmi(void) |
407 | { | |
408 | acpi_nmi_disable(); | |
409 | ignore_nmis++; | |
410 | } | |
411 | ||
412 | void restart_nmi(void) | |
413 | { | |
414 | ignore_nmis--; | |
415 | acpi_nmi_enable(); | |
416 | } | |
417 | ||
1da177e4 LT |
418 | #ifdef CONFIG_SYSCTL |
419 | ||
420 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | |
421 | { | |
422 | unsigned char reason = get_nmi_reason(); | |
423 | char buf[64]; | |
424 | ||
2fbe7b25 | 425 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); |
fac58550 | 426 | die_nmi(buf, regs, 1); /* Always panic here */ |
1da177e4 LT |
427 | return 0; |
428 | } | |
429 | ||
407984f1 DZ |
430 | /* |
431 | * proc handler for /proc/sys/kernel/nmi | |
432 | */ | |
433 | int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | |
434 | void __user *buffer, size_t *length, loff_t *ppos) | |
435 | { | |
436 | int old_state; | |
437 | ||
438 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | |
439 | old_state = nmi_watchdog_enabled; | |
440 | proc_dointvec(table, write, file, buffer, length, ppos); | |
441 | if (!!old_state == !!nmi_watchdog_enabled) | |
442 | return 0; | |
443 | ||
0328ecef | 444 | if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) { |
407984f1 | 445 | printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); |
e33e89ab | 446 | return -EIO; |
407984f1 DZ |
447 | } |
448 | ||
449 | /* if nmi_watchdog is not set yet, then set it */ | |
450 | nmi_watchdog_default(); | |
451 | ||
e33e89ab | 452 | if (nmi_watchdog == NMI_LOCAL_APIC) { |
407984f1 DZ |
453 | if (nmi_watchdog_enabled) |
454 | enable_lapic_nmi_watchdog(); | |
455 | else | |
456 | disable_lapic_nmi_watchdog(); | |
407984f1 | 457 | } else { |
e33e89ab | 458 | printk( KERN_WARNING |
407984f1 DZ |
459 | "NMI watchdog doesn't know what hardware to touch\n"); |
460 | return -EIO; | |
461 | } | |
462 | return 0; | |
463 | } | |
464 | ||
1da177e4 LT |
465 | #endif |
466 | ||
bb81a09e AM |
467 | void __trigger_all_cpu_backtrace(void) |
468 | { | |
469 | int i; | |
470 | ||
471 | backtrace_mask = cpu_online_map; | |
472 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ | |
473 | for (i = 0; i < 10 * 1000; i++) { | |
474 | if (cpus_empty(backtrace_mask)) | |
475 | break; | |
476 | mdelay(1); | |
477 | } | |
478 | } | |
479 | ||
1da177e4 LT |
480 | EXPORT_SYMBOL(nmi_active); |
481 | EXPORT_SYMBOL(nmi_watchdog); | |
1da177e4 | 482 | EXPORT_SYMBOL(touch_nmi_watchdog); |