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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * NMI watchdog support on APIC systems |
3 | * | |
4 | * Started by Ingo Molnar <mingo@redhat.com> | |
5 | * | |
6 | * Fixes: | |
7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | |
8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | |
9 | * Pavel Machek and | |
10 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | |
11 | */ | |
12 | ||
bb81a09e | 13 | #include <linux/nmi.h> |
1da177e4 | 14 | #include <linux/mm.h> |
1da177e4 | 15 | #include <linux/delay.h> |
1da177e4 | 16 | #include <linux/interrupt.h> |
1da177e4 LT |
17 | #include <linux/module.h> |
18 | #include <linux/sysdev.h> | |
1da177e4 | 19 | #include <linux/sysctl.h> |
eddb6fb9 | 20 | #include <linux/kprobes.h> |
bb81a09e | 21 | #include <linux/cpumask.h> |
1eeb66a1 | 22 | #include <linux/kdebug.h> |
1da177e4 LT |
23 | |
24 | #include <asm/smp.h> | |
1da177e4 | 25 | #include <asm/nmi.h> |
1da177e4 | 26 | #include <asm/proto.h> |
553f265f | 27 | #include <asm/mce.h> |
1da177e4 | 28 | |
e32ede19 GOC |
29 | #include <mach_traps.h> |
30 | ||
29cbc78b AK |
31 | int unknown_nmi_panic; |
32 | int nmi_watchdog_enabled; | |
33 | int panic_on_unrecovered_nmi; | |
34 | ||
1714f9bf | 35 | static cpumask_t backtrace_mask = CPU_MASK_NONE; |
828f0afd | 36 | |
1da177e4 | 37 | /* nmi_active: |
f2802e7f DZ |
38 | * >0: the lapic NMI watchdog is active, but can be disabled |
39 | * <0: the lapic NMI watchdog has not been set up, and cannot | |
1da177e4 | 40 | * be enabled |
f2802e7f | 41 | * 0: the lapic NMI watchdog is disabled, but can be enabled |
1da177e4 | 42 | */ |
f2802e7f | 43 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ |
867ab545 | 44 | static int panic_on_timeout; |
1da177e4 LT |
45 | |
46 | unsigned int nmi_watchdog = NMI_DEFAULT; | |
47 | static unsigned int nmi_hz = HZ; | |
1da177e4 | 48 | |
05cb007d | 49 | static DEFINE_PER_CPU(short, wd_enabled); |
1da177e4 | 50 | |
1da177e4 | 51 | /* Run after command line and cpu_init init, but before all other checks */ |
e33e89ab | 52 | void nmi_watchdog_default(void) |
1da177e4 LT |
53 | { |
54 | if (nmi_watchdog != NMI_DEFAULT) | |
55 | return; | |
8ce5e3e4 | 56 | nmi_watchdog = NMI_NONE; |
1da177e4 LT |
57 | } |
58 | ||
92715e28 RT |
59 | static int endflag __initdata = 0; |
60 | ||
75152114 AK |
61 | #ifdef CONFIG_SMP |
62 | /* The performance counters used by NMI_LOCAL_APIC don't trigger when | |
63 | * the CPU is idle. To make sure the NMI watchdog really ticks on all | |
64 | * CPUs during the test make them busy. | |
65 | */ | |
66 | static __init void nmi_cpu_busy(void *data) | |
1da177e4 | 67 | { |
366c7f55 | 68 | local_irq_enable_in_hardirq(); |
75152114 AK |
69 | /* Intentionally don't use cpu_relax here. This is |
70 | to make sure that the performance counter really ticks, | |
71 | even if there is a simulator or similar that catches the | |
72 | pause instruction. On a real HT machine this is fine because | |
73 | all other CPUs are busy with "useless" delay loops and don't | |
74 | care if they get somewhat less cycles. */ | |
92715e28 RT |
75 | while (endflag == 0) |
76 | mb(); | |
1da177e4 | 77 | } |
75152114 | 78 | #endif |
1da177e4 | 79 | |
416b7218 | 80 | int __init check_nmi_watchdog(void) |
1da177e4 | 81 | { |
416b7218 | 82 | int *prev_nmi_count; |
1da177e4 LT |
83 | int cpu; |
84 | ||
416b7218 | 85 | if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED)) |
f2802e7f DZ |
86 | return 0; |
87 | ||
88 | if (!atomic_read(&nmi_active)) | |
89 | return 0; | |
90 | ||
416b7218 HS |
91 | prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); |
92 | if (!prev_nmi_count) | |
75152114 | 93 | return -1; |
1da177e4 | 94 | |
416b7218 | 95 | printk(KERN_INFO "Testing NMI watchdog ... "); |
ac6b931c | 96 | |
7554c3f0 | 97 | #ifdef CONFIG_SMP |
75152114 | 98 | if (nmi_watchdog == NMI_LOCAL_APIC) |
8691e5a8 | 99 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0); |
7554c3f0 | 100 | #endif |
1da177e4 LT |
101 | |
102 | for (cpu = 0; cpu < NR_CPUS; cpu++) | |
416b7218 | 103 | prev_nmi_count[cpu] = cpu_pda(cpu)->__nmi_count; |
1da177e4 | 104 | local_irq_enable(); |
0fb2ebfc | 105 | mdelay((20*1000)/nmi_hz); // wait 20 ticks |
1da177e4 | 106 | |
394e3902 | 107 | for_each_online_cpu(cpu) { |
05cb007d | 108 | if (!per_cpu(wd_enabled, cpu)) |
f2802e7f | 109 | continue; |
416b7218 | 110 | if (cpu_pda(cpu)->__nmi_count - prev_nmi_count[cpu] <= 5) { |
75bc122c DZ |
111 | printk(KERN_WARNING "WARNING: CPU#%d: NMI " |
112 | "appears to be stuck (%d->%d)!\n", | |
416b7218 HS |
113 | cpu, |
114 | prev_nmi_count[cpu], | |
115 | cpu_pda(cpu)->__nmi_count); | |
05cb007d | 116 | per_cpu(wd_enabled, cpu) = 0; |
f2802e7f | 117 | atomic_dec(&nmi_active); |
1da177e4 LT |
118 | } |
119 | } | |
416b7218 | 120 | endflag = 1; |
f2802e7f | 121 | if (!atomic_read(&nmi_active)) { |
416b7218 | 122 | kfree(prev_nmi_count); |
f2802e7f DZ |
123 | atomic_set(&nmi_active, -1); |
124 | return -1; | |
125 | } | |
1da177e4 LT |
126 | printk("OK.\n"); |
127 | ||
128 | /* now that we know it works we can reduce NMI frequency to | |
129 | something more reasonable; makes a difference in some configs */ | |
05cb007d AK |
130 | if (nmi_watchdog == NMI_LOCAL_APIC) |
131 | nmi_hz = lapic_adjust_nmi_hz(1); | |
1da177e4 | 132 | |
416b7218 | 133 | kfree(prev_nmi_count); |
1da177e4 LT |
134 | return 0; |
135 | } | |
136 | ||
867ab545 | 137 | static int __init setup_nmi_watchdog(char *str) |
1da177e4 LT |
138 | { |
139 | int nmi; | |
140 | ||
141 | if (!strncmp(str,"panic",5)) { | |
142 | panic_on_timeout = 1; | |
143 | str = strchr(str, ','); | |
144 | if (!str) | |
145 | return 1; | |
146 | ++str; | |
147 | } | |
148 | ||
149 | get_option(&str, &nmi); | |
150 | ||
f2802e7f | 151 | if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE)) |
1da177e4 | 152 | return 0; |
f2802e7f | 153 | |
75152114 | 154 | nmi_watchdog = nmi; |
1da177e4 LT |
155 | return 1; |
156 | } | |
157 | ||
158 | __setup("nmi_watchdog=", setup_nmi_watchdog); | |
159 | ||
1da177e4 LT |
160 | #ifdef CONFIG_PM |
161 | ||
162 | static int nmi_pm_active; /* nmi_active before suspend */ | |
163 | ||
829ca9a3 | 164 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 | 165 | { |
4038f901 | 166 | /* only CPU0 goes here, other CPUs should be offline */ |
f2802e7f | 167 | nmi_pm_active = atomic_read(&nmi_active); |
4038f901 SL |
168 | stop_apic_nmi_watchdog(NULL); |
169 | BUG_ON(atomic_read(&nmi_active) != 0); | |
1da177e4 LT |
170 | return 0; |
171 | } | |
172 | ||
173 | static int lapic_nmi_resume(struct sys_device *dev) | |
174 | { | |
4038f901 SL |
175 | /* only CPU0 goes here, other CPUs should be offline */ |
176 | if (nmi_pm_active > 0) { | |
177 | setup_apic_nmi_watchdog(NULL); | |
178 | touch_nmi_watchdog(); | |
179 | } | |
1da177e4 LT |
180 | return 0; |
181 | } | |
182 | ||
183 | static struct sysdev_class nmi_sysclass = { | |
af5ca3f4 | 184 | .name = "lapic_nmi", |
1da177e4 LT |
185 | .resume = lapic_nmi_resume, |
186 | .suspend = lapic_nmi_suspend, | |
187 | }; | |
188 | ||
189 | static struct sys_device device_lapic_nmi = { | |
416b7218 | 190 | .id = 0, |
1da177e4 LT |
191 | .cls = &nmi_sysclass, |
192 | }; | |
193 | ||
194 | static int __init init_lapic_nmi_sysfs(void) | |
195 | { | |
196 | int error; | |
197 | ||
f2802e7f DZ |
198 | /* should really be a BUG_ON but b/c this is an |
199 | * init call, it just doesn't work. -dcz | |
200 | */ | |
201 | if (nmi_watchdog != NMI_LOCAL_APIC) | |
202 | return 0; | |
203 | ||
416b7218 | 204 | if (atomic_read(&nmi_active) < 0) |
1da177e4 LT |
205 | return 0; |
206 | ||
207 | error = sysdev_class_register(&nmi_sysclass); | |
208 | if (!error) | |
209 | error = sysdev_register(&device_lapic_nmi); | |
210 | return error; | |
211 | } | |
212 | /* must come after the local APIC's device_initcall() */ | |
213 | late_initcall(init_lapic_nmi_sysfs); | |
214 | ||
215 | #endif /* CONFIG_PM */ | |
216 | ||
416b7218 HS |
217 | static void __acpi_nmi_enable(void *__unused) |
218 | { | |
219 | apic_write(APIC_LVT0, APIC_DM_NMI); | |
220 | } | |
221 | ||
222 | /* | |
223 | * Enable timer based NMIs on all CPUs: | |
224 | */ | |
225 | void acpi_nmi_enable(void) | |
226 | { | |
227 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
228 | on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); | |
229 | } | |
230 | ||
231 | static void __acpi_nmi_disable(void *__unused) | |
232 | { | |
233 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | |
234 | } | |
235 | ||
236 | /* | |
237 | * Disable timer based NMIs on all CPUs: | |
238 | */ | |
239 | void acpi_nmi_disable(void) | |
240 | { | |
241 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
242 | on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); | |
243 | } | |
244 | ||
f2802e7f DZ |
245 | void setup_apic_nmi_watchdog(void *unused) |
246 | { | |
416b7218 | 247 | if (__get_cpu_var(wd_enabled)) |
4038f901 SL |
248 | return; |
249 | ||
250 | /* cheap hack to support suspend/resume */ | |
251 | /* if cpu0 is not active neither should the other cpus */ | |
252 | if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0)) | |
253 | return; | |
254 | ||
05cb007d AK |
255 | switch (nmi_watchdog) { |
256 | case NMI_LOCAL_APIC: | |
257 | __get_cpu_var(wd_enabled) = 1; | |
258 | if (lapic_watchdog_init(nmi_hz) < 0) { | |
259 | __get_cpu_var(wd_enabled) = 0; | |
75152114 | 260 | return; |
f2802e7f | 261 | } |
05cb007d AK |
262 | /* FALL THROUGH */ |
263 | case NMI_IO_APIC: | |
264 | __get_cpu_var(wd_enabled) = 1; | |
265 | atomic_inc(&nmi_active); | |
f2802e7f | 266 | } |
f2802e7f | 267 | } |
75152114 | 268 | |
4038f901 | 269 | void stop_apic_nmi_watchdog(void *unused) |
f2802e7f DZ |
270 | { |
271 | /* only support LOCAL and IO APICs for now */ | |
272 | if ((nmi_watchdog != NMI_LOCAL_APIC) && | |
273 | (nmi_watchdog != NMI_IO_APIC)) | |
274 | return; | |
05cb007d | 275 | if (__get_cpu_var(wd_enabled) == 0) |
4038f901 | 276 | return; |
05cb007d AK |
277 | if (nmi_watchdog == NMI_LOCAL_APIC) |
278 | lapic_watchdog_stop(); | |
279 | __get_cpu_var(wd_enabled) = 0; | |
f2802e7f | 280 | atomic_dec(&nmi_active); |
1da177e4 LT |
281 | } |
282 | ||
283 | /* | |
284 | * the best way to detect whether a CPU has a 'hard lockup' problem | |
285 | * is to check it's local APIC timer IRQ counts. If they are not | |
286 | * changing then that CPU has some problem. | |
287 | * | |
288 | * as these watchdog NMI IRQs are generated on every CPU, we only | |
289 | * have to check the current processor. | |
1da177e4 LT |
290 | */ |
291 | ||
75152114 AK |
292 | static DEFINE_PER_CPU(unsigned, last_irq_sum); |
293 | static DEFINE_PER_CPU(local_t, alert_counter); | |
294 | static DEFINE_PER_CPU(int, nmi_touch); | |
1da177e4 | 295 | |
567f3e42 | 296 | void touch_nmi_watchdog(void) |
1da177e4 | 297 | { |
99019e91 JB |
298 | if (nmi_watchdog > 0) { |
299 | unsigned cpu; | |
1da177e4 | 300 | |
99019e91 JB |
301 | /* |
302 | * Tell other CPUs to reset their alert counters. We cannot | |
303 | * do it ourselves because the alert count increase is not | |
304 | * atomic. | |
305 | */ | |
567f3e42 AM |
306 | for_each_present_cpu(cpu) { |
307 | if (per_cpu(nmi_touch, cpu) != 1) | |
308 | per_cpu(nmi_touch, cpu) = 1; | |
309 | } | |
99019e91 | 310 | } |
8446f1d3 | 311 | |
416b7218 | 312 | touch_softlockup_watchdog(); |
1da177e4 | 313 | } |
416b7218 | 314 | EXPORT_SYMBOL(touch_nmi_watchdog); |
1da177e4 | 315 | |
5deb45e3 SR |
316 | notrace __kprobes int |
317 | nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | |
1da177e4 | 318 | { |
75152114 AK |
319 | int sum; |
320 | int touched = 0; | |
bb81a09e | 321 | int cpu = smp_processor_id(); |
05cb007d | 322 | int rc = 0; |
f2802e7f DZ |
323 | |
324 | /* check for other users first */ | |
325 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | |
326 | == NOTIFY_STOP) { | |
3adbbcce | 327 | rc = 1; |
f2802e7f DZ |
328 | touched = 1; |
329 | } | |
1da177e4 | 330 | |
4e77ae3e | 331 | sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs); |
75152114 AK |
332 | if (__get_cpu_var(nmi_touch)) { |
333 | __get_cpu_var(nmi_touch) = 0; | |
334 | touched = 1; | |
335 | } | |
f2802e7f | 336 | |
bb81a09e AM |
337 | if (cpu_isset(cpu, backtrace_mask)) { |
338 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | |
339 | ||
340 | spin_lock(&lock); | |
341 | printk("NMI backtrace for cpu %d\n", cpu); | |
342 | dump_stack(); | |
343 | spin_unlock(&lock); | |
344 | cpu_clear(cpu, backtrace_mask); | |
345 | } | |
346 | ||
553f265f AK |
347 | #ifdef CONFIG_X86_MCE |
348 | /* Could check oops_in_progress here too, but it's safer | |
349 | not too */ | |
350 | if (atomic_read(&mce_entry) > 0) | |
351 | touched = 1; | |
352 | #endif | |
f2802e7f | 353 | /* if the apic timer isn't firing, this cpu isn't doing much */ |
75152114 | 354 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { |
1da177e4 LT |
355 | /* |
356 | * Ayiee, looks like this CPU is stuck ... | |
357 | * wait a few IRQs (5 seconds) before doing the oops ... | |
358 | */ | |
75152114 | 359 | local_inc(&__get_cpu_var(alert_counter)); |
f2802e7f | 360 | if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz) |
fac58550 AK |
361 | die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs, |
362 | panic_on_timeout); | |
1da177e4 | 363 | } else { |
75152114 AK |
364 | __get_cpu_var(last_irq_sum) = sum; |
365 | local_set(&__get_cpu_var(alert_counter), 0); | |
1da177e4 | 366 | } |
f2802e7f DZ |
367 | |
368 | /* see if the nmi watchdog went off */ | |
05cb007d AK |
369 | if (!__get_cpu_var(wd_enabled)) |
370 | return rc; | |
371 | switch (nmi_watchdog) { | |
372 | case NMI_LOCAL_APIC: | |
373 | rc |= lapic_wd_event(nmi_hz); | |
374 | break; | |
375 | case NMI_IO_APIC: | |
376 | /* don't know how to accurately check for this. | |
377 | * just assume it was a watchdog timer interrupt | |
378 | * This matches the old behaviour. | |
379 | */ | |
380 | rc = 1; | |
381 | break; | |
75152114 | 382 | } |
3adbbcce | 383 | return rc; |
1da177e4 LT |
384 | } |
385 | ||
8f4e956b AK |
386 | static unsigned ignore_nmis; |
387 | ||
5deb45e3 SR |
388 | asmlinkage notrace __kprobes void |
389 | do_nmi(struct pt_regs *regs, long error_code) | |
1da177e4 | 390 | { |
1da177e4 LT |
391 | nmi_enter(); |
392 | add_pda(__nmi_count,1); | |
8f4e956b AK |
393 | if (!ignore_nmis) |
394 | default_do_nmi(regs); | |
1da177e4 LT |
395 | nmi_exit(); |
396 | } | |
397 | ||
8f4e956b AK |
398 | void stop_nmi(void) |
399 | { | |
400 | acpi_nmi_disable(); | |
401 | ignore_nmis++; | |
402 | } | |
403 | ||
404 | void restart_nmi(void) | |
405 | { | |
406 | ignore_nmis--; | |
407 | acpi_nmi_enable(); | |
408 | } | |
409 | ||
1da177e4 LT |
410 | #ifdef CONFIG_SYSCTL |
411 | ||
412 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | |
413 | { | |
414 | unsigned char reason = get_nmi_reason(); | |
415 | char buf[64]; | |
416 | ||
2fbe7b25 | 417 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); |
fac58550 | 418 | die_nmi(buf, regs, 1); /* Always panic here */ |
1da177e4 LT |
419 | return 0; |
420 | } | |
421 | ||
407984f1 DZ |
422 | /* |
423 | * proc handler for /proc/sys/kernel/nmi | |
424 | */ | |
425 | int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | |
426 | void __user *buffer, size_t *length, loff_t *ppos) | |
427 | { | |
428 | int old_state; | |
429 | ||
430 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | |
431 | old_state = nmi_watchdog_enabled; | |
432 | proc_dointvec(table, write, file, buffer, length, ppos); | |
433 | if (!!old_state == !!nmi_watchdog_enabled) | |
434 | return 0; | |
435 | ||
0328ecef | 436 | if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) { |
407984f1 | 437 | printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); |
e33e89ab | 438 | return -EIO; |
407984f1 DZ |
439 | } |
440 | ||
441 | /* if nmi_watchdog is not set yet, then set it */ | |
442 | nmi_watchdog_default(); | |
443 | ||
e33e89ab | 444 | if (nmi_watchdog == NMI_LOCAL_APIC) { |
407984f1 DZ |
445 | if (nmi_watchdog_enabled) |
446 | enable_lapic_nmi_watchdog(); | |
447 | else | |
448 | disable_lapic_nmi_watchdog(); | |
407984f1 | 449 | } else { |
e33e89ab | 450 | printk( KERN_WARNING |
407984f1 DZ |
451 | "NMI watchdog doesn't know what hardware to touch\n"); |
452 | return -EIO; | |
453 | } | |
454 | return 0; | |
455 | } | |
456 | ||
1da177e4 LT |
457 | #endif |
458 | ||
a062bae9 LZ |
459 | int do_nmi_callback(struct pt_regs *regs, int cpu) |
460 | { | |
461 | #ifdef CONFIG_SYSCTL | |
462 | if (unknown_nmi_panic) | |
463 | return unknown_nmi_panic_callback(regs, cpu); | |
464 | #endif | |
465 | return 0; | |
466 | } | |
467 | ||
bb81a09e AM |
468 | void __trigger_all_cpu_backtrace(void) |
469 | { | |
470 | int i; | |
471 | ||
472 | backtrace_mask = cpu_online_map; | |
473 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ | |
474 | for (i = 0; i < 10 * 1000; i++) { | |
475 | if (cpus_empty(backtrace_mask)) | |
476 | break; | |
477 | mdelay(1); | |
478 | } | |
479 | } | |
480 | ||
1da177e4 LT |
481 | EXPORT_SYMBOL(nmi_active); |
482 | EXPORT_SYMBOL(nmi_watchdog); |