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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
0a0f0d8b | 2 | #include <linux/dma-map-ops.h> |
ea8c64ac | 3 | #include <linux/dma-direct.h> |
c53c47aa | 4 | #include <linux/iommu.h> |
cb5867a5 | 5 | #include <linux/dmar.h> |
69c60c88 | 6 | #include <linux/export.h> |
57c8a661 | 7 | #include <linux/memblock.h> |
5a0e3ad6 | 8 | #include <linux/gfp.h> |
bca5c096 | 9 | #include <linux/pci.h> |
cb5867a5 | 10 | |
116890d5 GC |
11 | #include <asm/proto.h> |
12 | #include <asm/dma.h> | |
46a7fa27 | 13 | #include <asm/iommu.h> |
1d9b16d1 | 14 | #include <asm/gart.h> |
b4941a9a | 15 | #include <asm/x86_init.h> |
ee1f284f | 16 | #include <asm/iommu_table.h> |
459121c9 | 17 | |
0ead51c3 | 18 | static bool disable_dac_quirk __read_mostly; |
3b15e581 | 19 | |
356da6d0 | 20 | const struct dma_map_ops *dma_ops; |
85c246ee GC |
21 | EXPORT_SYMBOL(dma_ops); |
22 | ||
f9c258de GC |
23 | #ifdef CONFIG_IOMMU_DEBUG |
24 | int panic_on_overflow __read_mostly = 1; | |
25 | int force_iommu __read_mostly = 1; | |
26 | #else | |
27 | int panic_on_overflow __read_mostly = 0; | |
28 | int force_iommu __read_mostly = 0; | |
29 | #endif | |
30 | ||
fae9a0d8 GC |
31 | int iommu_merge __read_mostly = 0; |
32 | ||
33 | int no_iommu __read_mostly; | |
34 | /* Set this to 1 if there is a HW IOMMU in the system */ | |
35 | int iommu_detected __read_mostly = 0; | |
36 | ||
ee1f284f KRW |
37 | extern struct iommu_table_entry __iommu_table[], __iommu_table_end[]; |
38 | ||
116890d5 GC |
39 | void __init pci_iommu_alloc(void) |
40 | { | |
ee1f284f KRW |
41 | struct iommu_table_entry *p; |
42 | ||
ee1f284f KRW |
43 | sort_iommu_table(__iommu_table, __iommu_table_end); |
44 | check_iommu_entries(__iommu_table, __iommu_table_end); | |
116890d5 | 45 | |
ee1f284f KRW |
46 | for (p = __iommu_table; p < __iommu_table_end; p++) { |
47 | if (p && p->detect && p->detect() > 0) { | |
48 | p->flags |= IOMMU_DETECTED; | |
49 | if (p->early_init) | |
50 | p->early_init(); | |
51 | if (p->flags & IOMMU_FINISH_IF_DETECTED) | |
52 | break; | |
53 | } | |
54 | } | |
116890d5 | 55 | } |
0a2b9a6e | 56 | |
fae9a0d8 | 57 | /* |
cb1aaebe | 58 | * See <Documentation/x86/x86_64/boot-options.rst> for the iommu kernel |
395cf969 | 59 | * parameter documentation. |
fae9a0d8 GC |
60 | */ |
61 | static __init int iommu_setup(char *p) | |
62 | { | |
63 | iommu_merge = 1; | |
64 | ||
65 | if (!p) | |
66 | return -EINVAL; | |
67 | ||
68 | while (*p) { | |
69 | if (!strncmp(p, "off", 3)) | |
70 | no_iommu = 1; | |
71 | /* gart_parse_options has more force support */ | |
72 | if (!strncmp(p, "force", 5)) | |
73 | force_iommu = 1; | |
74 | if (!strncmp(p, "noforce", 7)) { | |
75 | iommu_merge = 0; | |
76 | force_iommu = 0; | |
77 | } | |
78 | ||
79 | if (!strncmp(p, "biomerge", 8)) { | |
fae9a0d8 GC |
80 | iommu_merge = 1; |
81 | force_iommu = 1; | |
82 | } | |
83 | if (!strncmp(p, "panic", 5)) | |
84 | panic_on_overflow = 1; | |
85 | if (!strncmp(p, "nopanic", 7)) | |
86 | panic_on_overflow = 0; | |
87 | if (!strncmp(p, "merge", 5)) { | |
88 | iommu_merge = 1; | |
89 | force_iommu = 1; | |
90 | } | |
91 | if (!strncmp(p, "nomerge", 7)) | |
92 | iommu_merge = 0; | |
93 | if (!strncmp(p, "forcesac", 8)) | |
06e9552f | 94 | pr_warn("forcesac option ignored.\n"); |
fae9a0d8 | 95 | if (!strncmp(p, "allowdac", 8)) |
098afd98 | 96 | pr_warn("allowdac option ignored.\n"); |
fae9a0d8 | 97 | if (!strncmp(p, "nodac", 5)) |
098afd98 | 98 | pr_warn("nodac option ignored.\n"); |
fae9a0d8 | 99 | if (!strncmp(p, "usedac", 6)) { |
0ead51c3 | 100 | disable_dac_quirk = true; |
fae9a0d8 GC |
101 | return 1; |
102 | } | |
103 | #ifdef CONFIG_SWIOTLB | |
104 | if (!strncmp(p, "soft", 4)) | |
105 | swiotlb = 1; | |
3238c0c4 | 106 | #endif |
80286879 | 107 | if (!strncmp(p, "pt", 2)) |
c53c47aa | 108 | iommu_set_default_passthrough(true); |
58d11317 | 109 | if (!strncmp(p, "nopt", 4)) |
c53c47aa | 110 | iommu_set_default_translated(true); |
fae9a0d8 | 111 | |
fae9a0d8 | 112 | gart_parse_options(p); |
fae9a0d8 | 113 | |
fae9a0d8 GC |
114 | p += strcspn(p, ","); |
115 | if (*p == ',') | |
116 | ++p; | |
117 | } | |
118 | return 0; | |
119 | } | |
120 | early_param("iommu", iommu_setup); | |
121 | ||
cb5867a5 GC |
122 | static int __init pci_iommu_init(void) |
123 | { | |
ee1f284f | 124 | struct iommu_table_entry *p; |
2118d0c5 | 125 | |
d07c1be0 FT |
126 | x86_init.iommu.iommu_init(); |
127 | ||
ee1f284f KRW |
128 | for (p = __iommu_table; p < __iommu_table_end; p++) { |
129 | if (p && (p->flags & IOMMU_DETECTED) && p->late_init) | |
130 | p->late_init(); | |
131 | } | |
75f1cdf1 | 132 | |
cb5867a5 GC |
133 | return 0; |
134 | } | |
cb5867a5 | 135 | /* Must execute after PCI subsystem */ |
9a821b23 | 136 | rootfs_initcall(pci_iommu_init); |
3b15e581 FY |
137 | |
138 | #ifdef CONFIG_PCI | |
139 | /* Many VIA bridges seem to corrupt data for DAC. Disable it here */ | |
140 | ||
0ead51c3 CH |
141 | static int via_no_dac_cb(struct pci_dev *pdev, void *data) |
142 | { | |
a7ba70f1 | 143 | pdev->dev.bus_dma_limit = DMA_BIT_MASK(32); |
0ead51c3 CH |
144 | return 0; |
145 | } | |
146 | ||
a18e3690 | 147 | static void via_no_dac(struct pci_dev *dev) |
3b15e581 | 148 | { |
0ead51c3 | 149 | if (!disable_dac_quirk) { |
13bf7576 | 150 | dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n"); |
0ead51c3 | 151 | pci_walk_bus(dev->subordinate, via_no_dac_cb, NULL); |
3b15e581 FY |
152 | } |
153 | } | |
c484b241 YL |
154 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, |
155 | PCI_CLASS_BRIDGE_PCI, 8, via_no_dac); | |
3b15e581 | 156 | #endif |