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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1995 Linus Torvalds |
3 | * | |
4 | * Pentium III FXSR, SSE support | |
5 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
6 | */ | |
7 | ||
8 | /* | |
9 | * This file handles the architecture-dependent parts of process handling.. | |
10 | */ | |
11 | ||
f3705136 | 12 | #include <linux/cpu.h> |
1da177e4 LT |
13 | #include <linux/errno.h> |
14 | #include <linux/sched.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/elfcore.h> | |
19 | #include <linux/smp.h> | |
1da177e4 LT |
20 | #include <linux/stddef.h> |
21 | #include <linux/slab.h> | |
22 | #include <linux/vmalloc.h> | |
23 | #include <linux/user.h> | |
1da177e4 | 24 | #include <linux/interrupt.h> |
1da177e4 LT |
25 | #include <linux/delay.h> |
26 | #include <linux/reboot.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/mc146818rtc.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/kallsyms.h> | |
31 | #include <linux/ptrace.h> | |
c16b63e0 | 32 | #include <linux/personality.h> |
7c3576d2 | 33 | #include <linux/percpu.h> |
529e25f6 | 34 | #include <linux/prctl.h> |
8b96f011 | 35 | #include <linux/ftrace.h> |
befa9e78 JSR |
36 | #include <linux/uaccess.h> |
37 | #include <linux/io.h> | |
38 | #include <linux/kdebug.h> | |
1da177e4 | 39 | |
1da177e4 | 40 | #include <asm/pgtable.h> |
1da177e4 LT |
41 | #include <asm/ldt.h> |
42 | #include <asm/processor.h> | |
43 | #include <asm/i387.h> | |
1361b83a | 44 | #include <asm/fpu-internal.h> |
1da177e4 LT |
45 | #include <asm/desc.h> |
46 | #ifdef CONFIG_MATH_EMULATION | |
47 | #include <asm/math_emu.h> | |
48 | #endif | |
49 | ||
1da177e4 LT |
50 | #include <linux/err.h> |
51 | ||
f3705136 ZM |
52 | #include <asm/tlbflush.h> |
53 | #include <asm/cpu.h> | |
1eda8149 | 54 | #include <asm/idle.h> |
bbc1f698 | 55 | #include <asm/syscalls.h> |
66cb5917 | 56 | #include <asm/debugreg.h> |
f05e798a | 57 | #include <asm/switch_to.h> |
f3705136 | 58 | |
1da177e4 | 59 | asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); |
7076aada | 60 | asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread"); |
1da177e4 | 61 | |
1da177e4 LT |
62 | /* |
63 | * Return saved PC of a blocked thread. | |
64 | */ | |
65 | unsigned long thread_saved_pc(struct task_struct *tsk) | |
66 | { | |
faca6227 | 67 | return ((unsigned long *)tsk->thread.sp)[3]; |
1da177e4 LT |
68 | } |
69 | ||
e2ce07c8 | 70 | void __show_regs(struct pt_regs *regs, int all) |
1da177e4 LT |
71 | { |
72 | unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; | |
bb1995d5 | 73 | unsigned long d0, d1, d2, d3, d6, d7; |
65ea5b03 | 74 | unsigned long sp; |
9d975ebd PE |
75 | unsigned short ss, gs; |
76 | ||
77 | if (user_mode_vm(regs)) { | |
65ea5b03 PA |
78 | sp = regs->sp; |
79 | ss = regs->ss & 0xffff; | |
d9a89a26 | 80 | gs = get_user_gs(regs); |
9d975ebd | 81 | } else { |
def3c5d0 | 82 | sp = kernel_stack_pointer(regs); |
9d975ebd PE |
83 | savesegment(ss, ss); |
84 | savesegment(gs, gs); | |
85 | } | |
1da177e4 | 86 | |
d015a092 | 87 | printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n", |
92bc2056 | 88 | (u16)regs->cs, regs->ip, regs->flags, |
9d975ebd | 89 | smp_processor_id()); |
65ea5b03 | 90 | print_symbol("EIP is at %s\n", regs->ip); |
1da177e4 | 91 | |
d015a092 | 92 | printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", |
65ea5b03 | 93 | regs->ax, regs->bx, regs->cx, regs->dx); |
d015a092 | 94 | printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", |
65ea5b03 | 95 | regs->si, regs->di, regs->bp, sp); |
d015a092 | 96 | printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n", |
92bc2056 | 97 | (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss); |
9d975ebd PE |
98 | |
99 | if (!all) | |
100 | return; | |
1da177e4 | 101 | |
4bb0d3ec ZA |
102 | cr0 = read_cr0(); |
103 | cr2 = read_cr2(); | |
104 | cr3 = read_cr3(); | |
ff6e8c0d | 105 | cr4 = read_cr4_safe(); |
d015a092 | 106 | printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", |
9d975ebd | 107 | cr0, cr2, cr3, cr4); |
bb1995d5 AS |
108 | |
109 | get_debugreg(d0, 0); | |
110 | get_debugreg(d1, 1); | |
111 | get_debugreg(d2, 2); | |
112 | get_debugreg(d3, 3); | |
bb1995d5 AS |
113 | get_debugreg(d6, 6); |
114 | get_debugreg(d7, 7); | |
4338774c DJ |
115 | |
116 | /* Only print out debug registers if they are in their non-default state. */ | |
117 | if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) && | |
118 | (d6 == DR6_RESERVED) && (d7 == 0x400)) | |
119 | return; | |
120 | ||
121 | printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n", | |
122 | d0, d1, d2, d3); | |
d015a092 | 123 | printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n", |
9d975ebd PE |
124 | d6, d7); |
125 | } | |
bb1995d5 | 126 | |
1da177e4 LT |
127 | void release_thread(struct task_struct *dead_task) |
128 | { | |
2684927c | 129 | BUG_ON(dead_task->mm); |
1da177e4 LT |
130 | release_vm86_irqs(dead_task); |
131 | } | |
132 | ||
6f2c55b8 | 133 | int copy_thread(unsigned long clone_flags, unsigned long sp, |
afa86fc4 | 134 | unsigned long arg, struct task_struct *p) |
1da177e4 | 135 | { |
7076aada | 136 | struct pt_regs *childregs = task_pt_regs(p); |
1da177e4 LT |
137 | struct task_struct *tsk; |
138 | int err; | |
139 | ||
7076aada AV |
140 | p->thread.sp = (unsigned long) childregs; |
141 | p->thread.sp0 = (unsigned long) (childregs+1); | |
142 | ||
1d4b4b29 | 143 | if (unlikely(p->flags & PF_KTHREAD)) { |
7076aada AV |
144 | /* kernel thread */ |
145 | memset(childregs, 0, sizeof(struct pt_regs)); | |
146 | p->thread.ip = (unsigned long) ret_from_kernel_thread; | |
147 | task_user_gs(p) = __KERNEL_STACK_CANARY; | |
148 | childregs->ds = __USER_DS; | |
149 | childregs->es = __USER_DS; | |
150 | childregs->fs = __KERNEL_PERCPU; | |
151 | childregs->bx = sp; /* function */ | |
152 | childregs->bp = arg; | |
153 | childregs->orig_ax = -1; | |
154 | childregs->cs = __KERNEL_CS | get_kernel_rpl(); | |
1adfa76a | 155 | childregs->flags = X86_EFLAGS_IF | X86_EFLAGS_FIXED; |
7076aada AV |
156 | p->fpu_counter = 0; |
157 | p->thread.io_bitmap_ptr = NULL; | |
158 | memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); | |
159 | return 0; | |
160 | } | |
1d4b4b29 | 161 | *childregs = *current_pt_regs(); |
65ea5b03 | 162 | childregs->ax = 0; |
1d4b4b29 AV |
163 | if (sp) |
164 | childregs->sp = sp; | |
f48d9663 | 165 | |
faca6227 | 166 | p->thread.ip = (unsigned long) ret_from_fork; |
1d4b4b29 | 167 | task_user_gs(p) = get_user_gs(current_pt_regs()); |
1da177e4 | 168 | |
cea20ca3 | 169 | p->fpu_counter = 0; |
66cb5917 | 170 | p->thread.io_bitmap_ptr = NULL; |
1da177e4 | 171 | tsk = current; |
66cb5917 | 172 | err = -ENOMEM; |
24f1e32c FW |
173 | |
174 | memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); | |
66cb5917 | 175 | |
b3cf2576 | 176 | if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { |
52978be6 AD |
177 | p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr, |
178 | IO_BITMAP_BYTES, GFP_KERNEL); | |
1da177e4 LT |
179 | if (!p->thread.io_bitmap_ptr) { |
180 | p->thread.io_bitmap_max = 0; | |
181 | return -ENOMEM; | |
182 | } | |
b3cf2576 | 183 | set_tsk_thread_flag(p, TIF_IO_BITMAP); |
1da177e4 LT |
184 | } |
185 | ||
efd1ca52 RM |
186 | err = 0; |
187 | ||
1da177e4 LT |
188 | /* |
189 | * Set a new TLS for the child thread? | |
190 | */ | |
efd1ca52 RM |
191 | if (clone_flags & CLONE_SETTLS) |
192 | err = do_set_thread_area(p, -1, | |
65ea5b03 | 193 | (struct user_desc __user *)childregs->si, 0); |
1da177e4 | 194 | |
1da177e4 LT |
195 | if (err && p->thread.io_bitmap_ptr) { |
196 | kfree(p->thread.io_bitmap_ptr); | |
197 | p->thread.io_bitmap_max = 0; | |
198 | } | |
199 | return err; | |
200 | } | |
201 | ||
513ad84b IM |
202 | void |
203 | start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |
204 | { | |
d9a89a26 | 205 | set_user_gs(regs, 0); |
513ad84b | 206 | regs->fs = 0; |
513ad84b IM |
207 | regs->ds = __USER_DS; |
208 | regs->es = __USER_DS; | |
209 | regs->ss = __USER_DS; | |
210 | regs->cs = __USER_CS; | |
211 | regs->ip = new_ip; | |
212 | regs->sp = new_sp; | |
6783eaa2 | 213 | regs->flags = X86_EFLAGS_IF; |
e76623d6 AV |
214 | /* |
215 | * force it to the iret return path by making it look as if there was | |
216 | * some work pending. | |
217 | */ | |
218 | set_thread_flag(TIF_NOTIFY_RESUME); | |
513ad84b IM |
219 | } |
220 | EXPORT_SYMBOL_GPL(start_thread); | |
221 | ||
1da177e4 LT |
222 | |
223 | /* | |
ea70ef3d | 224 | * switch_to(x,y) should switch tasks from x to y. |
1da177e4 LT |
225 | * |
226 | * We fsave/fwait so that an exception goes off at the right time | |
227 | * (as a call from the fsave or fwait in effect) rather than to | |
228 | * the wrong process. Lazy FP saving no longer makes any sense | |
229 | * with modern CPU's, and this simplifies a lot of things (SMP | |
230 | * and UP become the same). | |
231 | * | |
232 | * NOTE! We used to use the x86 hardware context switching. The | |
233 | * reason for not using it any more becomes apparent when you | |
234 | * try to recover gracefully from saved state that is no longer | |
235 | * valid (stale segment register values in particular). With the | |
236 | * hardware task-switch, there is no way to fix up bad state in | |
237 | * a reasonable manner. | |
238 | * | |
239 | * The fact that Intel documents the hardware task-switching to | |
240 | * be slow is a fairly red herring - this code is not noticeably | |
241 | * faster. However, there _is_ some room for improvement here, | |
242 | * so the performance issues may eventually be a valid point. | |
243 | * More important, however, is the fact that this allows us much | |
244 | * more flexibility. | |
245 | * | |
65ea5b03 | 246 | * The return value (in %ax) will be the "prev" task after |
1da177e4 LT |
247 | * the task-switch, and shows up in ret_from_fork in entry.S, |
248 | * for example. | |
249 | */ | |
35ea7903 | 250 | __visible __notrace_funcgraph struct task_struct * |
8b96f011 | 251 | __switch_to(struct task_struct *prev_p, struct task_struct *next_p) |
1da177e4 LT |
252 | { |
253 | struct thread_struct *prev = &prev_p->thread, | |
254 | *next = &next_p->thread; | |
255 | int cpu = smp_processor_id(); | |
256 | struct tss_struct *tss = &per_cpu(init_tss, cpu); | |
34ddc81a | 257 | fpu_switch_t fpu; |
1da177e4 LT |
258 | |
259 | /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */ | |
260 | ||
7e16838d | 261 | fpu = switch_fpu_prepare(prev_p, next_p, cpu); |
acc20761 | 262 | |
1da177e4 | 263 | /* |
e7a2ff59 | 264 | * Reload esp0. |
1da177e4 | 265 | */ |
faca6227 | 266 | load_sp0(tss, next); |
1da177e4 LT |
267 | |
268 | /* | |
464d1a78 | 269 | * Save away %gs. No need to save %fs, as it was saved on the |
f95d47ca JF |
270 | * stack on entry. No need to save %es and %ds, as those are |
271 | * always kernel segments while inside the kernel. Doing this | |
272 | * before setting the new TLS descriptors avoids the situation | |
273 | * where we temporarily have non-reloadable segments in %fs | |
274 | * and %gs. This could be an issue if the NMI handler ever | |
275 | * used %fs or %gs (it does not today), or if the kernel is | |
276 | * running inside of a hypervisor layer. | |
1da177e4 | 277 | */ |
ccbeed3a | 278 | lazy_save_gs(prev->gs); |
1da177e4 LT |
279 | |
280 | /* | |
e7a2ff59 | 281 | * Load the per-thread Thread-Local Storage descriptor. |
1da177e4 | 282 | */ |
e7a2ff59 | 283 | load_TLS(next, cpu); |
1da177e4 | 284 | |
8b151144 ZA |
285 | /* |
286 | * Restore IOPL if needed. In normal use, the flags restore | |
287 | * in the switch assembly will handle this. But if the kernel | |
288 | * is running virtualized at a non-zero CPL, the popf will | |
289 | * not restore flags, so it must be done in a separate step. | |
290 | */ | |
291 | if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl)) | |
292 | set_iopl_mask(next->iopl); | |
293 | ||
1da177e4 | 294 | /* |
b3cf2576 | 295 | * Now maybe handle debug registers and/or IO bitmaps |
1da177e4 | 296 | */ |
cf99abac AA |
297 | if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV || |
298 | task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT)) | |
299 | __switch_to_xtra(prev_p, next_p, tss); | |
ffaa8bd6 | 300 | |
9226d125 ZA |
301 | /* |
302 | * Leave lazy mode, flushing any hypercalls made here. | |
303 | * This must be done before restoring TLS segments so | |
304 | * the GDT and LDT are properly updated, and must be | |
305 | * done before math_state_restore, so the TS bit is up | |
306 | * to date. | |
307 | */ | |
224101ed | 308 | arch_end_context_switch(next_p); |
9226d125 | 309 | |
9226d125 ZA |
310 | /* |
311 | * Restore %gs if needed (which is common) | |
312 | */ | |
313 | if (prev->gs | next->gs) | |
ccbeed3a | 314 | lazy_load_gs(next->gs); |
9226d125 | 315 | |
34ddc81a LT |
316 | switch_fpu_finish(next_p, fpu); |
317 | ||
c6ae41e7 | 318 | this_cpu_write(current_task, next_p); |
9226d125 | 319 | |
1da177e4 LT |
320 | return prev_p; |
321 | } | |
322 | ||
1da177e4 LT |
323 | #define top_esp (THREAD_SIZE - sizeof(unsigned long)) |
324 | #define top_ebp (THREAD_SIZE - 2*sizeof(unsigned long)) | |
325 | ||
326 | unsigned long get_wchan(struct task_struct *p) | |
327 | { | |
65ea5b03 | 328 | unsigned long bp, sp, ip; |
1da177e4 LT |
329 | unsigned long stack_page; |
330 | int count = 0; | |
331 | if (!p || p == current || p->state == TASK_RUNNING) | |
332 | return 0; | |
65e0fdff | 333 | stack_page = (unsigned long)task_stack_page(p); |
faca6227 | 334 | sp = p->thread.sp; |
65ea5b03 | 335 | if (!stack_page || sp < stack_page || sp > top_esp+stack_page) |
1da177e4 | 336 | return 0; |
65ea5b03 PA |
337 | /* include/asm-i386/system.h:switch_to() pushes bp last. */ |
338 | bp = *(unsigned long *) sp; | |
1da177e4 | 339 | do { |
65ea5b03 | 340 | if (bp < stack_page || bp > top_ebp+stack_page) |
1da177e4 | 341 | return 0; |
65ea5b03 PA |
342 | ip = *(unsigned long *) (bp+4); |
343 | if (!in_sched_functions(ip)) | |
344 | return ip; | |
345 | bp = *(unsigned long *) bp; | |
1da177e4 LT |
346 | } while (count++ < 16); |
347 | return 0; | |
348 | } | |
349 |