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1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1995 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
6612538c 6 *
1da177e4
LT
7 * X86-64 port
8 * Andi Kleen.
76e4f660
AR
9 *
10 * CPU hotplug support - ashok.raj@intel.com
1da177e4
LT
11 */
12
13/*
14 * This file handles the architecture-dependent parts of process handling..
15 */
16
42059429 17#include <linux/stackprotector.h>
76e4f660 18#include <linux/cpu.h>
1da177e4
LT
19#include <linux/errno.h>
20#include <linux/sched.h>
6612538c 21#include <linux/fs.h>
1da177e4
LT
22#include <linux/kernel.h>
23#include <linux/mm.h>
24#include <linux/elfcore.h>
25#include <linux/smp.h>
26#include <linux/slab.h>
27#include <linux/user.h>
1da177e4
LT
28#include <linux/interrupt.h>
29#include <linux/delay.h>
6612538c 30#include <linux/module.h>
1da177e4 31#include <linux/ptrace.h>
95833c83 32#include <linux/notifier.h>
c6fd91f0 33#include <linux/kprobes.h>
1eeb66a1 34#include <linux/kdebug.h>
02290683 35#include <linux/tick.h>
529e25f6 36#include <linux/prctl.h>
7de08b4e
GP
37#include <linux/uaccess.h>
38#include <linux/io.h>
8b96f011 39#include <linux/ftrace.h>
a0bfa137 40#include <linux/cpuidle.h>
1da177e4 41
1da177e4
LT
42#include <asm/pgtable.h>
43#include <asm/system.h>
1da177e4
LT
44#include <asm/processor.h>
45#include <asm/i387.h>
46#include <asm/mmu_context.h>
1da177e4 47#include <asm/prctl.h>
1da177e4
LT
48#include <asm/desc.h>
49#include <asm/proto.h>
50#include <asm/ia32.h>
95833c83 51#include <asm/idle.h>
bbc1f698 52#include <asm/syscalls.h>
66cb5917 53#include <asm/debugreg.h>
b227e233 54#include <asm/nmi.h>
1da177e4
LT
55
56asmlinkage extern void ret_from_fork(void);
57
3d1e42a7 58DEFINE_PER_CPU(unsigned long, old_rsp);
c2558e0e 59static DEFINE_PER_CPU(unsigned char, is_idle);
3d1e42a7 60
e041c683 61static ATOMIC_NOTIFIER_HEAD(idle_notifier);
95833c83
AK
62
63void idle_notifier_register(struct notifier_block *n)
64{
e041c683 65 atomic_notifier_chain_register(&idle_notifier, n);
95833c83 66}
c7d87d79
VP
67EXPORT_SYMBOL_GPL(idle_notifier_register);
68
69void idle_notifier_unregister(struct notifier_block *n)
70{
71 atomic_notifier_chain_unregister(&idle_notifier, n);
72}
73EXPORT_SYMBOL_GPL(idle_notifier_unregister);
95833c83 74
95833c83
AK
75void enter_idle(void)
76{
c2558e0e 77 percpu_write(is_idle, 1);
e041c683 78 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
95833c83
AK
79}
80
81static void __exit_idle(void)
82{
c2558e0e 83 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
a15da49d 84 return;
e041c683 85 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
95833c83
AK
86}
87
88/* Called from interrupts to signify idle end */
89void exit_idle(void)
90{
a15da49d
AK
91 /* idle loop has pid 0 */
92 if (current->pid)
95833c83
AK
93 return;
94 __exit_idle();
95}
96
913da64b 97#ifndef CONFIG_SMP
76e4f660
AR
98static inline void play_dead(void)
99{
100 BUG();
101}
913da64b 102#endif
76e4f660 103
1da177e4
LT
104/*
105 * The idle thread. There's no useful work to be
106 * done, so just try to conserve power and have a
107 * low exit latency (ie sit in a loop waiting for
108 * somebody to say that they'd like to reschedule)
109 */
b10db7f0 110void cpu_idle(void)
1da177e4 111{
495ab9c0 112 current_thread_info()->status |= TS_POLLING;
ce22bd92 113
ce22bd92 114 /*
5c79d2a5
TH
115 * If we're the non-boot CPU, nothing set the stack canary up
116 * for us. CPU0 already has it initialized but no harm in
117 * doing it again. This is a good place for updating it, as
118 * we wont ever return from this function (so the invalid
119 * canaries already on the stack wont ever trigger).
ce22bd92 120 */
18aa8bb1
IM
121 boot_init_stack_canary();
122
1da177e4
LT
123 /* endless idle loop with no priority at all */
124 while (1) {
e37e112d 125 tick_nohz_idle_enter();
1da177e4 126 while (!need_resched()) {
1da177e4 127
1da177e4 128 rmb();
6ddd2a27 129
76e4f660
AR
130 if (cpu_is_offline(smp_processor_id()))
131 play_dead();
d331e739
VP
132 /*
133 * Idle routines should keep interrupts disabled
134 * from here on, until they go to idle.
135 * Otherwise, idle callbacks can misfire.
136 */
b227e233 137 local_touch_nmi();
d331e739 138 local_irq_disable();
95833c83 139 enter_idle();
81d68a96
SR
140 /* Don't trace irqs off for idle */
141 stop_critical_timings();
e37e112d
FW
142
143 /* enter_idle() needs rcu for notifiers */
144 rcu_idle_enter();
145
a0bfa137
LB
146 if (cpuidle_idle_call())
147 pm_idle();
e37e112d
FW
148
149 rcu_idle_exit();
81d68a96 150 start_critical_timings();
c882e0fe 151
a15da49d
AK
152 /* In many cases the interrupt that ended idle
153 has already called exit_idle. But some idle
154 loops can be woken up without interrupt. */
95833c83 155 __exit_idle();
1da177e4
LT
156 }
157
e37e112d 158 tick_nohz_idle_exit();
5bfb5d69 159 preempt_enable_no_resched();
1da177e4 160 schedule();
5bfb5d69 161 preempt_disable();
1da177e4
LT
162 }
163}
164
6612538c 165/* Prints also some state that isn't saved in the pt_regs */
e2ce07c8 166void __show_regs(struct pt_regs *regs, int all)
1da177e4
LT
167{
168 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
bb1995d5 169 unsigned long d0, d1, d2, d3, d6, d7;
6612538c
HS
170 unsigned int fsindex, gsindex;
171 unsigned int ds, cs, es;
814e2c84
AI
172
173 show_regs_common();
d015a092 174 printk(KERN_DEFAULT "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
aafbd7eb 175 printk_address(regs->ip, 1);
d015a092 176 printk(KERN_DEFAULT "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss,
8092c654 177 regs->sp, regs->flags);
d015a092 178 printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n",
65ea5b03 179 regs->ax, regs->bx, regs->cx);
d015a092 180 printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n",
65ea5b03 181 regs->dx, regs->si, regs->di);
d015a092 182 printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n",
65ea5b03 183 regs->bp, regs->r8, regs->r9);
d015a092 184 printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n",
7de08b4e 185 regs->r10, regs->r11, regs->r12);
d015a092 186 printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
7de08b4e 187 regs->r13, regs->r14, regs->r15);
1da177e4 188
7de08b4e
GP
189 asm("movl %%ds,%0" : "=r" (ds));
190 asm("movl %%cs,%0" : "=r" (cs));
191 asm("movl %%es,%0" : "=r" (es));
1da177e4
LT
192 asm("movl %%fs,%0" : "=r" (fsindex));
193 asm("movl %%gs,%0" : "=r" (gsindex));
194
195 rdmsrl(MSR_FS_BASE, fs);
7de08b4e
GP
196 rdmsrl(MSR_GS_BASE, gs);
197 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
1da177e4 198
e2ce07c8
PE
199 if (!all)
200 return;
1da177e4 201
f51c9452
GOC
202 cr0 = read_cr0();
203 cr2 = read_cr2();
204 cr3 = read_cr3();
205 cr4 = read_cr4();
1da177e4 206
d015a092 207 printk(KERN_DEFAULT "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
7de08b4e 208 fs, fsindex, gs, gsindex, shadowgs);
d015a092 209 printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds,
8092c654 210 es, cr0);
d015a092 211 printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3,
8092c654 212 cr4);
bb1995d5
AS
213
214 get_debugreg(d0, 0);
215 get_debugreg(d1, 1);
216 get_debugreg(d2, 2);
d015a092 217 printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
bb1995d5
AS
218 get_debugreg(d3, 3);
219 get_debugreg(d6, 6);
220 get_debugreg(d7, 7);
d015a092 221 printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
1da177e4
LT
222}
223
1da177e4
LT
224void release_thread(struct task_struct *dead_task)
225{
226 if (dead_task->mm) {
227 if (dead_task->mm->context.size) {
228 printk("WARNING: dead process %8s still has LDT? <%p/%d>\n",
229 dead_task->comm,
230 dead_task->mm->context.ldt,
231 dead_task->mm->context.size);
232 BUG();
233 }
234 }
235}
236
237static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
238{
6612538c 239 struct user_desc ud = {
1da177e4
LT
240 .base_addr = addr,
241 .limit = 0xfffff,
242 .seg_32bit = 1,
243 .limit_in_pages = 1,
244 .useable = 1,
245 };
ade1af77 246 struct desc_struct *desc = t->thread.tls_array;
1da177e4 247 desc += tls;
80fbb69a 248 fill_ldt(desc, &ud);
1da177e4
LT
249}
250
251static inline u32 read_32bit_tls(struct task_struct *t, int tls)
252{
91394eb0 253 return get_desc_base(&t->thread.tls_array[tls]);
1da177e4
LT
254}
255
256/*
257 * This gets called before we allocate a new thread and copy
258 * the current task into it.
259 */
260void prepare_to_copy(struct task_struct *tsk)
261{
262 unlazy_fpu(tsk);
263}
264
6f2c55b8 265int copy_thread(unsigned long clone_flags, unsigned long sp,
1da177e4 266 unsigned long unused,
7de08b4e 267 struct task_struct *p, struct pt_regs *regs)
1da177e4
LT
268{
269 int err;
7de08b4e 270 struct pt_regs *childregs;
1da177e4
LT
271 struct task_struct *me = current;
272
a88cde13 273 childregs = ((struct pt_regs *)
57eafdc2 274 (THREAD_SIZE + task_stack_page(p))) - 1;
1da177e4
LT
275 *childregs = *regs;
276
65ea5b03 277 childregs->ax = 0;
fa4b8f84
BG
278 if (user_mode(regs))
279 childregs->sp = sp;
280 else
65ea5b03 281 childregs->sp = (unsigned long)childregs;
1da177e4 282
faca6227
PA
283 p->thread.sp = (unsigned long) childregs;
284 p->thread.sp0 = (unsigned long) (childregs+1);
285 p->thread.usersp = me->thread.usersp;
1da177e4 286
e4f17c43 287 set_tsk_thread_flag(p, TIF_FORK);
1da177e4 288
66cb5917 289 p->thread.io_bitmap_ptr = NULL;
1da177e4 290
ada85708 291 savesegment(gs, p->thread.gsindex);
7ce5a2b9 292 p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
ada85708 293 savesegment(fs, p->thread.fsindex);
7ce5a2b9 294 p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
ada85708
JF
295 savesegment(es, p->thread.es);
296 savesegment(ds, p->thread.ds);
1da177e4 297
66cb5917 298 err = -ENOMEM;
24f1e32c 299 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
66cb5917 300
d3a4f48d 301 if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
cced4022
TM
302 p->thread.io_bitmap_ptr = kmemdup(me->thread.io_bitmap_ptr,
303 IO_BITMAP_BYTES, GFP_KERNEL);
1da177e4
LT
304 if (!p->thread.io_bitmap_ptr) {
305 p->thread.io_bitmap_max = 0;
306 return -ENOMEM;
307 }
d3a4f48d 308 set_tsk_thread_flag(p, TIF_IO_BITMAP);
6612538c 309 }
1da177e4
LT
310
311 /*
312 * Set a new TLS for the child thread?
313 */
314 if (clone_flags & CLONE_SETTLS) {
315#ifdef CONFIG_IA32_EMULATION
316 if (test_thread_flag(TIF_IA32))
efd1ca52 317 err = do_set_thread_area(p, -1,
65ea5b03 318 (struct user_desc __user *)childregs->si, 0);
7de08b4e
GP
319 else
320#endif
321 err = do_arch_prctl(p, ARCH_SET_FS, childregs->r8);
322 if (err)
1da177e4
LT
323 goto out;
324 }
325 err = 0;
326out:
327 if (err && p->thread.io_bitmap_ptr) {
328 kfree(p->thread.io_bitmap_ptr);
329 p->thread.io_bitmap_max = 0;
330 }
66cb5917 331
1da177e4
LT
332 return err;
333}
334
e634d8fc
PA
335static void
336start_thread_common(struct pt_regs *regs, unsigned long new_ip,
337 unsigned long new_sp,
338 unsigned int _cs, unsigned int _ss, unsigned int _ds)
513ad84b 339{
ada85708 340 loadsegment(fs, 0);
e634d8fc
PA
341 loadsegment(es, _ds);
342 loadsegment(ds, _ds);
513ad84b
IM
343 load_gs_index(0);
344 regs->ip = new_ip;
345 regs->sp = new_sp;
3d1e42a7 346 percpu_write(old_rsp, new_sp);
e634d8fc
PA
347 regs->cs = _cs;
348 regs->ss = _ss;
a6f05a6a 349 regs->flags = X86_EFLAGS_IF;
aa283f49
SS
350 /*
351 * Free the old FP and other extended state
352 */
353 free_thread_xstate(current);
513ad84b 354}
e634d8fc
PA
355
356void
357start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
358{
359 start_thread_common(regs, new_ip, new_sp,
360 __USER_CS, __USER_DS, 0);
361}
513ad84b 362
a6f05a6a
PA
363#ifdef CONFIG_IA32_EMULATION
364void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp)
365{
e634d8fc
PA
366 start_thread_common(regs, new_ip, new_sp,
367 __USER32_CS, __USER32_DS, __USER32_DS);
a6f05a6a
PA
368}
369#endif
513ad84b 370
1da177e4
LT
371/*
372 * switch_to(x,y) should switch tasks from x to y.
373 *
6612538c 374 * This could still be optimized:
1da177e4
LT
375 * - fold all the options into a flag word and test it with a single test.
376 * - could test fs/gs bitsliced
099f318b
AK
377 *
378 * Kprobes not supported here. Set the probe on schedule instead.
8b96f011 379 * Function graph tracer not supported too.
1da177e4 380 */
8b96f011 381__notrace_funcgraph struct task_struct *
a88cde13 382__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
1da177e4 383{
87b935a0
JF
384 struct thread_struct *prev = &prev_p->thread;
385 struct thread_struct *next = &next_p->thread;
6612538c 386 int cpu = smp_processor_id();
1da177e4 387 struct tss_struct *tss = &per_cpu(init_tss, cpu);
478de5a9 388 unsigned fsindex, gsindex;
34ddc81a 389 fpu_switch_t fpu;
e07e23e1 390
34ddc81a 391 fpu = switch_fpu_prepare(prev_p, next_p);
4903062b 392
1da177e4
LT
393 /*
394 * Reload esp0, LDT and the page table pointer:
395 */
7818a1e0 396 load_sp0(tss, next);
1da177e4 397
7de08b4e 398 /*
1da177e4
LT
399 * Switch DS and ES.
400 * This won't pick up thread selector changes, but I guess that is ok.
401 */
ada85708 402 savesegment(es, prev->es);
1da177e4 403 if (unlikely(next->es | prev->es))
7de08b4e 404 loadsegment(es, next->es);
ada85708
JF
405
406 savesegment(ds, prev->ds);
1da177e4
LT
407 if (unlikely(next->ds | prev->ds))
408 loadsegment(ds, next->ds);
409
478de5a9
JF
410
411 /* We must save %fs and %gs before load_TLS() because
412 * %fs and %gs may be cleared by load_TLS().
413 *
414 * (e.g. xen_load_tls())
415 */
416 savesegment(fs, fsindex);
417 savesegment(gs, gsindex);
418
1da177e4
LT
419 load_TLS(next, cpu);
420
3fe0a63e
JF
421 /*
422 * Leave lazy mode, flushing any hypercalls made here.
423 * This must be done before restoring TLS segments so
424 * the GDT and LDT are properly updated, and must be
425 * done before math_state_restore, so the TS bit is up
426 * to date.
427 */
224101ed 428 arch_end_context_switch(next_p);
3fe0a63e 429
7de08b4e 430 /*
1da177e4 431 * Switch FS and GS.
87b935a0
JF
432 *
433 * Segment register != 0 always requires a reload. Also
434 * reload when it has changed. When prev process used 64bit
435 * base always reload to avoid an information leak.
1da177e4 436 */
87b935a0
JF
437 if (unlikely(fsindex | next->fsindex | prev->fs)) {
438 loadsegment(fs, next->fsindex);
7de08b4e 439 /*
87b935a0
JF
440 * Check if the user used a selector != 0; if yes
441 * clear 64bit base, since overloaded base is always
442 * mapped to the Null selector
443 */
444 if (fsindex)
7de08b4e 445 prev->fs = 0;
1da177e4 446 }
87b935a0
JF
447 /* when next process has a 64bit base use it */
448 if (next->fs)
449 wrmsrl(MSR_FS_BASE, next->fs);
450 prev->fsindex = fsindex;
451
452 if (unlikely(gsindex | next->gsindex | prev->gs)) {
453 load_gs_index(next->gsindex);
454 if (gsindex)
7de08b4e 455 prev->gs = 0;
1da177e4 456 }
87b935a0
JF
457 if (next->gs)
458 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
459 prev->gsindex = gsindex;
1da177e4 460
34ddc81a
LT
461 switch_fpu_finish(next_p, fpu);
462
7de08b4e 463 /*
45948d77 464 * Switch the PDA and FPU contexts.
1da177e4 465 */
3d1e42a7
BG
466 prev->usersp = percpu_read(old_rsp);
467 percpu_write(old_rsp, next->usersp);
c6f5e0ac 468 percpu_write(current_task, next_p);
18bd057b 469
9af45651 470 percpu_write(kernel_stack,
87b935a0 471 (unsigned long)task_stack_page(next_p) +
9af45651 472 THREAD_SIZE - KERNEL_STACK_OFFSET);
1da177e4
LT
473
474 /*
d3a4f48d 475 * Now maybe reload the debug registers and handle I/O bitmaps
1da177e4 476 */
eee3af4a
MM
477 if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
478 task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
d3a4f48d 479 __switch_to_xtra(prev_p, next_p, tss);
1da177e4
LT
480
481 return prev_p;
482}
483
1da177e4
LT
484void set_personality_64bit(void)
485{
486 /* inherit personality from parent */
487
488 /* Make sure to be in 64bit mode */
6612538c 489 clear_thread_flag(TIF_IA32);
1da177e4 490
375906f8
SW
491 /* Ensure the corresponding mm is not marked. */
492 if (current->mm)
493 current->mm->context.ia32_compat = 0;
494
1da177e4
LT
495 /* TBD: overwrites user setup. Should have two bits.
496 But 64bit processes have always behaved this way,
497 so it's not too bad. The main problem is just that
6612538c 498 32bit childs are affected again. */
1da177e4
LT
499 current->personality &= ~READ_IMPLIES_EXEC;
500}
501
05d43ed8
PA
502void set_personality_ia32(void)
503{
504 /* inherit personality from parent */
505
506 /* Make sure to be in 32bit mode */
507 set_thread_flag(TIF_IA32);
1252f238 508 current->personality |= force_personality32;
05d43ed8 509
375906f8
SW
510 /* Mark the associated mm as containing 32-bit tasks. */
511 if (current->mm)
512 current->mm->context.ia32_compat = 1;
513
05d43ed8
PA
514 /* Prepare the first "return" to user space */
515 current_thread_info()->status |= TS_COMPAT;
516}
517
1da177e4
LT
518unsigned long get_wchan(struct task_struct *p)
519{
520 unsigned long stack;
7de08b4e 521 u64 fp, ip;
1da177e4
LT
522 int count = 0;
523
7de08b4e
GP
524 if (!p || p == current || p->state == TASK_RUNNING)
525 return 0;
57eafdc2 526 stack = (unsigned long)task_stack_page(p);
e1e23bb0 527 if (p->thread.sp < stack || p->thread.sp >= stack+THREAD_SIZE)
1da177e4 528 return 0;
faca6227 529 fp = *(u64 *)(p->thread.sp);
7de08b4e 530 do {
a88cde13 531 if (fp < (unsigned long)stack ||
e1e23bb0 532 fp >= (unsigned long)stack+THREAD_SIZE)
7de08b4e 533 return 0;
65ea5b03
PA
534 ip = *(u64 *)(fp+8);
535 if (!in_sched_functions(ip))
536 return ip;
7de08b4e
GP
537 fp = *(u64 *)fp;
538 } while (count++ < 16);
1da177e4
LT
539 return 0;
540}
541
542long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
7de08b4e
GP
543{
544 int ret = 0;
1da177e4
LT
545 int doit = task == current;
546 int cpu;
547
7de08b4e 548 switch (code) {
1da177e4 549 case ARCH_SET_GS:
84929801 550 if (addr >= TASK_SIZE_OF(task))
7de08b4e 551 return -EPERM;
1da177e4 552 cpu = get_cpu();
7de08b4e 553 /* handle small bases via the GDT because that's faster to
1da177e4 554 switch. */
7de08b4e
GP
555 if (addr <= 0xffffffff) {
556 set_32bit_tls(task, GS_TLS, addr);
557 if (doit) {
1da177e4 558 load_TLS(&task->thread, cpu);
7de08b4e 559 load_gs_index(GS_TLS_SEL);
1da177e4 560 }
7de08b4e 561 task->thread.gsindex = GS_TLS_SEL;
1da177e4 562 task->thread.gs = 0;
7de08b4e 563 } else {
1da177e4
LT
564 task->thread.gsindex = 0;
565 task->thread.gs = addr;
566 if (doit) {
a88cde13
AK
567 load_gs_index(0);
568 ret = checking_wrmsrl(MSR_KERNEL_GS_BASE, addr);
7de08b4e 569 }
1da177e4
LT
570 }
571 put_cpu();
572 break;
573 case ARCH_SET_FS:
574 /* Not strictly needed for fs, but do it for symmetry
575 with gs */
84929801 576 if (addr >= TASK_SIZE_OF(task))
6612538c 577 return -EPERM;
1da177e4 578 cpu = get_cpu();
6612538c 579 /* handle small bases via the GDT because that's faster to
1da177e4 580 switch. */
6612538c 581 if (addr <= 0xffffffff) {
1da177e4 582 set_32bit_tls(task, FS_TLS, addr);
6612538c
HS
583 if (doit) {
584 load_TLS(&task->thread, cpu);
ada85708 585 loadsegment(fs, FS_TLS_SEL);
1da177e4
LT
586 }
587 task->thread.fsindex = FS_TLS_SEL;
588 task->thread.fs = 0;
6612538c 589 } else {
1da177e4
LT
590 task->thread.fsindex = 0;
591 task->thread.fs = addr;
592 if (doit) {
593 /* set the selector to 0 to not confuse
594 __switch_to */
ada85708 595 loadsegment(fs, 0);
a88cde13 596 ret = checking_wrmsrl(MSR_FS_BASE, addr);
1da177e4
LT
597 }
598 }
599 put_cpu();
600 break;
6612538c
HS
601 case ARCH_GET_FS: {
602 unsigned long base;
1da177e4
LT
603 if (task->thread.fsindex == FS_TLS_SEL)
604 base = read_32bit_tls(task, FS_TLS);
a88cde13 605 else if (doit)
1da177e4 606 rdmsrl(MSR_FS_BASE, base);
a88cde13 607 else
1da177e4 608 base = task->thread.fs;
6612538c
HS
609 ret = put_user(base, (unsigned long __user *)addr);
610 break;
1da177e4 611 }
6612538c 612 case ARCH_GET_GS: {
1da177e4 613 unsigned long base;
97c2803c 614 unsigned gsindex;
1da177e4
LT
615 if (task->thread.gsindex == GS_TLS_SEL)
616 base = read_32bit_tls(task, GS_TLS);
97c2803c 617 else if (doit) {
ada85708 618 savesegment(gs, gsindex);
97c2803c
JB
619 if (gsindex)
620 rdmsrl(MSR_KERNEL_GS_BASE, base);
621 else
622 base = task->thread.gs;
7de08b4e 623 } else
1da177e4 624 base = task->thread.gs;
6612538c 625 ret = put_user(base, (unsigned long __user *)addr);
1da177e4
LT
626 break;
627 }
628
629 default:
630 ret = -EINVAL;
631 break;
6612538c 632 }
1da177e4 633
6612538c
HS
634 return ret;
635}
1da177e4
LT
636
637long sys_arch_prctl(int code, unsigned long addr)
638{
639 return do_arch_prctl(current, code, addr);
1da177e4
LT
640}
641
89240ba0
SS
642unsigned long KSTK_ESP(struct task_struct *task)
643{
644 return (test_tsk_thread_flag(task, TIF_IA32)) ?
645 (task_pt_regs(task)->sp) : ((task)->thread.usersp);
646}