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1da177e4 1#include <linux/module.h>
cd6ed525 2#include <linux/reboot.h>
4d022e35
MB
3#include <linux/init.h>
4#include <linux/pm.h>
5#include <linux/efi.h>
6#include <acpi/reboot.h>
7#include <asm/io.h>
1da177e4 8#include <asm/apic.h>
4d37e7e3 9#include <asm/desc.h>
4d022e35 10#include <asm/hpet.h>
68db065c 11#include <asm/pgtable.h>
4412620f 12#include <asm/proto.h>
973efae2 13#include <asm/reboot_fixups.h>
07f3331c 14#include <asm/reboot.h>
82487711 15#include <asm/pci_x86.h>
d176720d 16#include <asm/virtext.h>
96b89dc6 17#include <asm/cpu.h>
1da177e4 18
4d022e35
MB
19#ifdef CONFIG_X86_32
20# include <linux/dmi.h>
21# include <linux/ctype.h>
22# include <linux/mc146818rtc.h>
4d022e35
MB
23#else
24# include <asm/iommu.h>
25#endif
26
840c2baf
JC
27#include <asm/tboot.h>
28
1da177e4
LT
29/*
30 * Power off function, if any
31 */
32void (*pm_power_off)(void);
129f6946 33EXPORT_SYMBOL(pm_power_off);
1da177e4 34
ebdd561a 35static const struct desc_ptr no_idt = {};
1da177e4 36static int reboot_mode;
8d00450d 37enum reboot_type reboot_type = BOOT_KBD;
4d022e35 38int reboot_force;
1da177e4 39
4d022e35 40#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
1da177e4 41static int reboot_cpu = -1;
1da177e4 42#endif
4d022e35 43
d176720d
EH
44/* This is set if we need to go through the 'emergency' path.
45 * When machine_emergency_restart() is called, we may be on
46 * an inconsistent state and won't be able to do a clean cleanup
47 */
48static int reboot_emergency;
49
14d7ca5c
PA
50/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
51bool port_cf9_safe = false;
52
53/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
4d022e35
MB
54 warm Don't set the cold reboot flag
55 cold Set the cold reboot flag
56 bios Reboot by jumping through the BIOS (only for X86_32)
57 smp Reboot by executing reset on BSP or other CPU (only for X86_32)
58 triple Force a triple fault (init)
59 kbd Use the keyboard controller. cold reset (default)
60 acpi Use the RESET_REG in the FADT
61 efi Use efi reset_system runtime service
14d7ca5c 62 pci Use the so-called "PCI reset register", CF9
4d022e35
MB
63 force Avoid anything that could hang.
64 */
1da177e4
LT
65static int __init reboot_setup(char *str)
66{
4d022e35 67 for (;;) {
1da177e4 68 switch (*str) {
4d022e35 69 case 'w':
1da177e4
LT
70 reboot_mode = 0x1234;
71 break;
4d022e35
MB
72
73 case 'c':
74 reboot_mode = 0;
1da177e4 75 break;
4d022e35
MB
76
77#ifdef CONFIG_X86_32
1da177e4 78#ifdef CONFIG_SMP
4d022e35 79 case 's':
6f673d83 80 if (isdigit(*(str+1))) {
1da177e4 81 reboot_cpu = (int) (*(str+1) - '0');
6f673d83 82 if (isdigit(*(str+2)))
1da177e4
LT
83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
84 }
4d022e35
MB
85 /* we will leave sorting out the final value
86 when we are ready to reboot, since we might not
87 have set up boot_cpu_id or smp_num_cpu */
1da177e4 88 break;
4d022e35
MB
89#endif /* CONFIG_SMP */
90
91 case 'b':
1da177e4 92#endif
4d022e35
MB
93 case 'a':
94 case 'k':
95 case 't':
96 case 'e':
14d7ca5c 97 case 'p':
4d022e35
MB
98 reboot_type = *str;
99 break;
100
101 case 'f':
102 reboot_force = 1;
103 break;
1da177e4 104 }
4d022e35
MB
105
106 str = strchr(str, ',');
107 if (str)
1da177e4
LT
108 str++;
109 else
110 break;
111 }
112 return 1;
113}
114
115__setup("reboot=", reboot_setup);
116
4d022e35
MB
117
118#ifdef CONFIG_X86_32
1da177e4
LT
119/*
120 * Reboot options and system auto-detection code provided by
121 * Dell Inc. so their systems "just work". :-)
122 */
123
124/*
4d022e35
MB
125 * Some machines require the "reboot=b" commandline option,
126 * this quirk makes that automatic.
1da177e4 127 */
1855256c 128static int __init set_bios_reboot(const struct dmi_system_id *d)
1da177e4 129{
4d022e35
MB
130 if (reboot_type != BOOT_BIOS) {
131 reboot_type = BOOT_BIOS;
1da177e4
LT
132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
133 }
134 return 0;
135}
136
1da177e4 137static struct dmi_system_id __initdata reboot_dmi_table[] = {
b9e82af8
TG
138 { /* Handle problems with rebooting on Dell E520's */
139 .callback = set_bios_reboot,
140 .ident = "Dell E520",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
144 },
145 },
1da177e4 146 { /* Handle problems with rebooting on Dell 1300's */
dd2a1305 147 .callback = set_bios_reboot,
1da177e4
LT
148 .ident = "Dell PowerEdge 1300",
149 .matches = {
150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
152 },
153 },
154 { /* Handle problems with rebooting on Dell 300's */
155 .callback = set_bios_reboot,
156 .ident = "Dell PowerEdge 300",
157 .matches = {
158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
160 },
161 },
df2edcf3
JJ
162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
163 .callback = set_bios_reboot,
164 .ident = "Dell OptiPlex 745",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
df2edcf3
JJ
168 },
169 },
fc115bf1
CK
170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
171 .callback = set_bios_reboot,
172 .ident = "Dell OptiPlex 745",
173 .matches = {
174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
177 },
178 },
fc1c8925
HAA
179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
180 .callback = set_bios_reboot,
181 .ident = "Dell OptiPlex 745",
182 .matches = {
183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
186 },
187 },
093bac15
SC
188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
189 .callback = set_bios_reboot,
190 .ident = "Dell OptiPlex 330",
191 .matches = {
192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
195 },
196 },
4a4aca64
JD
197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */
198 .callback = set_bios_reboot,
199 .ident = "Dell OptiPlex 360",
200 .matches = {
201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"),
203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
204 },
205 },
1da177e4
LT
206 { /* Handle problems with rebooting on Dell 2400's */
207 .callback = set_bios_reboot,
208 .ident = "Dell PowerEdge 2400",
209 .matches = {
210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
211 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
212 },
213 },
fab3b58d
IM
214 { /* Handle problems with rebooting on Dell T5400's */
215 .callback = set_bios_reboot,
216 .ident = "Dell Precision T5400",
217 .matches = {
218 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
219 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
220 },
221 },
766c3f94 222 { /* Handle problems with rebooting on HP laptops */
d91b14c4 223 .callback = set_bios_reboot,
766c3f94 224 .ident = "HP Compaq Laptop",
d91b14c4
TV
225 .matches = {
226 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
766c3f94 227 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
d91b14c4
TV
228 },
229 },
dd4124a8
LO
230 { /* Handle problems with rebooting on Dell XPS710 */
231 .callback = set_bios_reboot,
232 .ident = "Dell XPS710",
233 .matches = {
234 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
235 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
236 },
237 },
c5da9a2b
AC
238 { /* Handle problems with rebooting on Dell DXP061 */
239 .callback = set_bios_reboot,
240 .ident = "Dell DXP061",
241 .matches = {
242 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
243 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"),
244 },
245 },
88dff493
ZR
246 { /* Handle problems with rebooting on Sony VGN-Z540N */
247 .callback = set_bios_reboot,
248 .ident = "Sony VGN-Z540N",
249 .matches = {
250 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
251 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
252 },
253 },
1da177e4
LT
254 { }
255};
256
257static int __init reboot_init(void)
258{
259 dmi_check_system(reboot_dmi_table);
260 return 0;
261}
1da177e4
LT
262core_initcall(reboot_init);
263
264/* The following code and data reboots the machine by switching to real
265 mode and jumping to the BIOS reset entry point, as if the CPU has
266 really been reset. The previous version asked the keyboard
267 controller to pulse the CPU reset line, which is more thorough, but
268 doesn't work with at least one type of 486 motherboard. It is easy
269 to stop this code working; hence the copious comments. */
ebdd561a 270static const unsigned long long
1da177e4
LT
271real_mode_gdt_entries [3] =
272{
273 0x0000000000000000ULL, /* Null descriptor */
ebdd561a
JB
274 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
275 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
1da177e4
LT
276};
277
ebdd561a 278static const struct desc_ptr
05f4a3ec 279real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
4d022e35 280real_mode_idt = { 0x3ff, 0 };
1da177e4
LT
281
282/* This is 16-bit protected mode code to disable paging and the cache,
283 switch to real mode and jump to the BIOS reset code.
284
285 The instruction that switches to real mode by writing to CR0 must be
286 followed immediately by a far jump instruction, which set CS to a
287 valid value for real mode, and flushes the prefetch queue to avoid
288 running instructions that have already been decoded in protected
289 mode.
290
291 Clears all the flags except ET, especially PG (paging), PE
292 (protected-mode enable) and TS (task switch for coprocessor state
293 save). Flushes the TLB after paging has been disabled. Sets CD and
294 NW, to disable the cache on a 486, and invalidates the cache. This
295 is more like the state of a 486 after reset. I don't know if
296 something else should be done for other chips.
297
298 More could be done here to set up the registers as if a CPU reset had
299 occurred; hopefully real BIOSs don't assume much. */
ebdd561a 300static const unsigned char real_mode_switch [] =
1da177e4
LT
301{
302 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
303 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
304 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
305 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
306 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
307 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
308 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
309 0x74, 0x02, /* jz f */
310 0x0f, 0x09, /* wbinvd */
311 0x24, 0x10, /* f: andb $0x10,al */
312 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
313};
ebdd561a 314static const unsigned char jump_to_bios [] =
1da177e4
LT
315{
316 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
317};
318
319/*
320 * Switch to real mode and then execute the code
321 * specified by the code and length parameters.
322 * We assume that length will aways be less that 100!
323 */
ebdd561a 324void machine_real_restart(const unsigned char *code, int length)
1da177e4 325{
1da177e4
LT
326 local_irq_disable();
327
328 /* Write zero to CMOS register number 0x0f, which the BIOS POST
329 routine will recognize as telling it to do a proper reboot. (Well
330 that's what this book in front of me says -- it may only apply to
331 the Phoenix BIOS though, it's not clear). At the same time,
332 disable NMIs by setting the top bit in the CMOS address register,
333 as we're about to do peculiar things to the CPU. I'm not sure if
334 `outb_p' is needed instead of just `outb'. Use it to be on the
335 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
336 */
62dbc210 337 spin_lock(&rtc_lock);
1da177e4 338 CMOS_WRITE(0x00, 0x8f);
62dbc210 339 spin_unlock(&rtc_lock);
1da177e4
LT
340
341 /* Remap the kernel at virtual address zero, as well as offset zero
342 from the kernel segment. This assumes the kernel segment starts at
343 virtual address PAGE_OFFSET. */
68db065c 344 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
4d022e35 345 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
1da177e4
LT
346
347 /*
348 * Use `swapper_pg_dir' as our page directory.
349 */
350 load_cr3(swapper_pg_dir);
351
352 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
353 this on booting to tell it to "Bypass memory test (also warm
354 boot)". This seems like a fairly standard thing that gets set by
355 REBOOT.COM programs, and the previous reset routine did this
356 too. */
1da177e4
LT
357 *((unsigned short *)0x472) = reboot_mode;
358
359 /* For the switch to real mode, copy some code to low memory. It has
360 to be in the first 64k because it is running in 16-bit mode, and it
361 has to have the same physical and virtual address, because it turns
362 off paging. Copy it near the end of the first page, out of the way
363 of BIOS variables. */
4d022e35 364 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
1da177e4 365 real_mode_switch, sizeof (real_mode_switch));
4d022e35 366 memcpy((void *)(0x1000 - 100), code, length);
1da177e4
LT
367
368 /* Set up the IDT for real mode. */
4d37e7e3 369 load_idt(&real_mode_idt);
1da177e4
LT
370
371 /* Set up a GDT from which we can load segment descriptors for real
372 mode. The GDT is not used in real mode; it is just needed here to
373 prepare the descriptors. */
4d37e7e3 374 load_gdt(&real_mode_gdt);
1da177e4
LT
375
376 /* Load the data segment registers, and thus the descriptors ready for
377 real mode. The base address of each segment is 0x100, 16 times the
378 selector value being loaded here. This is so that the segment
379 registers don't have to be reloaded after switching to real mode:
380 the values are consistent for real mode operation already. */
1da177e4
LT
381 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
382 "\tmovl %%eax,%%ds\n"
383 "\tmovl %%eax,%%es\n"
384 "\tmovl %%eax,%%fs\n"
385 "\tmovl %%eax,%%gs\n"
386 "\tmovl %%eax,%%ss" : : : "eax");
387
388 /* Jump to the 16-bit code that we copied earlier. It disables paging
389 and the cache, switches to real mode, and jumps to the BIOS reset
390 entry point. */
1da177e4
LT
391 __asm__ __volatile__ ("ljmp $0x0008,%0"
392 :
4d022e35 393 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
1da177e4 394}
129f6946
AD
395#ifdef CONFIG_APM_MODULE
396EXPORT_SYMBOL(machine_real_restart);
397#endif
1da177e4 398
4d022e35
MB
399#endif /* CONFIG_X86_32 */
400
401static inline void kb_wait(void)
402{
403 int i;
404
c84d6af8
AC
405 for (i = 0; i < 0x10000; i++) {
406 if ((inb(0x64) & 0x02) == 0)
4d022e35 407 break;
c84d6af8
AC
408 udelay(2);
409 }
4d022e35
MB
410}
411
d176720d
EH
412static void vmxoff_nmi(int cpu, struct die_args *args)
413{
414 cpu_emergency_vmxoff();
415}
416
417/* Use NMIs as IPIs to tell all CPUs to disable virtualization
418 */
419static void emergency_vmx_disable_all(void)
420{
421 /* Just make sure we won't change CPUs while doing this */
422 local_irq_disable();
423
424 /* We need to disable VMX on all CPUs before rebooting, otherwise
425 * we risk hanging up the machine, because the CPU ignore INIT
426 * signals when VMX is enabled.
427 *
428 * We can't take any locks and we may be on an inconsistent
429 * state, so we use NMIs as IPIs to tell the other CPUs to disable
430 * VMX and halt.
431 *
432 * For safety, we will avoid running the nmi_shootdown_cpus()
433 * stuff unnecessarily, but we don't have a way to check
434 * if other CPUs have VMX enabled. So we will call it only if the
435 * CPU we are running on has VMX enabled.
436 *
437 * We will miss cases where VMX is not enabled on all CPUs. This
438 * shouldn't do much harm because KVM always enable VMX on all
439 * CPUs anyway. But we can miss it on the small window where KVM
440 * is still enabling VMX.
441 */
442 if (cpu_has_vmx() && cpu_vmx_enabled()) {
443 /* Disable VMX on this CPU.
444 */
445 cpu_vmxoff();
446
447 /* Halt and disable VMX on the other CPUs */
448 nmi_shootdown_cpus(vmxoff_nmi);
449
450 }
451}
452
453
7432d149
IM
454void __attribute__((weak)) mach_reboot_fixups(void)
455{
456}
457
416e2d63 458static void native_machine_emergency_restart(void)
1da177e4 459{
4d022e35
MB
460 int i;
461
d176720d
EH
462 if (reboot_emergency)
463 emergency_vmx_disable_all();
464
840c2baf
JC
465 tboot_shutdown(TB_SHUTDOWN_REBOOT);
466
4d022e35
MB
467 /* Tell the BIOS if we want cold or warm reboot */
468 *((unsigned short *)__va(0x472)) = reboot_mode;
469
470 for (;;) {
471 /* Could also try the reset bit in the Hammer NB */
472 switch (reboot_type) {
473 case BOOT_KBD:
7432d149
IM
474 mach_reboot_fixups(); /* for board specific fixups */
475
4d022e35
MB
476 for (i = 0; i < 10; i++) {
477 kb_wait();
478 udelay(50);
479 outb(0xfe, 0x64); /* pulse reset low */
480 udelay(50);
481 }
482
483 case BOOT_TRIPLE:
ebdd561a 484 load_idt(&no_idt);
4d022e35
MB
485 __asm__ __volatile__("int3");
486
487 reboot_type = BOOT_KBD;
488 break;
489
490#ifdef CONFIG_X86_32
491 case BOOT_BIOS:
492 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
493
494 reboot_type = BOOT_KBD;
495 break;
496#endif
497
498 case BOOT_ACPI:
499 acpi_reboot();
500 reboot_type = BOOT_KBD;
501 break;
502
4d022e35
MB
503 case BOOT_EFI:
504 if (efi_enabled)
14d7ca5c
PA
505 efi.reset_system(reboot_mode ?
506 EFI_RESET_WARM :
507 EFI_RESET_COLD,
4d022e35 508 EFI_SUCCESS, 0, NULL);
b47b9288 509 reboot_type = BOOT_KBD;
14d7ca5c 510 break;
4d022e35 511
14d7ca5c
PA
512 case BOOT_CF9:
513 port_cf9_safe = true;
514 /* fall through */
4d022e35 515
14d7ca5c
PA
516 case BOOT_CF9_COND:
517 if (port_cf9_safe) {
518 u8 cf9 = inb(0xcf9) & ~6;
519 outb(cf9|2, 0xcf9); /* Request hard reset */
520 udelay(50);
521 outb(cf9|6, 0xcf9); /* Actually do the reset */
522 udelay(50);
523 }
4d022e35
MB
524 reboot_type = BOOT_KBD;
525 break;
526 }
527 }
528}
529
3c62c625 530void native_machine_shutdown(void)
4d022e35
MB
531{
532 /* Stop the cpus and apics */
1da177e4 533#ifdef CONFIG_SMP
dd2a1305
EB
534
535 /* The boot cpu is always logical cpu 0 */
65c01184 536 int reboot_cpu_id = 0;
dd2a1305 537
4d022e35 538#ifdef CONFIG_X86_32
dd2a1305 539 /* See if there has been given a command line override */
9628937d 540 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
0bc3cc03 541 cpu_online(reboot_cpu))
dd2a1305 542 reboot_cpu_id = reboot_cpu;
4d022e35 543#endif
1da177e4 544
4d022e35 545 /* Make certain the cpu I'm about to reboot on is online */
0bc3cc03 546 if (!cpu_online(reboot_cpu_id))
dd2a1305 547 reboot_cpu_id = smp_processor_id();
dd2a1305
EB
548
549 /* Make certain I only run on the appropriate processor */
9628937d 550 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
dd2a1305 551
4d022e35
MB
552 /* O.K Now that I'm on the appropriate processor,
553 * stop all of the others.
1da177e4
LT
554 */
555 smp_send_stop();
4d022e35 556#endif
1da177e4
LT
557
558 lapic_shutdown();
559
560#ifdef CONFIG_X86_IO_APIC
561 disable_IO_APIC();
562#endif
4d022e35 563
c86c7fbc
OH
564#ifdef CONFIG_HPET_TIMER
565 hpet_disable();
566#endif
dd2a1305 567
4d022e35
MB
568#ifdef CONFIG_X86_64
569 pci_iommu_shutdown();
570#endif
973efae2
JF
571}
572
d176720d
EH
573static void __machine_emergency_restart(int emergency)
574{
575 reboot_emergency = emergency;
576 machine_ops.emergency_restart();
577}
578
416e2d63 579static void native_machine_restart(char *__unused)
dd2a1305 580{
4d022e35 581 printk("machine restart\n");
1da177e4 582
4d022e35
MB
583 if (!reboot_force)
584 machine_shutdown();
d176720d 585 __machine_emergency_restart(0);
4a1421f8
EB
586}
587
416e2d63 588static void native_machine_halt(void)
1da177e4 589{
d3ec5cae
IV
590 /* stop other cpus and apics */
591 machine_shutdown();
592
840c2baf
JC
593 tboot_shutdown(TB_SHUTDOWN_HALT);
594
d3ec5cae
IV
595 /* stop this cpu */
596 stop_this_cpu(NULL);
1da177e4
LT
597}
598
416e2d63 599static void native_machine_power_off(void)
1da177e4 600{
6e3fbee5 601 if (pm_power_off) {
4d022e35
MB
602 if (!reboot_force)
603 machine_shutdown();
1da177e4 604 pm_power_off();
6e3fbee5 605 }
840c2baf
JC
606 /* a fallback in case there is no PM info available */
607 tboot_shutdown(TB_SHUTDOWN_HALT);
1da177e4
LT
608}
609
07f3331c 610struct machine_ops machine_ops = {
416e2d63
JB
611 .power_off = native_machine_power_off,
612 .shutdown = native_machine_shutdown,
613 .emergency_restart = native_machine_emergency_restart,
614 .restart = native_machine_restart,
ed23dc6f
GC
615 .halt = native_machine_halt,
616#ifdef CONFIG_KEXEC
617 .crash_shutdown = native_machine_crash_shutdown,
618#endif
07f3331c 619};
416e2d63
JB
620
621void machine_power_off(void)
622{
623 machine_ops.power_off();
624}
625
626void machine_shutdown(void)
627{
628 machine_ops.shutdown();
629}
630
631void machine_emergency_restart(void)
632{
d176720d 633 __machine_emergency_restart(1);
416e2d63
JB
634}
635
636void machine_restart(char *cmd)
637{
638 machine_ops.restart(cmd);
639}
640
641void machine_halt(void)
642{
643 machine_ops.halt();
644}
645
ed23dc6f
GC
646#ifdef CONFIG_KEXEC
647void machine_crash_shutdown(struct pt_regs *regs)
648{
649 machine_ops.crash_shutdown(regs);
650}
651#endif
2ddded21
EH
652
653
bb8dd270 654#if defined(CONFIG_SMP)
2ddded21
EH
655
656/* This keeps a track of which one is crashing cpu. */
657static int crashing_cpu;
658static nmi_shootdown_cb shootdown_callback;
659
660static atomic_t waiting_for_crash_ipi;
661
662static int crash_nmi_callback(struct notifier_block *self,
663 unsigned long val, void *data)
664{
665 int cpu;
666
667 if (val != DIE_NMI_IPI)
668 return NOTIFY_OK;
669
670 cpu = raw_smp_processor_id();
671
672 /* Don't do anything if this handler is invoked on crashing cpu.
673 * Otherwise, system will completely hang. Crashing cpu can get
674 * an NMI if system was initially booted with nmi_watchdog parameter.
675 */
676 if (cpu == crashing_cpu)
677 return NOTIFY_STOP;
678 local_irq_disable();
679
680 shootdown_callback(cpu, (struct die_args *)data);
681
682 atomic_dec(&waiting_for_crash_ipi);
683 /* Assume hlt works */
684 halt();
685 for (;;)
686 cpu_relax();
687
688 return 1;
689}
690
691static void smp_send_nmi_allbutself(void)
692{
dac5f412 693 apic->send_IPI_allbutself(NMI_VECTOR);
2ddded21
EH
694}
695
696static struct notifier_block crash_nmi_nb = {
697 .notifier_call = crash_nmi_callback,
698};
699
bb8dd270
EH
700/* Halt all other CPUs, calling the specified function on each of them
701 *
702 * This function can be used to halt all other CPUs on crash
703 * or emergency reboot time. The function passed as parameter
704 * will be called inside a NMI handler on all CPUs.
705 */
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EH
706void nmi_shootdown_cpus(nmi_shootdown_cb callback)
707{
708 unsigned long msecs;
c415b3dc 709 local_irq_disable();
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EH
710
711 /* Make a note of crashing cpu. Will be used in NMI callback.*/
712 crashing_cpu = safe_smp_processor_id();
713
714 shootdown_callback = callback;
715
716 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
717 /* Would it be better to replace the trap vector here? */
718 if (register_die_notifier(&crash_nmi_nb))
719 return; /* return what? */
720 /* Ensure the new callback function is set before sending
721 * out the NMI
722 */
723 wmb();
724
725 smp_send_nmi_allbutself();
726
727 msecs = 1000; /* Wait at most a second for the other cpus to stop */
728 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
729 mdelay(1);
730 msecs--;
731 }
732
733 /* Leave the nmi callback set */
734}
bb8dd270
EH
735#else /* !CONFIG_SMP */
736void nmi_shootdown_cpus(nmi_shootdown_cb callback)
737{
738 /* No other CPUs to shoot down */
739}
2ddded21 740#endif