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1da177e4 | 1 | #include <linux/module.h> |
cd6ed525 | 2 | #include <linux/reboot.h> |
4d022e35 MB |
3 | #include <linux/init.h> |
4 | #include <linux/pm.h> | |
5 | #include <linux/efi.h> | |
6 | #include <acpi/reboot.h> | |
7 | #include <asm/io.h> | |
1da177e4 | 8 | #include <asm/apic.h> |
4d37e7e3 | 9 | #include <asm/desc.h> |
4d022e35 | 10 | #include <asm/hpet.h> |
68db065c | 11 | #include <asm/pgtable.h> |
4412620f | 12 | #include <asm/proto.h> |
973efae2 | 13 | #include <asm/reboot_fixups.h> |
07f3331c | 14 | #include <asm/reboot.h> |
82487711 | 15 | #include <asm/pci_x86.h> |
d176720d | 16 | #include <asm/virtext.h> |
96b89dc6 | 17 | #include <asm/cpu.h> |
1da177e4 | 18 | |
4d022e35 MB |
19 | #ifdef CONFIG_X86_32 |
20 | # include <linux/dmi.h> | |
21 | # include <linux/ctype.h> | |
22 | # include <linux/mc146818rtc.h> | |
4d022e35 MB |
23 | #else |
24 | # include <asm/iommu.h> | |
25 | #endif | |
26 | ||
1da177e4 LT |
27 | /* |
28 | * Power off function, if any | |
29 | */ | |
30 | void (*pm_power_off)(void); | |
129f6946 | 31 | EXPORT_SYMBOL(pm_power_off); |
1da177e4 | 32 | |
ebdd561a | 33 | static const struct desc_ptr no_idt = {}; |
1da177e4 | 34 | static int reboot_mode; |
8d00450d | 35 | enum reboot_type reboot_type = BOOT_KBD; |
4d022e35 | 36 | int reboot_force; |
1da177e4 | 37 | |
4d022e35 | 38 | #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) |
1da177e4 | 39 | static int reboot_cpu = -1; |
1da177e4 | 40 | #endif |
4d022e35 | 41 | |
d176720d EH |
42 | /* This is set if we need to go through the 'emergency' path. |
43 | * When machine_emergency_restart() is called, we may be on | |
44 | * an inconsistent state and won't be able to do a clean cleanup | |
45 | */ | |
46 | static int reboot_emergency; | |
47 | ||
14d7ca5c PA |
48 | /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ |
49 | bool port_cf9_safe = false; | |
50 | ||
51 | /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] | |
4d022e35 MB |
52 | warm Don't set the cold reboot flag |
53 | cold Set the cold reboot flag | |
54 | bios Reboot by jumping through the BIOS (only for X86_32) | |
55 | smp Reboot by executing reset on BSP or other CPU (only for X86_32) | |
56 | triple Force a triple fault (init) | |
57 | kbd Use the keyboard controller. cold reset (default) | |
58 | acpi Use the RESET_REG in the FADT | |
59 | efi Use efi reset_system runtime service | |
14d7ca5c | 60 | pci Use the so-called "PCI reset register", CF9 |
4d022e35 MB |
61 | force Avoid anything that could hang. |
62 | */ | |
1da177e4 LT |
63 | static int __init reboot_setup(char *str) |
64 | { | |
4d022e35 | 65 | for (;;) { |
1da177e4 | 66 | switch (*str) { |
4d022e35 | 67 | case 'w': |
1da177e4 LT |
68 | reboot_mode = 0x1234; |
69 | break; | |
4d022e35 MB |
70 | |
71 | case 'c': | |
72 | reboot_mode = 0; | |
1da177e4 | 73 | break; |
4d022e35 MB |
74 | |
75 | #ifdef CONFIG_X86_32 | |
1da177e4 | 76 | #ifdef CONFIG_SMP |
4d022e35 | 77 | case 's': |
6f673d83 | 78 | if (isdigit(*(str+1))) { |
1da177e4 | 79 | reboot_cpu = (int) (*(str+1) - '0'); |
6f673d83 | 80 | if (isdigit(*(str+2))) |
1da177e4 LT |
81 | reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); |
82 | } | |
4d022e35 MB |
83 | /* we will leave sorting out the final value |
84 | when we are ready to reboot, since we might not | |
85 | have set up boot_cpu_id or smp_num_cpu */ | |
1da177e4 | 86 | break; |
4d022e35 MB |
87 | #endif /* CONFIG_SMP */ |
88 | ||
89 | case 'b': | |
1da177e4 | 90 | #endif |
4d022e35 MB |
91 | case 'a': |
92 | case 'k': | |
93 | case 't': | |
94 | case 'e': | |
14d7ca5c | 95 | case 'p': |
4d022e35 MB |
96 | reboot_type = *str; |
97 | break; | |
98 | ||
99 | case 'f': | |
100 | reboot_force = 1; | |
101 | break; | |
1da177e4 | 102 | } |
4d022e35 MB |
103 | |
104 | str = strchr(str, ','); | |
105 | if (str) | |
1da177e4 LT |
106 | str++; |
107 | else | |
108 | break; | |
109 | } | |
110 | return 1; | |
111 | } | |
112 | ||
113 | __setup("reboot=", reboot_setup); | |
114 | ||
4d022e35 MB |
115 | |
116 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
117 | /* |
118 | * Reboot options and system auto-detection code provided by | |
119 | * Dell Inc. so their systems "just work". :-) | |
120 | */ | |
121 | ||
122 | /* | |
4d022e35 MB |
123 | * Some machines require the "reboot=b" commandline option, |
124 | * this quirk makes that automatic. | |
1da177e4 | 125 | */ |
1855256c | 126 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
1da177e4 | 127 | { |
4d022e35 MB |
128 | if (reboot_type != BOOT_BIOS) { |
129 | reboot_type = BOOT_BIOS; | |
1da177e4 LT |
130 | printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); |
131 | } | |
132 | return 0; | |
133 | } | |
134 | ||
1da177e4 | 135 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
b9e82af8 TG |
136 | { /* Handle problems with rebooting on Dell E520's */ |
137 | .callback = set_bios_reboot, | |
138 | .ident = "Dell E520", | |
139 | .matches = { | |
140 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
141 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), | |
142 | }, | |
143 | }, | |
1da177e4 | 144 | { /* Handle problems with rebooting on Dell 1300's */ |
dd2a1305 | 145 | .callback = set_bios_reboot, |
1da177e4 LT |
146 | .ident = "Dell PowerEdge 1300", |
147 | .matches = { | |
148 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
149 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), | |
150 | }, | |
151 | }, | |
152 | { /* Handle problems with rebooting on Dell 300's */ | |
153 | .callback = set_bios_reboot, | |
154 | .ident = "Dell PowerEdge 300", | |
155 | .matches = { | |
156 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
157 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), | |
158 | }, | |
159 | }, | |
df2edcf3 JJ |
160 | { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ |
161 | .callback = set_bios_reboot, | |
162 | .ident = "Dell OptiPlex 745", | |
163 | .matches = { | |
164 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
165 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
df2edcf3 JJ |
166 | }, |
167 | }, | |
fc115bf1 CK |
168 | { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ |
169 | .callback = set_bios_reboot, | |
170 | .ident = "Dell OptiPlex 745", | |
171 | .matches = { | |
172 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
173 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
174 | DMI_MATCH(DMI_BOARD_NAME, "0MM599"), | |
175 | }, | |
176 | }, | |
fc1c8925 HAA |
177 | { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ |
178 | .callback = set_bios_reboot, | |
179 | .ident = "Dell OptiPlex 745", | |
180 | .matches = { | |
181 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
182 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
183 | DMI_MATCH(DMI_BOARD_NAME, "0KW626"), | |
184 | }, | |
185 | }, | |
093bac15 SC |
186 | { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ |
187 | .callback = set_bios_reboot, | |
188 | .ident = "Dell OptiPlex 330", | |
189 | .matches = { | |
190 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
191 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), | |
192 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), | |
193 | }, | |
194 | }, | |
1da177e4 LT |
195 | { /* Handle problems with rebooting on Dell 2400's */ |
196 | .callback = set_bios_reboot, | |
197 | .ident = "Dell PowerEdge 2400", | |
198 | .matches = { | |
199 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
200 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), | |
201 | }, | |
202 | }, | |
fab3b58d IM |
203 | { /* Handle problems with rebooting on Dell T5400's */ |
204 | .callback = set_bios_reboot, | |
205 | .ident = "Dell Precision T5400", | |
206 | .matches = { | |
207 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
208 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), | |
209 | }, | |
210 | }, | |
766c3f94 | 211 | { /* Handle problems with rebooting on HP laptops */ |
d91b14c4 | 212 | .callback = set_bios_reboot, |
766c3f94 | 213 | .ident = "HP Compaq Laptop", |
d91b14c4 TV |
214 | .matches = { |
215 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
766c3f94 | 216 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
d91b14c4 TV |
217 | }, |
218 | }, | |
dd4124a8 LO |
219 | { /* Handle problems with rebooting on Dell XPS710 */ |
220 | .callback = set_bios_reboot, | |
221 | .ident = "Dell XPS710", | |
222 | .matches = { | |
223 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
224 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), | |
225 | }, | |
226 | }, | |
c5da9a2b AC |
227 | { /* Handle problems with rebooting on Dell DXP061 */ |
228 | .callback = set_bios_reboot, | |
229 | .ident = "Dell DXP061", | |
230 | .matches = { | |
231 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
232 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), | |
233 | }, | |
234 | }, | |
1da177e4 LT |
235 | { } |
236 | }; | |
237 | ||
238 | static int __init reboot_init(void) | |
239 | { | |
240 | dmi_check_system(reboot_dmi_table); | |
241 | return 0; | |
242 | } | |
1da177e4 LT |
243 | core_initcall(reboot_init); |
244 | ||
245 | /* The following code and data reboots the machine by switching to real | |
246 | mode and jumping to the BIOS reset entry point, as if the CPU has | |
247 | really been reset. The previous version asked the keyboard | |
248 | controller to pulse the CPU reset line, which is more thorough, but | |
249 | doesn't work with at least one type of 486 motherboard. It is easy | |
250 | to stop this code working; hence the copious comments. */ | |
ebdd561a | 251 | static const unsigned long long |
1da177e4 LT |
252 | real_mode_gdt_entries [3] = |
253 | { | |
254 | 0x0000000000000000ULL, /* Null descriptor */ | |
ebdd561a JB |
255 | 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ |
256 | 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ | |
1da177e4 LT |
257 | }; |
258 | ||
ebdd561a | 259 | static const struct desc_ptr |
05f4a3ec | 260 | real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, |
4d022e35 | 261 | real_mode_idt = { 0x3ff, 0 }; |
1da177e4 LT |
262 | |
263 | /* This is 16-bit protected mode code to disable paging and the cache, | |
264 | switch to real mode and jump to the BIOS reset code. | |
265 | ||
266 | The instruction that switches to real mode by writing to CR0 must be | |
267 | followed immediately by a far jump instruction, which set CS to a | |
268 | valid value for real mode, and flushes the prefetch queue to avoid | |
269 | running instructions that have already been decoded in protected | |
270 | mode. | |
271 | ||
272 | Clears all the flags except ET, especially PG (paging), PE | |
273 | (protected-mode enable) and TS (task switch for coprocessor state | |
274 | save). Flushes the TLB after paging has been disabled. Sets CD and | |
275 | NW, to disable the cache on a 486, and invalidates the cache. This | |
276 | is more like the state of a 486 after reset. I don't know if | |
277 | something else should be done for other chips. | |
278 | ||
279 | More could be done here to set up the registers as if a CPU reset had | |
280 | occurred; hopefully real BIOSs don't assume much. */ | |
ebdd561a | 281 | static const unsigned char real_mode_switch [] = |
1da177e4 LT |
282 | { |
283 | 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ | |
284 | 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ | |
285 | 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ | |
286 | 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ | |
287 | 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ | |
288 | 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ | |
289 | 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ | |
290 | 0x74, 0x02, /* jz f */ | |
291 | 0x0f, 0x09, /* wbinvd */ | |
292 | 0x24, 0x10, /* f: andb $0x10,al */ | |
293 | 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ | |
294 | }; | |
ebdd561a | 295 | static const unsigned char jump_to_bios [] = |
1da177e4 LT |
296 | { |
297 | 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ | |
298 | }; | |
299 | ||
300 | /* | |
301 | * Switch to real mode and then execute the code | |
302 | * specified by the code and length parameters. | |
303 | * We assume that length will aways be less that 100! | |
304 | */ | |
ebdd561a | 305 | void machine_real_restart(const unsigned char *code, int length) |
1da177e4 | 306 | { |
1da177e4 LT |
307 | local_irq_disable(); |
308 | ||
309 | /* Write zero to CMOS register number 0x0f, which the BIOS POST | |
310 | routine will recognize as telling it to do a proper reboot. (Well | |
311 | that's what this book in front of me says -- it may only apply to | |
312 | the Phoenix BIOS though, it's not clear). At the same time, | |
313 | disable NMIs by setting the top bit in the CMOS address register, | |
314 | as we're about to do peculiar things to the CPU. I'm not sure if | |
315 | `outb_p' is needed instead of just `outb'. Use it to be on the | |
316 | safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) | |
317 | */ | |
62dbc210 | 318 | spin_lock(&rtc_lock); |
1da177e4 | 319 | CMOS_WRITE(0x00, 0x8f); |
62dbc210 | 320 | spin_unlock(&rtc_lock); |
1da177e4 LT |
321 | |
322 | /* Remap the kernel at virtual address zero, as well as offset zero | |
323 | from the kernel segment. This assumes the kernel segment starts at | |
324 | virtual address PAGE_OFFSET. */ | |
68db065c | 325 | memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, |
4d022e35 | 326 | sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); |
1da177e4 LT |
327 | |
328 | /* | |
329 | * Use `swapper_pg_dir' as our page directory. | |
330 | */ | |
331 | load_cr3(swapper_pg_dir); | |
332 | ||
333 | /* Write 0x1234 to absolute memory location 0x472. The BIOS reads | |
334 | this on booting to tell it to "Bypass memory test (also warm | |
335 | boot)". This seems like a fairly standard thing that gets set by | |
336 | REBOOT.COM programs, and the previous reset routine did this | |
337 | too. */ | |
1da177e4 LT |
338 | *((unsigned short *)0x472) = reboot_mode; |
339 | ||
340 | /* For the switch to real mode, copy some code to low memory. It has | |
341 | to be in the first 64k because it is running in 16-bit mode, and it | |
342 | has to have the same physical and virtual address, because it turns | |
343 | off paging. Copy it near the end of the first page, out of the way | |
344 | of BIOS variables. */ | |
4d022e35 | 345 | memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), |
1da177e4 | 346 | real_mode_switch, sizeof (real_mode_switch)); |
4d022e35 | 347 | memcpy((void *)(0x1000 - 100), code, length); |
1da177e4 LT |
348 | |
349 | /* Set up the IDT for real mode. */ | |
4d37e7e3 | 350 | load_idt(&real_mode_idt); |
1da177e4 LT |
351 | |
352 | /* Set up a GDT from which we can load segment descriptors for real | |
353 | mode. The GDT is not used in real mode; it is just needed here to | |
354 | prepare the descriptors. */ | |
4d37e7e3 | 355 | load_gdt(&real_mode_gdt); |
1da177e4 LT |
356 | |
357 | /* Load the data segment registers, and thus the descriptors ready for | |
358 | real mode. The base address of each segment is 0x100, 16 times the | |
359 | selector value being loaded here. This is so that the segment | |
360 | registers don't have to be reloaded after switching to real mode: | |
361 | the values are consistent for real mode operation already. */ | |
1da177e4 LT |
362 | __asm__ __volatile__ ("movl $0x0010,%%eax\n" |
363 | "\tmovl %%eax,%%ds\n" | |
364 | "\tmovl %%eax,%%es\n" | |
365 | "\tmovl %%eax,%%fs\n" | |
366 | "\tmovl %%eax,%%gs\n" | |
367 | "\tmovl %%eax,%%ss" : : : "eax"); | |
368 | ||
369 | /* Jump to the 16-bit code that we copied earlier. It disables paging | |
370 | and the cache, switches to real mode, and jumps to the BIOS reset | |
371 | entry point. */ | |
1da177e4 LT |
372 | __asm__ __volatile__ ("ljmp $0x0008,%0" |
373 | : | |
4d022e35 | 374 | : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); |
1da177e4 | 375 | } |
129f6946 AD |
376 | #ifdef CONFIG_APM_MODULE |
377 | EXPORT_SYMBOL(machine_real_restart); | |
378 | #endif | |
1da177e4 | 379 | |
4d022e35 MB |
380 | #endif /* CONFIG_X86_32 */ |
381 | ||
382 | static inline void kb_wait(void) | |
383 | { | |
384 | int i; | |
385 | ||
c84d6af8 AC |
386 | for (i = 0; i < 0x10000; i++) { |
387 | if ((inb(0x64) & 0x02) == 0) | |
4d022e35 | 388 | break; |
c84d6af8 AC |
389 | udelay(2); |
390 | } | |
4d022e35 MB |
391 | } |
392 | ||
d176720d EH |
393 | static void vmxoff_nmi(int cpu, struct die_args *args) |
394 | { | |
395 | cpu_emergency_vmxoff(); | |
396 | } | |
397 | ||
398 | /* Use NMIs as IPIs to tell all CPUs to disable virtualization | |
399 | */ | |
400 | static void emergency_vmx_disable_all(void) | |
401 | { | |
402 | /* Just make sure we won't change CPUs while doing this */ | |
403 | local_irq_disable(); | |
404 | ||
405 | /* We need to disable VMX on all CPUs before rebooting, otherwise | |
406 | * we risk hanging up the machine, because the CPU ignore INIT | |
407 | * signals when VMX is enabled. | |
408 | * | |
409 | * We can't take any locks and we may be on an inconsistent | |
410 | * state, so we use NMIs as IPIs to tell the other CPUs to disable | |
411 | * VMX and halt. | |
412 | * | |
413 | * For safety, we will avoid running the nmi_shootdown_cpus() | |
414 | * stuff unnecessarily, but we don't have a way to check | |
415 | * if other CPUs have VMX enabled. So we will call it only if the | |
416 | * CPU we are running on has VMX enabled. | |
417 | * | |
418 | * We will miss cases where VMX is not enabled on all CPUs. This | |
419 | * shouldn't do much harm because KVM always enable VMX on all | |
420 | * CPUs anyway. But we can miss it on the small window where KVM | |
421 | * is still enabling VMX. | |
422 | */ | |
423 | if (cpu_has_vmx() && cpu_vmx_enabled()) { | |
424 | /* Disable VMX on this CPU. | |
425 | */ | |
426 | cpu_vmxoff(); | |
427 | ||
428 | /* Halt and disable VMX on the other CPUs */ | |
429 | nmi_shootdown_cpus(vmxoff_nmi); | |
430 | ||
431 | } | |
432 | } | |
433 | ||
434 | ||
7432d149 IM |
435 | void __attribute__((weak)) mach_reboot_fixups(void) |
436 | { | |
437 | } | |
438 | ||
416e2d63 | 439 | static void native_machine_emergency_restart(void) |
1da177e4 | 440 | { |
4d022e35 MB |
441 | int i; |
442 | ||
d176720d EH |
443 | if (reboot_emergency) |
444 | emergency_vmx_disable_all(); | |
445 | ||
4d022e35 MB |
446 | /* Tell the BIOS if we want cold or warm reboot */ |
447 | *((unsigned short *)__va(0x472)) = reboot_mode; | |
448 | ||
449 | for (;;) { | |
450 | /* Could also try the reset bit in the Hammer NB */ | |
451 | switch (reboot_type) { | |
452 | case BOOT_KBD: | |
7432d149 IM |
453 | mach_reboot_fixups(); /* for board specific fixups */ |
454 | ||
4d022e35 MB |
455 | for (i = 0; i < 10; i++) { |
456 | kb_wait(); | |
457 | udelay(50); | |
458 | outb(0xfe, 0x64); /* pulse reset low */ | |
459 | udelay(50); | |
460 | } | |
461 | ||
462 | case BOOT_TRIPLE: | |
ebdd561a | 463 | load_idt(&no_idt); |
4d022e35 MB |
464 | __asm__ __volatile__("int3"); |
465 | ||
466 | reboot_type = BOOT_KBD; | |
467 | break; | |
468 | ||
469 | #ifdef CONFIG_X86_32 | |
470 | case BOOT_BIOS: | |
471 | machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); | |
472 | ||
473 | reboot_type = BOOT_KBD; | |
474 | break; | |
475 | #endif | |
476 | ||
477 | case BOOT_ACPI: | |
478 | acpi_reboot(); | |
479 | reboot_type = BOOT_KBD; | |
480 | break; | |
481 | ||
4d022e35 MB |
482 | case BOOT_EFI: |
483 | if (efi_enabled) | |
14d7ca5c PA |
484 | efi.reset_system(reboot_mode ? |
485 | EFI_RESET_WARM : | |
486 | EFI_RESET_COLD, | |
4d022e35 | 487 | EFI_SUCCESS, 0, NULL); |
b47b9288 | 488 | reboot_type = BOOT_KBD; |
14d7ca5c | 489 | break; |
4d022e35 | 490 | |
14d7ca5c PA |
491 | case BOOT_CF9: |
492 | port_cf9_safe = true; | |
493 | /* fall through */ | |
4d022e35 | 494 | |
14d7ca5c PA |
495 | case BOOT_CF9_COND: |
496 | if (port_cf9_safe) { | |
497 | u8 cf9 = inb(0xcf9) & ~6; | |
498 | outb(cf9|2, 0xcf9); /* Request hard reset */ | |
499 | udelay(50); | |
500 | outb(cf9|6, 0xcf9); /* Actually do the reset */ | |
501 | udelay(50); | |
502 | } | |
4d022e35 MB |
503 | reboot_type = BOOT_KBD; |
504 | break; | |
505 | } | |
506 | } | |
507 | } | |
508 | ||
3c62c625 | 509 | void native_machine_shutdown(void) |
4d022e35 MB |
510 | { |
511 | /* Stop the cpus and apics */ | |
1da177e4 | 512 | #ifdef CONFIG_SMP |
dd2a1305 EB |
513 | |
514 | /* The boot cpu is always logical cpu 0 */ | |
65c01184 | 515 | int reboot_cpu_id = 0; |
dd2a1305 | 516 | |
4d022e35 | 517 | #ifdef CONFIG_X86_32 |
dd2a1305 | 518 | /* See if there has been given a command line override */ |
9628937d | 519 | if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && |
0bc3cc03 | 520 | cpu_online(reboot_cpu)) |
dd2a1305 | 521 | reboot_cpu_id = reboot_cpu; |
4d022e35 | 522 | #endif |
1da177e4 | 523 | |
4d022e35 | 524 | /* Make certain the cpu I'm about to reboot on is online */ |
0bc3cc03 | 525 | if (!cpu_online(reboot_cpu_id)) |
dd2a1305 | 526 | reboot_cpu_id = smp_processor_id(); |
dd2a1305 EB |
527 | |
528 | /* Make certain I only run on the appropriate processor */ | |
9628937d | 529 | set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); |
dd2a1305 | 530 | |
4d022e35 MB |
531 | /* O.K Now that I'm on the appropriate processor, |
532 | * stop all of the others. | |
1da177e4 LT |
533 | */ |
534 | smp_send_stop(); | |
4d022e35 | 535 | #endif |
1da177e4 LT |
536 | |
537 | lapic_shutdown(); | |
538 | ||
539 | #ifdef CONFIG_X86_IO_APIC | |
540 | disable_IO_APIC(); | |
541 | #endif | |
4d022e35 | 542 | |
c86c7fbc OH |
543 | #ifdef CONFIG_HPET_TIMER |
544 | hpet_disable(); | |
545 | #endif | |
dd2a1305 | 546 | |
4d022e35 MB |
547 | #ifdef CONFIG_X86_64 |
548 | pci_iommu_shutdown(); | |
549 | #endif | |
973efae2 JF |
550 | } |
551 | ||
d176720d EH |
552 | static void __machine_emergency_restart(int emergency) |
553 | { | |
554 | reboot_emergency = emergency; | |
555 | machine_ops.emergency_restart(); | |
556 | } | |
557 | ||
416e2d63 | 558 | static void native_machine_restart(char *__unused) |
dd2a1305 | 559 | { |
4d022e35 | 560 | printk("machine restart\n"); |
1da177e4 | 561 | |
4d022e35 MB |
562 | if (!reboot_force) |
563 | machine_shutdown(); | |
d176720d | 564 | __machine_emergency_restart(0); |
4a1421f8 EB |
565 | } |
566 | ||
416e2d63 | 567 | static void native_machine_halt(void) |
1da177e4 | 568 | { |
d3ec5cae IV |
569 | /* stop other cpus and apics */ |
570 | machine_shutdown(); | |
571 | ||
572 | /* stop this cpu */ | |
573 | stop_this_cpu(NULL); | |
1da177e4 LT |
574 | } |
575 | ||
416e2d63 | 576 | static void native_machine_power_off(void) |
1da177e4 | 577 | { |
6e3fbee5 | 578 | if (pm_power_off) { |
4d022e35 MB |
579 | if (!reboot_force) |
580 | machine_shutdown(); | |
1da177e4 | 581 | pm_power_off(); |
6e3fbee5 | 582 | } |
1da177e4 LT |
583 | } |
584 | ||
07f3331c | 585 | struct machine_ops machine_ops = { |
416e2d63 JB |
586 | .power_off = native_machine_power_off, |
587 | .shutdown = native_machine_shutdown, | |
588 | .emergency_restart = native_machine_emergency_restart, | |
589 | .restart = native_machine_restart, | |
ed23dc6f GC |
590 | .halt = native_machine_halt, |
591 | #ifdef CONFIG_KEXEC | |
592 | .crash_shutdown = native_machine_crash_shutdown, | |
593 | #endif | |
07f3331c | 594 | }; |
416e2d63 JB |
595 | |
596 | void machine_power_off(void) | |
597 | { | |
598 | machine_ops.power_off(); | |
599 | } | |
600 | ||
601 | void machine_shutdown(void) | |
602 | { | |
603 | machine_ops.shutdown(); | |
604 | } | |
605 | ||
606 | void machine_emergency_restart(void) | |
607 | { | |
d176720d | 608 | __machine_emergency_restart(1); |
416e2d63 JB |
609 | } |
610 | ||
611 | void machine_restart(char *cmd) | |
612 | { | |
613 | machine_ops.restart(cmd); | |
614 | } | |
615 | ||
616 | void machine_halt(void) | |
617 | { | |
618 | machine_ops.halt(); | |
619 | } | |
620 | ||
ed23dc6f GC |
621 | #ifdef CONFIG_KEXEC |
622 | void machine_crash_shutdown(struct pt_regs *regs) | |
623 | { | |
624 | machine_ops.crash_shutdown(regs); | |
625 | } | |
626 | #endif | |
2ddded21 EH |
627 | |
628 | ||
bb8dd270 | 629 | #if defined(CONFIG_SMP) |
2ddded21 EH |
630 | |
631 | /* This keeps a track of which one is crashing cpu. */ | |
632 | static int crashing_cpu; | |
633 | static nmi_shootdown_cb shootdown_callback; | |
634 | ||
635 | static atomic_t waiting_for_crash_ipi; | |
636 | ||
637 | static int crash_nmi_callback(struct notifier_block *self, | |
638 | unsigned long val, void *data) | |
639 | { | |
640 | int cpu; | |
641 | ||
642 | if (val != DIE_NMI_IPI) | |
643 | return NOTIFY_OK; | |
644 | ||
645 | cpu = raw_smp_processor_id(); | |
646 | ||
647 | /* Don't do anything if this handler is invoked on crashing cpu. | |
648 | * Otherwise, system will completely hang. Crashing cpu can get | |
649 | * an NMI if system was initially booted with nmi_watchdog parameter. | |
650 | */ | |
651 | if (cpu == crashing_cpu) | |
652 | return NOTIFY_STOP; | |
653 | local_irq_disable(); | |
654 | ||
655 | shootdown_callback(cpu, (struct die_args *)data); | |
656 | ||
657 | atomic_dec(&waiting_for_crash_ipi); | |
658 | /* Assume hlt works */ | |
659 | halt(); | |
660 | for (;;) | |
661 | cpu_relax(); | |
662 | ||
663 | return 1; | |
664 | } | |
665 | ||
666 | static void smp_send_nmi_allbutself(void) | |
667 | { | |
dac5f412 | 668 | apic->send_IPI_allbutself(NMI_VECTOR); |
2ddded21 EH |
669 | } |
670 | ||
671 | static struct notifier_block crash_nmi_nb = { | |
672 | .notifier_call = crash_nmi_callback, | |
673 | }; | |
674 | ||
bb8dd270 EH |
675 | /* Halt all other CPUs, calling the specified function on each of them |
676 | * | |
677 | * This function can be used to halt all other CPUs on crash | |
678 | * or emergency reboot time. The function passed as parameter | |
679 | * will be called inside a NMI handler on all CPUs. | |
680 | */ | |
2ddded21 EH |
681 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) |
682 | { | |
683 | unsigned long msecs; | |
c415b3dc | 684 | local_irq_disable(); |
2ddded21 EH |
685 | |
686 | /* Make a note of crashing cpu. Will be used in NMI callback.*/ | |
687 | crashing_cpu = safe_smp_processor_id(); | |
688 | ||
689 | shootdown_callback = callback; | |
690 | ||
691 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | |
692 | /* Would it be better to replace the trap vector here? */ | |
693 | if (register_die_notifier(&crash_nmi_nb)) | |
694 | return; /* return what? */ | |
695 | /* Ensure the new callback function is set before sending | |
696 | * out the NMI | |
697 | */ | |
698 | wmb(); | |
699 | ||
700 | smp_send_nmi_allbutself(); | |
701 | ||
702 | msecs = 1000; /* Wait at most a second for the other cpus to stop */ | |
703 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { | |
704 | mdelay(1); | |
705 | msecs--; | |
706 | } | |
707 | ||
708 | /* Leave the nmi callback set */ | |
709 | } | |
bb8dd270 EH |
710 | #else /* !CONFIG_SMP */ |
711 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) | |
712 | { | |
713 | /* No other CPUs to shoot down */ | |
714 | } | |
2ddded21 | 715 | #endif |