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Commit | Line | Data |
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1da177e4 | 1 | #include <linux/module.h> |
1da177e4 | 2 | #include <linux/init.h> |
cd6ed525 | 3 | #include <linux/reboot.h> |
4d022e35 MB |
4 | #include <linux/init.h> |
5 | #include <linux/pm.h> | |
6 | #include <linux/efi.h> | |
7 | #include <acpi/reboot.h> | |
8 | #include <asm/io.h> | |
1da177e4 | 9 | #include <asm/apic.h> |
4d37e7e3 | 10 | #include <asm/desc.h> |
4d022e35 | 11 | #include <asm/hpet.h> |
973efae2 | 12 | #include <asm/reboot_fixups.h> |
07f3331c | 13 | #include <asm/reboot.h> |
1da177e4 | 14 | |
4d022e35 MB |
15 | #ifdef CONFIG_X86_32 |
16 | # include <linux/dmi.h> | |
17 | # include <linux/ctype.h> | |
18 | # include <linux/mc146818rtc.h> | |
19 | # include <asm/pgtable.h> | |
20 | #else | |
21 | # include <asm/iommu.h> | |
22 | #endif | |
23 | ||
1da177e4 LT |
24 | /* |
25 | * Power off function, if any | |
26 | */ | |
27 | void (*pm_power_off)(void); | |
129f6946 | 28 | EXPORT_SYMBOL(pm_power_off); |
1da177e4 | 29 | |
4d022e35 | 30 | static long no_idt[3]; |
1da177e4 | 31 | static int reboot_mode; |
4d022e35 MB |
32 | enum reboot_type reboot_type = BOOT_KBD; |
33 | int reboot_force; | |
1da177e4 | 34 | |
4d022e35 | 35 | #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) |
1da177e4 | 36 | static int reboot_cpu = -1; |
1da177e4 | 37 | #endif |
4d022e35 MB |
38 | |
39 | /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | |
40 | warm Don't set the cold reboot flag | |
41 | cold Set the cold reboot flag | |
42 | bios Reboot by jumping through the BIOS (only for X86_32) | |
43 | smp Reboot by executing reset on BSP or other CPU (only for X86_32) | |
44 | triple Force a triple fault (init) | |
45 | kbd Use the keyboard controller. cold reset (default) | |
46 | acpi Use the RESET_REG in the FADT | |
47 | efi Use efi reset_system runtime service | |
48 | force Avoid anything that could hang. | |
49 | */ | |
1da177e4 LT |
50 | static int __init reboot_setup(char *str) |
51 | { | |
4d022e35 | 52 | for (;;) { |
1da177e4 | 53 | switch (*str) { |
4d022e35 | 54 | case 'w': |
1da177e4 LT |
55 | reboot_mode = 0x1234; |
56 | break; | |
4d022e35 MB |
57 | |
58 | case 'c': | |
59 | reboot_mode = 0; | |
1da177e4 | 60 | break; |
4d022e35 MB |
61 | |
62 | #ifdef CONFIG_X86_32 | |
1da177e4 | 63 | #ifdef CONFIG_SMP |
4d022e35 | 64 | case 's': |
6f673d83 | 65 | if (isdigit(*(str+1))) { |
1da177e4 | 66 | reboot_cpu = (int) (*(str+1) - '0'); |
6f673d83 | 67 | if (isdigit(*(str+2))) |
1da177e4 LT |
68 | reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); |
69 | } | |
4d022e35 MB |
70 | /* we will leave sorting out the final value |
71 | when we are ready to reboot, since we might not | |
72 | have set up boot_cpu_id or smp_num_cpu */ | |
1da177e4 | 73 | break; |
4d022e35 MB |
74 | #endif /* CONFIG_SMP */ |
75 | ||
76 | case 'b': | |
1da177e4 | 77 | #endif |
4d022e35 MB |
78 | case 'a': |
79 | case 'k': | |
80 | case 't': | |
81 | case 'e': | |
82 | reboot_type = *str; | |
83 | break; | |
84 | ||
85 | case 'f': | |
86 | reboot_force = 1; | |
87 | break; | |
1da177e4 | 88 | } |
4d022e35 MB |
89 | |
90 | str = strchr(str, ','); | |
91 | if (str) | |
1da177e4 LT |
92 | str++; |
93 | else | |
94 | break; | |
95 | } | |
96 | return 1; | |
97 | } | |
98 | ||
99 | __setup("reboot=", reboot_setup); | |
100 | ||
4d022e35 MB |
101 | |
102 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
103 | /* |
104 | * Reboot options and system auto-detection code provided by | |
105 | * Dell Inc. so their systems "just work". :-) | |
106 | */ | |
107 | ||
108 | /* | |
4d022e35 MB |
109 | * Some machines require the "reboot=b" commandline option, |
110 | * this quirk makes that automatic. | |
1da177e4 | 111 | */ |
1855256c | 112 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
1da177e4 | 113 | { |
4d022e35 MB |
114 | if (reboot_type != BOOT_BIOS) { |
115 | reboot_type = BOOT_BIOS; | |
1da177e4 LT |
116 | printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); |
117 | } | |
118 | return 0; | |
119 | } | |
120 | ||
1da177e4 | 121 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
b9e82af8 TG |
122 | { /* Handle problems with rebooting on Dell E520's */ |
123 | .callback = set_bios_reboot, | |
124 | .ident = "Dell E520", | |
125 | .matches = { | |
126 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
127 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), | |
128 | }, | |
129 | }, | |
1da177e4 | 130 | { /* Handle problems with rebooting on Dell 1300's */ |
dd2a1305 | 131 | .callback = set_bios_reboot, |
1da177e4 LT |
132 | .ident = "Dell PowerEdge 1300", |
133 | .matches = { | |
134 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
135 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), | |
136 | }, | |
137 | }, | |
138 | { /* Handle problems with rebooting on Dell 300's */ | |
139 | .callback = set_bios_reboot, | |
140 | .ident = "Dell PowerEdge 300", | |
141 | .matches = { | |
142 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
143 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), | |
144 | }, | |
145 | }, | |
df2edcf3 JJ |
146 | { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ |
147 | .callback = set_bios_reboot, | |
148 | .ident = "Dell OptiPlex 745", | |
149 | .matches = { | |
150 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
151 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
152 | DMI_MATCH(DMI_BOARD_NAME, "0WF810"), | |
153 | }, | |
154 | }, | |
fc115bf1 CK |
155 | { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ |
156 | .callback = set_bios_reboot, | |
157 | .ident = "Dell OptiPlex 745", | |
158 | .matches = { | |
159 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
160 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
161 | DMI_MATCH(DMI_BOARD_NAME, "0MM599"), | |
162 | }, | |
163 | }, | |
1da177e4 LT |
164 | { /* Handle problems with rebooting on Dell 2400's */ |
165 | .callback = set_bios_reboot, | |
166 | .ident = "Dell PowerEdge 2400", | |
167 | .matches = { | |
168 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
169 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), | |
170 | }, | |
171 | }, | |
766c3f94 | 172 | { /* Handle problems with rebooting on HP laptops */ |
d91b14c4 | 173 | .callback = set_bios_reboot, |
766c3f94 | 174 | .ident = "HP Compaq Laptop", |
d91b14c4 TV |
175 | .matches = { |
176 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
766c3f94 | 177 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
d91b14c4 TV |
178 | }, |
179 | }, | |
1da177e4 LT |
180 | { } |
181 | }; | |
182 | ||
183 | static int __init reboot_init(void) | |
184 | { | |
185 | dmi_check_system(reboot_dmi_table); | |
186 | return 0; | |
187 | } | |
1da177e4 LT |
188 | core_initcall(reboot_init); |
189 | ||
190 | /* The following code and data reboots the machine by switching to real | |
191 | mode and jumping to the BIOS reset entry point, as if the CPU has | |
192 | really been reset. The previous version asked the keyboard | |
193 | controller to pulse the CPU reset line, which is more thorough, but | |
194 | doesn't work with at least one type of 486 motherboard. It is easy | |
195 | to stop this code working; hence the copious comments. */ | |
1da177e4 LT |
196 | static unsigned long long |
197 | real_mode_gdt_entries [3] = | |
198 | { | |
199 | 0x0000000000000000ULL, /* Null descriptor */ | |
200 | 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ | |
201 | 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ | |
202 | }; | |
203 | ||
6b68f01b | 204 | static struct desc_ptr |
05f4a3ec | 205 | real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, |
4d022e35 | 206 | real_mode_idt = { 0x3ff, 0 }; |
1da177e4 LT |
207 | |
208 | /* This is 16-bit protected mode code to disable paging and the cache, | |
209 | switch to real mode and jump to the BIOS reset code. | |
210 | ||
211 | The instruction that switches to real mode by writing to CR0 must be | |
212 | followed immediately by a far jump instruction, which set CS to a | |
213 | valid value for real mode, and flushes the prefetch queue to avoid | |
214 | running instructions that have already been decoded in protected | |
215 | mode. | |
216 | ||
217 | Clears all the flags except ET, especially PG (paging), PE | |
218 | (protected-mode enable) and TS (task switch for coprocessor state | |
219 | save). Flushes the TLB after paging has been disabled. Sets CD and | |
220 | NW, to disable the cache on a 486, and invalidates the cache. This | |
221 | is more like the state of a 486 after reset. I don't know if | |
222 | something else should be done for other chips. | |
223 | ||
224 | More could be done here to set up the registers as if a CPU reset had | |
225 | occurred; hopefully real BIOSs don't assume much. */ | |
1da177e4 LT |
226 | static unsigned char real_mode_switch [] = |
227 | { | |
228 | 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ | |
229 | 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ | |
230 | 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ | |
231 | 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ | |
232 | 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ | |
233 | 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ | |
234 | 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ | |
235 | 0x74, 0x02, /* jz f */ | |
236 | 0x0f, 0x09, /* wbinvd */ | |
237 | 0x24, 0x10, /* f: andb $0x10,al */ | |
238 | 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ | |
239 | }; | |
240 | static unsigned char jump_to_bios [] = | |
241 | { | |
242 | 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ | |
243 | }; | |
244 | ||
245 | /* | |
246 | * Switch to real mode and then execute the code | |
247 | * specified by the code and length parameters. | |
248 | * We assume that length will aways be less that 100! | |
249 | */ | |
250 | void machine_real_restart(unsigned char *code, int length) | |
251 | { | |
1da177e4 LT |
252 | local_irq_disable(); |
253 | ||
254 | /* Write zero to CMOS register number 0x0f, which the BIOS POST | |
255 | routine will recognize as telling it to do a proper reboot. (Well | |
256 | that's what this book in front of me says -- it may only apply to | |
257 | the Phoenix BIOS though, it's not clear). At the same time, | |
258 | disable NMIs by setting the top bit in the CMOS address register, | |
259 | as we're about to do peculiar things to the CPU. I'm not sure if | |
260 | `outb_p' is needed instead of just `outb'. Use it to be on the | |
261 | safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) | |
262 | */ | |
62dbc210 | 263 | spin_lock(&rtc_lock); |
1da177e4 | 264 | CMOS_WRITE(0x00, 0x8f); |
62dbc210 | 265 | spin_unlock(&rtc_lock); |
1da177e4 LT |
266 | |
267 | /* Remap the kernel at virtual address zero, as well as offset zero | |
268 | from the kernel segment. This assumes the kernel segment starts at | |
269 | virtual address PAGE_OFFSET. */ | |
4d022e35 MB |
270 | memcpy(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS, |
271 | sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); | |
1da177e4 LT |
272 | |
273 | /* | |
274 | * Use `swapper_pg_dir' as our page directory. | |
275 | */ | |
276 | load_cr3(swapper_pg_dir); | |
277 | ||
278 | /* Write 0x1234 to absolute memory location 0x472. The BIOS reads | |
279 | this on booting to tell it to "Bypass memory test (also warm | |
280 | boot)". This seems like a fairly standard thing that gets set by | |
281 | REBOOT.COM programs, and the previous reset routine did this | |
282 | too. */ | |
1da177e4 LT |
283 | *((unsigned short *)0x472) = reboot_mode; |
284 | ||
285 | /* For the switch to real mode, copy some code to low memory. It has | |
286 | to be in the first 64k because it is running in 16-bit mode, and it | |
287 | has to have the same physical and virtual address, because it turns | |
288 | off paging. Copy it near the end of the first page, out of the way | |
289 | of BIOS variables. */ | |
4d022e35 | 290 | memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), |
1da177e4 | 291 | real_mode_switch, sizeof (real_mode_switch)); |
4d022e35 | 292 | memcpy((void *)(0x1000 - 100), code, length); |
1da177e4 LT |
293 | |
294 | /* Set up the IDT for real mode. */ | |
4d37e7e3 | 295 | load_idt(&real_mode_idt); |
1da177e4 LT |
296 | |
297 | /* Set up a GDT from which we can load segment descriptors for real | |
298 | mode. The GDT is not used in real mode; it is just needed here to | |
299 | prepare the descriptors. */ | |
4d37e7e3 | 300 | load_gdt(&real_mode_gdt); |
1da177e4 LT |
301 | |
302 | /* Load the data segment registers, and thus the descriptors ready for | |
303 | real mode. The base address of each segment is 0x100, 16 times the | |
304 | selector value being loaded here. This is so that the segment | |
305 | registers don't have to be reloaded after switching to real mode: | |
306 | the values are consistent for real mode operation already. */ | |
1da177e4 LT |
307 | __asm__ __volatile__ ("movl $0x0010,%%eax\n" |
308 | "\tmovl %%eax,%%ds\n" | |
309 | "\tmovl %%eax,%%es\n" | |
310 | "\tmovl %%eax,%%fs\n" | |
311 | "\tmovl %%eax,%%gs\n" | |
312 | "\tmovl %%eax,%%ss" : : : "eax"); | |
313 | ||
314 | /* Jump to the 16-bit code that we copied earlier. It disables paging | |
315 | and the cache, switches to real mode, and jumps to the BIOS reset | |
316 | entry point. */ | |
1da177e4 LT |
317 | __asm__ __volatile__ ("ljmp $0x0008,%0" |
318 | : | |
4d022e35 | 319 | : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); |
1da177e4 | 320 | } |
129f6946 AD |
321 | #ifdef CONFIG_APM_MODULE |
322 | EXPORT_SYMBOL(machine_real_restart); | |
323 | #endif | |
1da177e4 | 324 | |
4d022e35 MB |
325 | #endif /* CONFIG_X86_32 */ |
326 | ||
327 | static inline void kb_wait(void) | |
328 | { | |
329 | int i; | |
330 | ||
c84d6af8 AC |
331 | for (i = 0; i < 0x10000; i++) { |
332 | if ((inb(0x64) & 0x02) == 0) | |
4d022e35 | 333 | break; |
c84d6af8 AC |
334 | udelay(2); |
335 | } | |
4d022e35 MB |
336 | } |
337 | ||
7432d149 IM |
338 | void __attribute__((weak)) mach_reboot_fixups(void) |
339 | { | |
340 | } | |
341 | ||
416e2d63 | 342 | static void native_machine_emergency_restart(void) |
1da177e4 | 343 | { |
4d022e35 MB |
344 | int i; |
345 | ||
346 | /* Tell the BIOS if we want cold or warm reboot */ | |
347 | *((unsigned short *)__va(0x472)) = reboot_mode; | |
348 | ||
349 | for (;;) { | |
350 | /* Could also try the reset bit in the Hammer NB */ | |
351 | switch (reboot_type) { | |
352 | case BOOT_KBD: | |
7432d149 IM |
353 | mach_reboot_fixups(); /* for board specific fixups */ |
354 | ||
4d022e35 MB |
355 | for (i = 0; i < 10; i++) { |
356 | kb_wait(); | |
357 | udelay(50); | |
358 | outb(0xfe, 0x64); /* pulse reset low */ | |
359 | udelay(50); | |
360 | } | |
361 | ||
362 | case BOOT_TRIPLE: | |
363 | load_idt((const struct desc_ptr *)&no_idt); | |
364 | __asm__ __volatile__("int3"); | |
365 | ||
366 | reboot_type = BOOT_KBD; | |
367 | break; | |
368 | ||
369 | #ifdef CONFIG_X86_32 | |
370 | case BOOT_BIOS: | |
371 | machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); | |
372 | ||
373 | reboot_type = BOOT_KBD; | |
374 | break; | |
375 | #endif | |
376 | ||
377 | case BOOT_ACPI: | |
378 | acpi_reboot(); | |
379 | reboot_type = BOOT_KBD; | |
380 | break; | |
381 | ||
382 | ||
383 | case BOOT_EFI: | |
384 | if (efi_enabled) | |
385 | efi.reset_system(reboot_mode ? EFI_RESET_WARM : EFI_RESET_COLD, | |
386 | EFI_SUCCESS, 0, NULL); | |
387 | ||
388 | reboot_type = BOOT_KBD; | |
389 | break; | |
390 | } | |
391 | } | |
392 | } | |
393 | ||
416e2d63 | 394 | static void native_machine_shutdown(void) |
4d022e35 MB |
395 | { |
396 | /* Stop the cpus and apics */ | |
1da177e4 | 397 | #ifdef CONFIG_SMP |
dd2a1305 EB |
398 | int reboot_cpu_id; |
399 | ||
400 | /* The boot cpu is always logical cpu 0 */ | |
401 | reboot_cpu_id = 0; | |
402 | ||
4d022e35 | 403 | #ifdef CONFIG_X86_32 |
dd2a1305 | 404 | /* See if there has been given a command line override */ |
d8e392e7 | 405 | if ((reboot_cpu != -1) && (reboot_cpu < NR_CPUS) && |
4d022e35 | 406 | cpu_isset(reboot_cpu, cpu_online_map)) |
dd2a1305 | 407 | reboot_cpu_id = reboot_cpu; |
4d022e35 | 408 | #endif |
1da177e4 | 409 | |
4d022e35 MB |
410 | /* Make certain the cpu I'm about to reboot on is online */ |
411 | if (!cpu_isset(reboot_cpu_id, cpu_online_map)) | |
dd2a1305 | 412 | reboot_cpu_id = smp_processor_id(); |
dd2a1305 EB |
413 | |
414 | /* Make certain I only run on the appropriate processor */ | |
415 | set_cpus_allowed(current, cpumask_of_cpu(reboot_cpu_id)); | |
416 | ||
4d022e35 MB |
417 | /* O.K Now that I'm on the appropriate processor, |
418 | * stop all of the others. | |
1da177e4 LT |
419 | */ |
420 | smp_send_stop(); | |
4d022e35 | 421 | #endif |
1da177e4 LT |
422 | |
423 | lapic_shutdown(); | |
424 | ||
425 | #ifdef CONFIG_X86_IO_APIC | |
426 | disable_IO_APIC(); | |
427 | #endif | |
4d022e35 | 428 | |
c86c7fbc OH |
429 | #ifdef CONFIG_HPET_TIMER |
430 | hpet_disable(); | |
431 | #endif | |
dd2a1305 | 432 | |
4d022e35 MB |
433 | #ifdef CONFIG_X86_64 |
434 | pci_iommu_shutdown(); | |
435 | #endif | |
973efae2 JF |
436 | } |
437 | ||
416e2d63 | 438 | static void native_machine_restart(char *__unused) |
dd2a1305 | 439 | { |
4d022e35 | 440 | printk("machine restart\n"); |
1da177e4 | 441 | |
4d022e35 MB |
442 | if (!reboot_force) |
443 | machine_shutdown(); | |
4a1421f8 EB |
444 | machine_emergency_restart(); |
445 | } | |
446 | ||
416e2d63 | 447 | static void native_machine_halt(void) |
1da177e4 LT |
448 | { |
449 | } | |
450 | ||
416e2d63 | 451 | static void native_machine_power_off(void) |
1da177e4 | 452 | { |
6e3fbee5 | 453 | if (pm_power_off) { |
4d022e35 MB |
454 | if (!reboot_force) |
455 | machine_shutdown(); | |
1da177e4 | 456 | pm_power_off(); |
6e3fbee5 | 457 | } |
1da177e4 LT |
458 | } |
459 | ||
07f3331c | 460 | struct machine_ops machine_ops = { |
416e2d63 JB |
461 | .power_off = native_machine_power_off, |
462 | .shutdown = native_machine_shutdown, | |
463 | .emergency_restart = native_machine_emergency_restart, | |
464 | .restart = native_machine_restart, | |
465 | .halt = native_machine_halt | |
07f3331c | 466 | }; |
416e2d63 JB |
467 | |
468 | void machine_power_off(void) | |
469 | { | |
470 | machine_ops.power_off(); | |
471 | } | |
472 | ||
473 | void machine_shutdown(void) | |
474 | { | |
475 | machine_ops.shutdown(); | |
476 | } | |
477 | ||
478 | void machine_emergency_restart(void) | |
479 | { | |
480 | machine_ops.emergency_restart(); | |
481 | } | |
482 | ||
483 | void machine_restart(char *cmd) | |
484 | { | |
485 | machine_ops.restart(cmd); | |
486 | } | |
487 | ||
488 | void machine_halt(void) | |
489 | { | |
490 | machine_ops.halt(); | |
491 | } | |
492 |