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1da177e4 1/*
fe599f9f 2 * RTC related functions
1da177e4 3 */
8383d821
JSR
4#include <linux/platform_device.h>
5#include <linux/mc146818rtc.h>
1122b134 6#include <linux/acpi.h>
fe599f9f 7#include <linux/bcd.h>
69c60c88 8#include <linux/export.h>
1da2e3d6 9#include <linux/pnp.h>
3bcbaf6e 10#include <linux/of.h>
1da177e4 11
cdc7957d 12#include <asm/vsyscall.h>
7bd867df 13#include <asm/x86_init.h>
8383d821 14#include <asm/time.h>
35d47699 15#include <asm/mrst.h>
3195ef59 16#include <asm/rtc.h>
1da177e4 17
1122b134 18#ifdef CONFIG_X86_32
1122b134
TG
19/*
20 * This is a special lock that is owned by the CPU and holds the index
21 * register we are working with. It is required for NMI access to the
22 * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
23 */
8383d821 24volatile unsigned long cmos_lock;
1122b134 25EXPORT_SYMBOL(cmos_lock);
8383d821 26#endif /* CONFIG_X86_32 */
1122b134 27
b62576a2
AK
28/* For two digit years assume time is always after that */
29#define CMOS_YEARS_OFFS 2000
30
1122b134
TG
31DEFINE_SPINLOCK(rtc_lock);
32EXPORT_SYMBOL(rtc_lock);
33
1da177e4
LT
34/*
35 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
36 * called 500 ms after the second nowtime has started, because when
37 * nowtime is written into the registers of the CMOS clock, it will
38 * jump to the next second precisely 500 ms later. Check the Motorola
39 * MC146818A or Dallas DS12887 data sheet for details.
1da177e4 40 */
fe599f9f 41int mach_set_rtc_mmss(unsigned long nowtime)
1da177e4 42{
3195ef59 43 struct rtc_time tm;
8383d821 44 int retval = 0;
1da177e4 45
3195ef59
PB
46 rtc_time_to_tm(nowtime, &tm);
47 if (!rtc_valid_tm(&tm)) {
48 retval = set_rtc_time(&tm);
49 if (retval)
50 printk(KERN_ERR "%s: RTC write failed with error %d\n",
51 __FUNCTION__, retval);
1da177e4 52 } else {
3195ef59
PB
53 printk(KERN_ERR
54 "%s: Invalid RTC value: write of %lx to RTC failed\n",
55 __FUNCTION__, nowtime);
56 retval = -EINVAL;
1da177e4 57 }
1da177e4
LT
58 return retval;
59}
60
fe599f9f 61unsigned long mach_get_cmos_time(void)
1da177e4 62{
068c9222 63 unsigned int status, year, mon, day, hour, min, sec, century = 0;
47997d75
MF
64 unsigned long flags;
65
66 spin_lock_irqsave(&rtc_lock, flags);
1122b134
TG
67
68 /*
69 * If UIP is clear, then we have >= 244 microseconds before
70 * RTC registers will be updated. Spec sheet says that this
71 * is the reliable way to read RTC - registers. If UIP is set
72 * then the register access might be invalid.
73 */
74 while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
75 cpu_relax();
76
77 sec = CMOS_READ(RTC_SECONDS);
78 min = CMOS_READ(RTC_MINUTES);
79 hour = CMOS_READ(RTC_HOURS);
80 day = CMOS_READ(RTC_DAY_OF_MONTH);
81 mon = CMOS_READ(RTC_MONTH);
82 year = CMOS_READ(RTC_YEAR);
83
45de7079 84#ifdef CONFIG_ACPI
1122b134
TG
85 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
86 acpi_gbl_FADT.century)
87 century = CMOS_READ(acpi_gbl_FADT.century);
88#endif
89
068c9222 90 status = CMOS_READ(RTC_CONTROL);
45de7079 91 WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
068c9222 92
47997d75
MF
93 spin_unlock_irqrestore(&rtc_lock, flags);
94
068c9222 95 if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
357c6e63
AB
96 sec = bcd2bin(sec);
97 min = bcd2bin(min);
98 hour = bcd2bin(hour);
99 day = bcd2bin(day);
100 mon = bcd2bin(mon);
101 year = bcd2bin(year);
41623b06
MM
102 }
103
1122b134 104 if (century) {
357c6e63 105 century = bcd2bin(century);
1122b134 106 year += century * 100;
b62576a2 107 } else
1122b134 108 year += CMOS_YEARS_OFFS;
1da177e4
LT
109
110 return mktime(year, mon, day, hour, min, sec);
111}
112
fe599f9f
TG
113/* Routines for accessing the CMOS RAM/RTC. */
114unsigned char rtc_cmos_read(unsigned char addr)
115{
116 unsigned char val;
117
118 lock_cmos_prefix(addr);
04aaa7ba
DR
119 outb(addr, RTC_PORT(0));
120 val = inb(RTC_PORT(1));
fe599f9f 121 lock_cmos_suffix(addr);
8383d821 122
fe599f9f
TG
123 return val;
124}
125EXPORT_SYMBOL(rtc_cmos_read);
126
127void rtc_cmos_write(unsigned char val, unsigned char addr)
128{
129 lock_cmos_prefix(addr);
04aaa7ba
DR
130 outb(addr, RTC_PORT(0));
131 outb(val, RTC_PORT(1));
fe599f9f
TG
132 lock_cmos_suffix(addr);
133}
134EXPORT_SYMBOL(rtc_cmos_write);
135
7bd867df 136int update_persistent_clock(struct timespec now)
fe599f9f 137{
47997d75 138 return x86_platform.set_wallclock(now.tv_sec);
fe599f9f
TG
139}
140
141/* not static: needed by APM */
d4f587c6 142void read_persistent_clock(struct timespec *ts)
fe599f9f 143{
47997d75 144 unsigned long retval;
fe599f9f 145
7bd867df 146 retval = x86_platform.get_wallclock();
fe599f9f 147
d4f587c6
MS
148 ts->tv_sec = retval;
149 ts->tv_nsec = 0;
fe599f9f
TG
150}
151
1da2e3d6
SS
152
153static struct resource rtc_resources[] = {
154 [0] = {
155 .start = RTC_PORT(0),
156 .end = RTC_PORT(1),
157 .flags = IORESOURCE_IO,
158 },
159 [1] = {
160 .start = RTC_IRQ,
161 .end = RTC_IRQ,
162 .flags = IORESOURCE_IRQ,
163 }
164};
165
166static struct platform_device rtc_device = {
167 .name = "rtc_cmos",
168 .id = -1,
169 .resource = rtc_resources,
170 .num_resources = ARRAY_SIZE(rtc_resources),
171};
172
173static __init int add_rtc_cmos(void)
174{
175#ifdef CONFIG_PNP
75fdd155 176 static const char * const const ids[] __initconst =
758a7f7b
BH
177 { "PNP0b00", "PNP0b01", "PNP0b02", };
178 struct pnp_dev *dev;
179 struct pnp_id *id;
180 int i;
181
182 pnp_for_each_dev(dev) {
183 for (id = dev->id; id; id = id->next) {
184 for (i = 0; i < ARRAY_SIZE(ids); i++) {
185 if (compare_pnp_id(id, ids[i]) != 0)
186 return 0;
187 }
188 }
189 }
190#endif
3bcbaf6e
SAS
191 if (of_have_populated_dt())
192 return 0;
758a7f7b 193
35d47699
MN
194 /* Intel MID platforms don't have ioport rtc */
195 if (mrst_identify_cpu())
196 return -ENODEV;
197
1da2e3d6 198 platform_device_register(&rtc_device);
758a7f7b
BH
199 dev_info(&rtc_device.dev,
200 "registered platform RTC device (no PNP device found)\n");
8383d821 201
1da2e3d6
SS
202 return 0;
203}
204device_initcall(add_rtc_cmos);