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Commit | Line | Data |
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1da177e4 | 1 | /* |
dd3e6e8c TG |
2 | * Copyright (c) 1991,1992,1995 Linus Torvalds |
3 | * Copyright (c) 1994 Alan Modra | |
4 | * Copyright (c) 1995 Markus Kuhn | |
5 | * Copyright (c) 1996 Ingo Molnar | |
6 | * Copyright (c) 1998 Andrea Arcangeli | |
7 | * Copyright (c) 2002,2006 Vojtech Pavlik | |
8 | * Copyright (c) 2003 Andi Kleen | |
1da177e4 | 9 | * |
1da177e4 LT |
10 | */ |
11 | ||
ecce8508 | 12 | #include <linux/clockchips.h> |
1da177e4 | 13 | #include <linux/interrupt.h> |
334955ef | 14 | #include <linux/i8253.h> |
1da177e4 | 15 | #include <linux/time.h> |
69c60c88 | 16 | #include <linux/export.h> |
1da177e4 LT |
17 | #include <linux/mca.h> |
18 | ||
dd3e6e8c TG |
19 | #include <asm/vsyscall.h> |
20 | #include <asm/x86_init.h> | |
ecce8508 | 21 | #include <asm/i8259.h> |
dd3e6e8c TG |
22 | #include <asm/timer.h> |
23 | #include <asm/hpet.h> | |
24 | #include <asm/time.h> | |
1da177e4 | 25 | |
454ede7e | 26 | #ifdef CONFIG_X86_64 |
8c49d9a7 | 27 | DEFINE_VVAR(volatile unsigned long, jiffies) = INITIAL_JIFFIES; |
454ede7e TG |
28 | #endif |
29 | ||
1da177e4 LT |
30 | unsigned long profile_pc(struct pt_regs *regs) |
31 | { | |
32 | unsigned long pc = instruction_pointer(regs); | |
33 | ||
2c44e668 | 34 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { |
0cb91a22 | 35 | #ifdef CONFIG_FRAME_POINTER |
2c460d0b | 36 | return *(unsigned long *)(regs->bp + sizeof(long)); |
0cb91a22 | 37 | #else |
d1705c55 PA |
38 | unsigned long *sp = |
39 | (unsigned long *)kernel_stack_pointer(regs); | |
ef451288 TG |
40 | /* |
41 | * Return address is either directly at stack pointer | |
42 | * or above a saved flags. Eflags has bits 22-31 zero, | |
43 | * kernel addresses don't. | |
44 | */ | |
fe599f9f | 45 | if (sp[0] >> 22) |
0cb91a22 AK |
46 | return sp[0]; |
47 | if (sp[1] >> 22) | |
48 | return sp[1]; | |
49 | #endif | |
50 | } | |
1da177e4 LT |
51 | return pc; |
52 | } | |
53 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
54 | |
55 | /* | |
454ede7e | 56 | * Default timer interrupt handler for PIT/HPET |
1da177e4 | 57 | */ |
845b3944 | 58 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 59 | { |
3c9aea47 | 60 | /* Keep nmi watchdog up to date */ |
8ae93669 | 61 | inc_irq_stat(irq0_irqs); |
3c9aea47 | 62 | |
ecce8508 | 63 | global_clock_event->event_handler(global_clock_event); |
1da177e4 | 64 | |
0be69394 TG |
65 | /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */ |
66 | if (MCA_bus) | |
67 | outb_p(inb_p(0x61)| 0x80, 0x61); | |
1da177e4 | 68 | |
1da177e4 LT |
69 | return IRQ_HANDLED; |
70 | } | |
71 | ||
845b3944 TG |
72 | static struct irqaction irq0 = { |
73 | .handler = timer_interrupt, | |
74 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | |
75 | .name = "timer" | |
76 | }; | |
77 | ||
78 | void __init setup_default_timer_irq(void) | |
79 | { | |
845b3944 TG |
80 | setup_irq(0, &irq0); |
81 | } | |
82 | ||
83 | /* Default timer init function */ | |
e30fab3a | 84 | void __init hpet_time_init(void) |
1da177e4 | 85 | { |
e9e2cdb4 TG |
86 | if (!hpet_enable()) |
87 | setup_pit_timer(); | |
845b3944 TG |
88 | setup_default_timer_irq(); |
89 | } | |
90 | ||
54e2603f | 91 | static __init void x86_late_time_init(void) |
845b3944 TG |
92 | { |
93 | x86_init.timers.timer_init(); | |
dd0a70c8 | 94 | tsc_init(); |
1da177e4 | 95 | } |
1da177e4 | 96 | |
e30fab3a | 97 | /* |
845b3944 TG |
98 | * Initialize TSC and delay the periodic timer init to |
99 | * late x86_late_time_init() so ioremap works. | |
e30fab3a | 100 | */ |
1da177e4 LT |
101 | void __init time_init(void) |
102 | { | |
845b3944 | 103 | late_time_init = x86_late_time_init; |
1da177e4 | 104 | } |