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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
dd3e6e8c TG |
3 | * Copyright (c) 1991,1992,1995 Linus Torvalds |
4 | * Copyright (c) 1994 Alan Modra | |
5 | * Copyright (c) 1995 Markus Kuhn | |
6 | * Copyright (c) 1996 Ingo Molnar | |
7 | * Copyright (c) 1998 Andrea Arcangeli | |
8 | * Copyright (c) 2002,2006 Vojtech Pavlik | |
9 | * Copyright (c) 2003 Andi Kleen | |
1da177e4 | 10 | * |
1da177e4 LT |
11 | */ |
12 | ||
2a21ad57 | 13 | #include <linux/clocksource.h> |
ecce8508 | 14 | #include <linux/clockchips.h> |
1da177e4 | 15 | #include <linux/interrupt.h> |
447ae316 | 16 | #include <linux/irq.h> |
334955ef | 17 | #include <linux/i8253.h> |
1da177e4 | 18 | #include <linux/time.h> |
69c60c88 | 19 | #include <linux/export.h> |
1da177e4 | 20 | |
dd3e6e8c TG |
21 | #include <asm/vsyscall.h> |
22 | #include <asm/x86_init.h> | |
ecce8508 | 23 | #include <asm/i8259.h> |
dd3e6e8c TG |
24 | #include <asm/timer.h> |
25 | #include <asm/hpet.h> | |
26 | #include <asm/time.h> | |
1da177e4 | 27 | |
1da177e4 LT |
28 | unsigned long profile_pc(struct pt_regs *regs) |
29 | { | |
30 | unsigned long pc = instruction_pointer(regs); | |
31 | ||
f39b6f0e | 32 | if (!user_mode(regs) && in_lock_functions(pc)) { |
0cb91a22 | 33 | #ifdef CONFIG_FRAME_POINTER |
2c460d0b | 34 | return *(unsigned long *)(regs->bp + sizeof(long)); |
0cb91a22 | 35 | #else |
3c88c692 | 36 | unsigned long *sp = (unsigned long *)regs->sp; |
ef451288 TG |
37 | /* |
38 | * Return address is either directly at stack pointer | |
39 | * or above a saved flags. Eflags has bits 22-31 zero, | |
40 | * kernel addresses don't. | |
41 | */ | |
fe599f9f | 42 | if (sp[0] >> 22) |
0cb91a22 AK |
43 | return sp[0]; |
44 | if (sp[1] >> 22) | |
45 | return sp[1]; | |
46 | #endif | |
47 | } | |
1da177e4 LT |
48 | return pc; |
49 | } | |
50 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
51 | |
52 | /* | |
454ede7e | 53 | * Default timer interrupt handler for PIT/HPET |
1da177e4 | 54 | */ |
845b3944 | 55 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 56 | { |
ecce8508 | 57 | global_clock_event->event_handler(global_clock_event); |
1da177e4 LT |
58 | return IRQ_HANDLED; |
59 | } | |
60 | ||
b1b4f2fe | 61 | static void __init setup_default_timer_irq(void) |
845b3944 | 62 | { |
4dd2a1b9 | 63 | unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER; |
64 | ||
6d671e1b | 65 | /* |
4dd2a1b9 | 66 | * Unconditionally register the legacy timer interrupt; even |
67 | * without legacy PIC/PIT we need this for the HPET0 in legacy | |
68 | * replacement mode. | |
6d671e1b | 69 | */ |
4dd2a1b9 | 70 | if (request_irq(0, timer_interrupt, flags, "timer", NULL)) |
6d671e1b | 71 | pr_info("Failed to register legacy timer interrupt\n"); |
845b3944 TG |
72 | } |
73 | ||
74 | /* Default timer init function */ | |
e30fab3a | 75 | void __init hpet_time_init(void) |
1da177e4 | 76 | { |
c8c40767 TG |
77 | if (!hpet_enable()) { |
78 | if (!pit_timer_init()) | |
79 | return; | |
80 | } | |
81 | ||
845b3944 TG |
82 | setup_default_timer_irq(); |
83 | } | |
84 | ||
54e2603f | 85 | static __init void x86_late_time_init(void) |
845b3944 | 86 | { |
97992387 TG |
87 | /* |
88 | * Before PIT/HPET init, select the interrupt mode. This is required | |
89 | * to make the decision whether PIT should be initialized correct. | |
90 | */ | |
91 | x86_init.irqs.intr_mode_select(); | |
92 | ||
93 | /* Setup the legacy timers */ | |
845b3944 | 94 | x86_init.timers.timer_init(); |
97992387 | 95 | |
935356ce | 96 | /* |
97992387 TG |
97 | * After PIT/HPET timers init, set up the final interrupt mode for |
98 | * delivering IRQs. | |
935356ce DL |
99 | */ |
100 | x86_init.irqs.intr_mode_init(); | |
dd0a70c8 | 101 | tsc_init(); |
cec5f268 KMP |
102 | |
103 | if (static_cpu_has(X86_FEATURE_WAITPKG)) | |
104 | use_tpause_delay(); | |
1da177e4 | 105 | } |
1da177e4 | 106 | |
e30fab3a | 107 | /* |
845b3944 TG |
108 | * Initialize TSC and delay the periodic timer init to |
109 | * late x86_late_time_init() so ioremap works. | |
e30fab3a | 110 | */ |
1da177e4 LT |
111 | void __init time_init(void) |
112 | { | |
845b3944 | 113 | late_time_init = x86_late_time_init; |
1da177e4 | 114 | } |
2a21ad57 TG |
115 | |
116 | /* | |
117 | * Sanity check the vdso related archdata content. | |
118 | */ | |
119 | void clocksource_arch_init(struct clocksource *cs) | |
120 | { | |
b95a8a27 | 121 | if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE) |
2a21ad57 TG |
122 | return; |
123 | ||
a51e996d | 124 | if (cs->mask != CLOCKSOURCE_MASK(64)) { |
b95a8a27 | 125 | pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n", |
a51e996d | 126 | cs->name, cs->mask); |
b95a8a27 | 127 | cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; |
a51e996d | 128 | } |
2a21ad57 | 129 | } |