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x86: apic namespace cleanup
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1da177e4 1/*
dd3e6e8c
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2 * Copyright (c) 1991,1992,1995 Linus Torvalds
3 * Copyright (c) 1994 Alan Modra
4 * Copyright (c) 1995 Markus Kuhn
5 * Copyright (c) 1996 Ingo Molnar
6 * Copyright (c) 1998 Andrea Arcangeli
7 * Copyright (c) 2002,2006 Vojtech Pavlik
8 * Copyright (c) 2003 Andi Kleen
1da177e4 9 *
1da177e4
LT
10 */
11
ecce8508 12#include <linux/clockchips.h>
1da177e4
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13#include <linux/interrupt.h>
14#include <linux/time.h>
1da177e4
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15#include <linux/mca.h>
16
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17#include <asm/vsyscall.h>
18#include <asm/x86_init.h>
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19#include <asm/i8259.h>
20#include <asm/i8253.h>
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21#include <asm/timer.h>
22#include <asm/hpet.h>
23#include <asm/time.h>
1da177e4 24
64fcbac1 25#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
1da177e4 26int timer_ack;
64fcbac1 27#endif
1da177e4 28
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29#ifdef CONFIG_X86_64
30volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
31#endif
32
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33unsigned long profile_pc(struct pt_regs *regs)
34{
35 unsigned long pc = instruction_pointer(regs);
36
2c44e668 37 if (!user_mode_vm(regs) && in_lock_functions(pc)) {
0cb91a22 38#ifdef CONFIG_FRAME_POINTER
2c460d0b 39 return *(unsigned long *)(regs->bp + sizeof(long));
0cb91a22 40#else
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41 unsigned long *sp = (unsigned long *)regs->sp;
42 /*
43 * Return address is either directly at stack pointer
44 * or above a saved flags. Eflags has bits 22-31 zero,
45 * kernel addresses don't.
46 */
fe599f9f 47 if (sp[0] >> 22)
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48 return sp[0];
49 if (sp[1] >> 22)
50 return sp[1];
51#endif
52 }
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53 return pc;
54}
55EXPORT_SYMBOL(profile_pc);
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56
57/*
454ede7e 58 * Default timer interrupt handler for PIT/HPET
1da177e4 59 */
845b3944 60static irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4 61{
3c9aea47 62 /* Keep nmi watchdog up to date */
8ae93669 63 inc_irq_stat(irq0_irqs);
3c9aea47 64
64fcbac1 65 /* Optimized out for !IO_APIC and x86_64 */
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66 if (timer_ack) {
67 /*
68 * Subtle, when I/O APICs are used we have to ack timer IRQ
d11d5794 69 * manually to deassert NMI lines for the watchdog if run
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70 * on an 82489DX-based system.
71 */
72 spin_lock(&i8259A_lock);
73 outb(0x0c, PIC_MASTER_OCW3);
74 /* Ack the IRQ; AEOI will end it automatically. */
75 inb(PIC_MASTER_POLL);
76 spin_unlock(&i8259A_lock);
77 }
1da177e4 78
ecce8508 79 global_clock_event->event_handler(global_clock_event);
1da177e4 80
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TG
81 /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */
82 if (MCA_bus)
83 outb_p(inb_p(0x61)| 0x80, 0x61);
1da177e4 84
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85 return IRQ_HANDLED;
86}
87
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88static struct irqaction irq0 = {
89 .handler = timer_interrupt,
90 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
91 .name = "timer"
92};
93
94void __init setup_default_timer_irq(void)
95{
96 irq0.mask = cpumask_of_cpu(0);
97 setup_irq(0, &irq0);
98}
99
100/* Default timer init function */
e30fab3a 101void __init hpet_time_init(void)
1da177e4 102{
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103 if (!hpet_enable())
104 setup_pit_timer();
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105 setup_default_timer_irq();
106}
107
108static void x86_late_time_init(void)
109{
110 x86_init.timers.timer_init();
dd0a70c8 111 tsc_init();
1da177e4 112}
1da177e4 113
e30fab3a 114/*
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115 * Initialize TSC and delay the periodic timer init to
116 * late x86_late_time_init() so ioremap works.
e30fab3a 117 */
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118void __init time_init(void)
119{
845b3944 120 late_time_init = x86_late_time_init;
1da177e4 121}