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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
dd3e6e8c TG |
3 | * Copyright (c) 1991,1992,1995 Linus Torvalds |
4 | * Copyright (c) 1994 Alan Modra | |
5 | * Copyright (c) 1995 Markus Kuhn | |
6 | * Copyright (c) 1996 Ingo Molnar | |
7 | * Copyright (c) 1998 Andrea Arcangeli | |
8 | * Copyright (c) 2002,2006 Vojtech Pavlik | |
9 | * Copyright (c) 2003 Andi Kleen | |
1da177e4 | 10 | * |
1da177e4 LT |
11 | */ |
12 | ||
ecce8508 | 13 | #include <linux/clockchips.h> |
1da177e4 | 14 | #include <linux/interrupt.h> |
f901f138 | 15 | #include <linux/irq.h> |
334955ef | 16 | #include <linux/i8253.h> |
1da177e4 | 17 | #include <linux/time.h> |
69c60c88 | 18 | #include <linux/export.h> |
1da177e4 | 19 | |
dd3e6e8c TG |
20 | #include <asm/vsyscall.h> |
21 | #include <asm/x86_init.h> | |
ecce8508 | 22 | #include <asm/i8259.h> |
dd3e6e8c TG |
23 | #include <asm/timer.h> |
24 | #include <asm/hpet.h> | |
25 | #include <asm/time.h> | |
1da177e4 | 26 | |
454ede7e | 27 | #ifdef CONFIG_X86_64 |
61a492fb | 28 | __visible volatile unsigned long jiffies __cacheline_aligned = INITIAL_JIFFIES; |
454ede7e TG |
29 | #endif |
30 | ||
1da177e4 LT |
31 | unsigned long profile_pc(struct pt_regs *regs) |
32 | { | |
33 | unsigned long pc = instruction_pointer(regs); | |
34 | ||
f39b6f0e | 35 | if (!user_mode(regs) && in_lock_functions(pc)) { |
0cb91a22 | 36 | #ifdef CONFIG_FRAME_POINTER |
2c460d0b | 37 | return *(unsigned long *)(regs->bp + sizeof(long)); |
0cb91a22 | 38 | #else |
d1705c55 PA |
39 | unsigned long *sp = |
40 | (unsigned long *)kernel_stack_pointer(regs); | |
ef451288 TG |
41 | /* |
42 | * Return address is either directly at stack pointer | |
43 | * or above a saved flags. Eflags has bits 22-31 zero, | |
44 | * kernel addresses don't. | |
45 | */ | |
fe599f9f | 46 | if (sp[0] >> 22) |
0cb91a22 AK |
47 | return sp[0]; |
48 | if (sp[1] >> 22) | |
49 | return sp[1]; | |
50 | #endif | |
51 | } | |
1da177e4 LT |
52 | return pc; |
53 | } | |
54 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
55 | |
56 | /* | |
454ede7e | 57 | * Default timer interrupt handler for PIT/HPET |
1da177e4 | 58 | */ |
845b3944 | 59 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 60 | { |
ecce8508 | 61 | global_clock_event->event_handler(global_clock_event); |
1da177e4 LT |
62 | return IRQ_HANDLED; |
63 | } | |
64 | ||
845b3944 TG |
65 | static struct irqaction irq0 = { |
66 | .handler = timer_interrupt, | |
d20d2efb | 67 | .flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
845b3944 TG |
68 | .name = "timer" |
69 | }; | |
70 | ||
b1b4f2fe | 71 | static void __init setup_default_timer_irq(void) |
845b3944 | 72 | { |
a90b858c AS |
73 | if (!nr_legacy_irqs()) |
74 | return; | |
845b3944 TG |
75 | setup_irq(0, &irq0); |
76 | } | |
77 | ||
78 | /* Default timer init function */ | |
e30fab3a | 79 | void __init hpet_time_init(void) |
1da177e4 | 80 | { |
e9e2cdb4 TG |
81 | if (!hpet_enable()) |
82 | setup_pit_timer(); | |
845b3944 TG |
83 | setup_default_timer_irq(); |
84 | } | |
85 | ||
54e2603f | 86 | static __init void x86_late_time_init(void) |
845b3944 TG |
87 | { |
88 | x86_init.timers.timer_init(); | |
935356ce DL |
89 | /* |
90 | * After PIT/HPET timers init, select and setup | |
91 | * the final interrupt mode for delivering IRQs. | |
92 | */ | |
93 | x86_init.irqs.intr_mode_init(); | |
dd0a70c8 | 94 | tsc_init(); |
1da177e4 | 95 | } |
1da177e4 | 96 | |
e30fab3a | 97 | /* |
845b3944 TG |
98 | * Initialize TSC and delay the periodic timer init to |
99 | * late x86_late_time_init() so ioremap works. | |
e30fab3a | 100 | */ |
1da177e4 LT |
101 | void __init time_init(void) |
102 | { | |
845b3944 | 103 | late_time_init = x86_late_time_init; |
1da177e4 | 104 | } |