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x86: Move calibrate_cpu to tsc.c
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1da177e4 1/*
dd3e6e8c
TG
2 * Copyright (c) 1991,1992,1995 Linus Torvalds
3 * Copyright (c) 1994 Alan Modra
4 * Copyright (c) 1995 Markus Kuhn
5 * Copyright (c) 1996 Ingo Molnar
6 * Copyright (c) 1998 Andrea Arcangeli
7 * Copyright (c) 2002,2006 Vojtech Pavlik
8 * Copyright (c) 2003 Andi Kleen
1da177e4 9 *
1da177e4
LT
10 */
11
ecce8508 12#include <linux/clockchips.h>
1da177e4
LT
13#include <linux/interrupt.h>
14#include <linux/time.h>
1da177e4
LT
15#include <linux/mca.h>
16
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TG
17#include <asm/vsyscall.h>
18#include <asm/x86_init.h>
ecce8508
TG
19#include <asm/i8259.h>
20#include <asm/i8253.h>
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21#include <asm/timer.h>
22#include <asm/hpet.h>
23#include <asm/time.h>
1da177e4 24
64fcbac1 25#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
1da177e4 26int timer_ack;
64fcbac1 27#endif
1da177e4 28
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29#ifdef CONFIG_X86_64
30volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
31#endif
32
1da177e4
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33unsigned long profile_pc(struct pt_regs *regs)
34{
35 unsigned long pc = instruction_pointer(regs);
36
0cb91a22 37#ifdef CONFIG_SMP
2c44e668 38 if (!user_mode_vm(regs) && in_lock_functions(pc)) {
0cb91a22 39#ifdef CONFIG_FRAME_POINTER
2c460d0b 40 return *(unsigned long *)(regs->bp + sizeof(long));
0cb91a22 41#else
65ea5b03 42 unsigned long *sp = (unsigned long *)&regs->sp;
7b355202 43
0cb91a22 44 /* Return address is either directly at stack pointer
65ea5b03 45 or above a saved flags. Eflags has bits 22-31 zero,
0cb91a22 46 kernel addresses don't. */
fe599f9f 47 if (sp[0] >> 22)
0cb91a22
AK
48 return sp[0];
49 if (sp[1] >> 22)
50 return sp[1];
51#endif
52 }
53#endif
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54 return pc;
55}
56EXPORT_SYMBOL(profile_pc);
1da177e4
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57
58/*
454ede7e 59 * Default timer interrupt handler for PIT/HPET
1da177e4 60 */
845b3944 61static irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4 62{
3c9aea47 63 /* Keep nmi watchdog up to date */
8ae93669 64 inc_irq_stat(irq0_irqs);
3c9aea47 65
64fcbac1 66 /* Optimized out for !IO_APIC and x86_64 */
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67 if (timer_ack) {
68 /*
69 * Subtle, when I/O APICs are used we have to ack timer IRQ
d11d5794 70 * manually to deassert NMI lines for the watchdog if run
1da177e4
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71 * on an 82489DX-based system.
72 */
73 spin_lock(&i8259A_lock);
74 outb(0x0c, PIC_MASTER_OCW3);
75 /* Ack the IRQ; AEOI will end it automatically. */
76 inb(PIC_MASTER_POLL);
77 spin_unlock(&i8259A_lock);
78 }
1da177e4 79
ecce8508 80 global_clock_event->event_handler(global_clock_event);
1da177e4 81
0be69394
TG
82 /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */
83 if (MCA_bus)
84 outb_p(inb_p(0x61)| 0x80, 0x61);
1da177e4 85
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86 return IRQ_HANDLED;
87}
88
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TG
89static struct irqaction irq0 = {
90 .handler = timer_interrupt,
91 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
92 .name = "timer"
93};
94
95void __init setup_default_timer_irq(void)
96{
97 irq0.mask = cpumask_of_cpu(0);
98 setup_irq(0, &irq0);
99}
100
101/* Default timer init function */
e30fab3a 102void __init hpet_time_init(void)
1da177e4 103{
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104 if (!hpet_enable())
105 setup_pit_timer();
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106 setup_default_timer_irq();
107}
108
109static void x86_late_time_init(void)
110{
111 x86_init.timers.timer_init();
1da177e4 112}
1da177e4 113
e30fab3a 114/*
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115 * Initialize TSC and delay the periodic timer init to
116 * late x86_late_time_init() so ioremap works.
e30fab3a 117 */
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118void __init time_init(void)
119{
6bb74df4 120 tsc_init();
845b3944 121 late_time_init = x86_late_time_init;
1da177e4 122}