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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
56dd9470 15#include <linux/context_tracking.h>
b5964405
IM
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
b5964405
IM
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
b5964405 21#include <linux/kdebug.h>
f503b5ae 22#include <linux/kgdb.h>
1da177e4 23#include <linux/kernel.h>
b5964405
IM
24#include <linux/module.h>
25#include <linux/ptrace.h>
1da177e4 26#include <linux/string.h>
b5964405 27#include <linux/delay.h>
1da177e4 28#include <linux/errno.h>
b5964405
IM
29#include <linux/kexec.h>
30#include <linux/sched.h>
1da177e4 31#include <linux/timer.h>
1da177e4 32#include <linux/init.h>
91768d6c 33#include <linux/bug.h>
b5964405
IM
34#include <linux/nmi.h>
35#include <linux/mm.h>
c1d518c8
AH
36#include <linux/smp.h>
37#include <linux/io.h>
1da177e4
LT
38
39#ifdef CONFIG_EISA
40#include <linux/ioport.h>
41#include <linux/eisa.h>
42#endif
43
c0d12172
DJ
44#if defined(CONFIG_EDAC)
45#include <linux/edac.h>
46#endif
47
f8561296 48#include <asm/kmemcheck.h>
b5964405 49#include <asm/stacktrace.h>
1da177e4 50#include <asm/processor.h>
1da177e4 51#include <asm/debugreg.h>
60063497 52#include <linux/atomic.h>
08d636b6 53#include <asm/ftrace.h>
c1d518c8 54#include <asm/traps.h>
1da177e4
LT
55#include <asm/desc.h>
56#include <asm/i387.h>
1361b83a 57#include <asm/fpu-internal.h>
9e55e44e 58#include <asm/mce.h>
4eefbe79 59#include <asm/fixmap.h>
1164dd00 60#include <asm/mach_traps.h>
c1d518c8 61
081f75bb 62#ifdef CONFIG_X86_64
428cf902 63#include <asm/x86_init.h>
081f75bb
AH
64#include <asm/pgalloc.h>
65#include <asm/proto.h>
081f75bb 66#else
c1d518c8 67#include <asm/processor-flags.h>
8e6dafd6 68#include <asm/setup.h>
1da177e4 69
1da177e4
LT
70asmlinkage int system_call(void);
71
1da177e4
LT
72/*
73 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 74 * F0 0F bug workaround.
1da177e4 75 */
07e81d61 76gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 77#endif
1da177e4 78
b77b881f
YL
79DECLARE_BITMAP(used_vectors, NR_VECTORS);
80EXPORT_SYMBOL_GPL(used_vectors);
81
762db434
AH
82static inline void conditional_sti(struct pt_regs *regs)
83{
84 if (regs->flags & X86_EFLAGS_IF)
85 local_irq_enable();
86}
87
3d2a71a5
AH
88static inline void preempt_conditional_sti(struct pt_regs *regs)
89{
90 inc_preempt_count();
91 if (regs->flags & X86_EFLAGS_IF)
92 local_irq_enable();
93}
94
be716615
TG
95static inline void conditional_cli(struct pt_regs *regs)
96{
97 if (regs->flags & X86_EFLAGS_IF)
98 local_irq_disable();
99}
100
3d2a71a5
AH
101static inline void preempt_conditional_cli(struct pt_regs *regs)
102{
103 if (regs->flags & X86_EFLAGS_IF)
104 local_irq_disable();
105 dec_preempt_count();
106}
107
c416ddf5
FW
108static int __kprobes
109do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
110 struct pt_regs *regs, long error_code)
1da177e4 111{
081f75bb 112#ifdef CONFIG_X86_32
6b6891f9 113 if (regs->flags & X86_VM_MASK) {
3c1326f8 114 /*
c416ddf5 115 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
116 * On nmi (interrupt 2), do_trap should not be called.
117 */
c416ddf5
FW
118 if (trapnr < X86_TRAP_UD) {
119 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
120 error_code, trapnr))
121 return 0;
122 }
123 return -1;
1da177e4 124 }
081f75bb 125#endif
c416ddf5
FW
126 if (!user_mode(regs)) {
127 if (!fixup_exception(regs)) {
128 tsk->thread.error_code = error_code;
129 tsk->thread.trap_nr = trapnr;
130 die(str, regs, error_code);
131 }
132 return 0;
133 }
1da177e4 134
c416ddf5
FW
135 return -1;
136}
1da177e4 137
c416ddf5
FW
138static void __kprobes
139do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
140 long error_code, siginfo_t *info)
141{
142 struct task_struct *tsk = current;
143
144
145 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
146 return;
b5964405 147 /*
51e7dc70 148 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
149 * kernelspace faults which result in die(), but not
150 * kernelspace faults which are fixed up. die() gives the
151 * process no chance to handle the signal and notice the
152 * kernel fault information, so that won't result in polluting
153 * the information about previously queued, but not yet
154 * delivered, faults. See also do_general_protection below.
155 */
156 tsk->thread.error_code = error_code;
51e7dc70 157 tsk->thread.trap_nr = trapnr;
d1895183 158
081f75bb
AH
159#ifdef CONFIG_X86_64
160 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
161 printk_ratelimit()) {
c767a54b
JP
162 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
163 tsk->comm, tsk->pid, str,
164 regs->ip, regs->sp, error_code);
081f75bb 165 print_vma_addr(" in ", regs->ip);
c767a54b 166 pr_cont("\n");
081f75bb
AH
167 }
168#endif
169
b5964405
IM
170 if (info)
171 force_sig_info(signr, info, tsk);
172 else
173 force_sig(signr, tsk);
1da177e4
LT
174}
175
b5964405 176#define DO_ERROR(trapnr, signr, str, name) \
e407d620 177dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 178{ \
6c1e0256
FW
179 enum ctx_state prev_state; \
180 \
181 prev_state = exception_enter(); \
6ba3c97a
FW
182 if (notify_die(DIE_TRAP, str, regs, error_code, \
183 trapnr, signr) == NOTIFY_STOP) { \
6c1e0256 184 exception_exit(prev_state); \
b5964405 185 return; \
6ba3c97a 186 } \
61aef7d2 187 conditional_sti(regs); \
3c1326f8 188 do_trap(trapnr, signr, str, regs, error_code, NULL); \
6c1e0256 189 exception_exit(prev_state); \
1da177e4
LT
190}
191
3c1326f8 192#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 193dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
194{ \
195 siginfo_t info; \
6c1e0256
FW
196 enum ctx_state prev_state; \
197 \
b5964405
IM
198 info.si_signo = signr; \
199 info.si_errno = 0; \
200 info.si_code = sicode; \
201 info.si_addr = (void __user *)siaddr; \
6c1e0256 202 prev_state = exception_enter(); \
6ba3c97a
FW
203 if (notify_die(DIE_TRAP, str, regs, error_code, \
204 trapnr, signr) == NOTIFY_STOP) { \
6c1e0256 205 exception_exit(prev_state); \
b5964405 206 return; \
6ba3c97a 207 } \
61aef7d2 208 conditional_sti(regs); \
3c1326f8 209 do_trap(trapnr, signr, str, regs, error_code, &info); \
6c1e0256 210 exception_exit(prev_state); \
1da177e4
LT
211}
212
c9408265
KC
213DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV,
214 regs->ip)
215DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
216DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds)
217DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN,
218 regs->ip)
219DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",
220 coprocessor_segment_overrun)
221DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
222DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
081f75bb 223#ifdef CONFIG_X86_32
c9408265 224DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
081f75bb 225#endif
c9408265
KC
226DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check,
227 BUS_ADRALN, 0)
1da177e4 228
081f75bb
AH
229#ifdef CONFIG_X86_64
230/* Runs on IST stack */
231dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
232{
6c1e0256
FW
233 enum ctx_state prev_state;
234
235 prev_state = exception_enter();
081f75bb 236 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
6ba3c97a
FW
237 X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) {
238 preempt_conditional_sti(regs);
239 do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL);
240 preempt_conditional_cli(regs);
241 }
6c1e0256 242 exception_exit(prev_state);
081f75bb
AH
243}
244
245dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
246{
247 static const char str[] = "double fault";
248 struct task_struct *tsk = current;
249
6c1e0256 250 exception_enter();
081f75bb 251 /* Return not checked because double check cannot be ignored */
c9408265 252 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
253
254 tsk->thread.error_code = error_code;
51e7dc70 255 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 256
bd8b96df
IM
257 /*
258 * This is always a kernel trap and never fixable (and thus must
259 * never return).
260 */
081f75bb
AH
261 for (;;)
262 die(str, regs, error_code);
263}
264#endif
265
e407d620 266dotraplinkage void __kprobes
13485ab5 267do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 268{
13485ab5 269 struct task_struct *tsk;
6c1e0256 270 enum ctx_state prev_state;
b5964405 271
6c1e0256 272 prev_state = exception_enter();
c6df0d71
AH
273 conditional_sti(regs);
274
081f75bb 275#ifdef CONFIG_X86_32
ef3f6288
FW
276 if (regs->flags & X86_VM_MASK) {
277 local_irq_enable();
278 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
6ba3c97a 279 goto exit;
ef3f6288 280 }
081f75bb 281#endif
1da177e4 282
13485ab5 283 tsk = current;
ef3f6288
FW
284 if (!user_mode(regs)) {
285 if (fixup_exception(regs))
6ba3c97a 286 goto exit;
ef3f6288
FW
287
288 tsk->thread.error_code = error_code;
289 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
290 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
291 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 292 die("general protection fault", regs, error_code);
6ba3c97a 293 goto exit;
ef3f6288 294 }
1da177e4 295
13485ab5 296 tsk->thread.error_code = error_code;
51e7dc70 297 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 298
13485ab5
AH
299 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
300 printk_ratelimit()) {
c767a54b 301 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
302 tsk->comm, task_pid_nr(tsk),
303 regs->ip, regs->sp, error_code);
03252919 304 print_vma_addr(" in ", regs->ip);
c767a54b 305 pr_cont("\n");
03252919 306 }
abd4f750 307
13485ab5 308 force_sig(SIGSEGV, tsk);
6ba3c97a 309exit:
6c1e0256 310 exception_exit(prev_state);
1da177e4
LT
311}
312
c1d518c8 313/* May run on IST stack. */
08d636b6 314dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 315{
6c1e0256
FW
316 enum ctx_state prev_state;
317
08d636b6 318#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
319 /*
320 * ftrace must be first, everything else may cause a recursive crash.
321 * See note by declaration of modifying_ftrace_code in ftrace.c
322 */
323 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
324 ftrace_int3_handler(regs))
08d636b6
SR
325 return;
326#endif
6c1e0256 327 prev_state = exception_enter();
f503b5ae 328#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
329 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
330 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 331 goto exit;
f503b5ae 332#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 333
c9408265
KC
334 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
335 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 336 goto exit;
b5964405 337
42181186
SR
338 /*
339 * Let others (NMI) know that the debug stack is in use
340 * as we may switch to the interrupt stack.
341 */
342 debug_stack_usage_inc();
4915a35e 343 preempt_conditional_sti(regs);
c9408265 344 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 345 preempt_conditional_cli(regs);
42181186 346 debug_stack_usage_dec();
6ba3c97a 347exit:
6c1e0256 348 exception_exit(prev_state);
1da177e4 349}
1da177e4 350
081f75bb 351#ifdef CONFIG_X86_64
bd8b96df
IM
352/*
353 * Help handler running on IST stack to switch back to user stack
354 * for scheduling or signal handling. The actual stack switch is done in
355 * entry.S
356 */
081f75bb
AH
357asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
358{
359 struct pt_regs *regs = eregs;
360 /* Did already sync */
361 if (eregs == (struct pt_regs *)eregs->sp)
362 ;
363 /* Exception from user space */
364 else if (user_mode(eregs))
365 regs = task_pt_regs(current);
bd8b96df
IM
366 /*
367 * Exception from kernel and interrupts are enabled. Move to
368 * kernel process stack.
369 */
081f75bb
AH
370 else if (eregs->flags & X86_EFLAGS_IF)
371 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
372 if (eregs != regs)
373 *regs = *eregs;
374 return regs;
375}
376#endif
377
1da177e4
LT
378/*
379 * Our handling of the processor debug registers is non-trivial.
380 * We do not clear them on entry and exit from the kernel. Therefore
381 * it is possible to get a watchpoint trap here from inside the kernel.
382 * However, the code in ./ptrace.c has ensured that the user can
383 * only set watchpoints on userspace addresses. Therefore the in-kernel
384 * watchpoint trap can only occur in code which is reading/writing
385 * from user space. Such code must not hold kernel locks (since it
386 * can equally take a page fault), therefore it is safe to call
387 * force_sig_info even though that claims and releases locks.
b5964405 388 *
1da177e4
LT
389 * Code in ./signal.c ensures that the debug control register
390 * is restored before we deliver any signal, and therefore that
391 * user code runs with the correct debug control register even though
392 * we clear it here.
393 *
394 * Being careful here means that we don't have to be as careful in a
395 * lot of more complicated places (task switching can be a bit lazy
396 * about restoring all the debug state, and ptrace doesn't have to
397 * find every occurrence of the TF bit that could be saved away even
398 * by user code)
c1d518c8
AH
399 *
400 * May run on IST stack.
1da177e4 401 */
e407d620 402dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 403{
1da177e4 404 struct task_struct *tsk = current;
6c1e0256 405 enum ctx_state prev_state;
a1e80faf 406 int user_icebp = 0;
08d68323 407 unsigned long dr6;
da654b74 408 int si_code;
1da177e4 409
6c1e0256 410 prev_state = exception_enter();
6ba3c97a 411
08d68323 412 get_debugreg(dr6, 6);
1da177e4 413
40f9249a
P
414 /* Filter out all the reserved bits which are preset to 1 */
415 dr6 &= ~DR6_RESERVED;
416
a1e80faf
FW
417 /*
418 * If dr6 has no reason to give us about the origin of this trap,
419 * then it's very likely the result of an icebp/int01 trap.
420 * User wants a sigtrap for that.
421 */
422 if (!dr6 && user_mode(regs))
423 user_icebp = 1;
424
f8561296 425 /* Catch kmemcheck conditions first of all! */
eadb8a09 426 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 427 goto exit;
f8561296 428
08d68323
P
429 /* DR6 may or may not be cleared by the CPU */
430 set_debugreg(0, 6);
10faa81e 431
ea8e61b7
PZ
432 /*
433 * The processor cleared BTF, so don't mark that we need it set.
434 */
435 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
436
08d68323
P
437 /* Store the virtualized DR6 value */
438 tsk->thread.debugreg6 = dr6;
439
62edab90
P
440 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
441 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 442 goto exit;
3d2a71a5 443
42181186
SR
444 /*
445 * Let others (NMI) know that the debug stack is in use
446 * as we may switch to the interrupt stack.
447 */
448 debug_stack_usage_inc();
449
1da177e4 450 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 451 preempt_conditional_sti(regs);
1da177e4 452
08d68323 453 if (regs->flags & X86_VM_MASK) {
c9408265
KC
454 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
455 X86_TRAP_DB);
6554287b 456 preempt_conditional_cli(regs);
42181186 457 debug_stack_usage_dec();
6ba3c97a 458 goto exit;
1da177e4
LT
459 }
460
1da177e4 461 /*
08d68323
P
462 * Single-stepping through system calls: ignore any exceptions in
463 * kernel space, but re-enable TF when returning to user mode.
464 *
465 * We already checked v86 mode above, so we can check for kernel mode
466 * by just checking the CPL of CS.
1da177e4 467 */
08d68323
P
468 if ((dr6 & DR_STEP) && !user_mode(regs)) {
469 tsk->thread.debugreg6 &= ~DR_STEP;
470 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
471 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 472 }
08d68323 473 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 474 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 475 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 476 preempt_conditional_cli(regs);
42181186 477 debug_stack_usage_dec();
1da177e4 478
6ba3c97a 479exit:
6c1e0256 480 exception_exit(prev_state);
1da177e4
LT
481}
482
483/*
484 * Note that we play around with the 'TS' bit in an attempt to get
485 * the correct behaviour even in the presence of the asynchronous
486 * IRQ13 behaviour
487 */
9b6dba9e 488void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 489{
e2e75c91 490 struct task_struct *task = current;
1da177e4 491 siginfo_t info;
9b6dba9e 492 unsigned short err;
c9408265
KC
493 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
494 "simd exception";
e2e75c91
BG
495
496 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
497 return;
498 conditional_sti(regs);
499
500 if (!user_mode_vm(regs))
501 {
502 if (!fixup_exception(regs)) {
503 task->thread.error_code = error_code;
51e7dc70 504 task->thread.trap_nr = trapnr;
e2e75c91
BG
505 die(str, regs, error_code);
506 }
507 return;
508 }
1da177e4
LT
509
510 /*
511 * Save the info for the exception handler and clear the error.
512 */
1da177e4 513 save_init_fpu(task);
51e7dc70 514 task->thread.trap_nr = trapnr;
9b6dba9e 515 task->thread.error_code = error_code;
1da177e4
LT
516 info.si_signo = SIGFPE;
517 info.si_errno = 0;
9b6dba9e 518 info.si_addr = (void __user *)regs->ip;
c9408265 519 if (trapnr == X86_TRAP_MF) {
9b6dba9e
BG
520 unsigned short cwd, swd;
521 /*
522 * (~cwd & swd) will mask out exceptions that are not set to unmasked
523 * status. 0x3f is the exception bits in these regs, 0x200 is the
524 * C1 reg you need in case of a stack fault, 0x040 is the stack
525 * fault bit. We should only be taking one exception at a time,
526 * so if this combination doesn't produce any single exception,
527 * then we have a bad program that isn't synchronizing its FPU usage
528 * and it will suffer the consequences since we won't be able to
529 * fully reproduce the context of the exception
530 */
531 cwd = get_fpu_cwd(task);
532 swd = get_fpu_swd(task);
adf77bac 533
9b6dba9e
BG
534 err = swd & ~cwd;
535 } else {
536 /*
537 * The SIMD FPU exceptions are handled a little differently, as there
538 * is only a single status/control register. Thus, to determine which
539 * unmasked exception was caught we must mask the exception mask bits
540 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
541 */
542 unsigned short mxcsr = get_fpu_mxcsr(task);
543 err = ~(mxcsr >> 7) & mxcsr;
544 }
adf77bac
PA
545
546 if (err & 0x001) { /* Invalid op */
b5964405
IM
547 /*
548 * swd & 0x240 == 0x040: Stack Underflow
549 * swd & 0x240 == 0x240: Stack Overflow
550 * User must clear the SF bit (0x40) if set
551 */
552 info.si_code = FPE_FLTINV;
adf77bac 553 } else if (err & 0x004) { /* Divide by Zero */
b5964405 554 info.si_code = FPE_FLTDIV;
adf77bac 555 } else if (err & 0x008) { /* Overflow */
b5964405 556 info.si_code = FPE_FLTOVF;
adf77bac
PA
557 } else if (err & 0x012) { /* Denormal, Underflow */
558 info.si_code = FPE_FLTUND;
559 } else if (err & 0x020) { /* Precision */
b5964405 560 info.si_code = FPE_FLTRES;
adf77bac 561 } else {
bd8b96df 562 /*
c9408265
KC
563 * If we're using IRQ 13, or supposedly even some trap
564 * X86_TRAP_MF implementations, it's possible
565 * we get a spurious trap, which is not an error.
bd8b96df 566 */
c9408265 567 return;
1da177e4
LT
568 }
569 force_sig_info(SIGFPE, &info, task);
570}
571
e407d620 572dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 573{
6c1e0256
FW
574 enum ctx_state prev_state;
575
576 prev_state = exception_enter();
c9408265 577 math_error(regs, error_code, X86_TRAP_MF);
6c1e0256 578 exception_exit(prev_state);
1da177e4
LT
579}
580
e407d620
AH
581dotraplinkage void
582do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 583{
6c1e0256
FW
584 enum ctx_state prev_state;
585
586 prev_state = exception_enter();
c9408265 587 math_error(regs, error_code, X86_TRAP_XF);
6c1e0256 588 exception_exit(prev_state);
1da177e4
LT
589}
590
e407d620
AH
591dotraplinkage void
592do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 593{
cf81978d 594 conditional_sti(regs);
1da177e4
LT
595#if 0
596 /* No need to warn about this any longer. */
c767a54b 597 pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
598#endif
599}
600
081f75bb 601asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 602{
1da177e4 603}
4efc0670 604
7856f6cc 605asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
606{
607}
608
1da177e4 609/*
b5964405 610 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
611 * old math state array, and gets the new ones from the current task
612 *
613 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
614 * Don't touch unless you *really* know how it works.
615 *
be98c2cd
LT
616 * Must be called with kernel preemption disabled (eg with local
617 * local interrupts as in the case of do_device_not_available).
1da177e4 618 */
be98c2cd 619void math_state_restore(void)
1da177e4 620{
f94edacf 621 struct task_struct *tsk = current;
1da177e4 622
aa283f49
SS
623 if (!tsk_used_math(tsk)) {
624 local_irq_enable();
625 /*
626 * does a slab alloc which can sleep
627 */
628 if (init_fpu(tsk)) {
629 /*
630 * ran out of memory!
631 */
632 do_group_exit(SIGKILL);
633 return;
634 }
635 local_irq_disable();
636 }
637
f94edacf 638 __thread_fpu_begin(tsk);
304bceda 639
80ab6f1e
LT
640 /*
641 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
642 */
643 if (unlikely(restore_fpu_checking(tsk))) {
304bceda 644 drop_init_fpu(tsk);
80ab6f1e
LT
645 force_sig(SIGSEGV, tsk);
646 return;
647 }
b3b0870e
LT
648
649 tsk->fpu_counter++;
1da177e4 650}
5992b6da 651EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 652
e407d620 653dotraplinkage void __kprobes
aa78bcfa 654do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 655{
6c1e0256
FW
656 enum ctx_state prev_state;
657
658 prev_state = exception_enter();
5d2bd700 659 BUG_ON(use_eager_fpu());
304bceda 660
a334fe43 661#ifdef CONFIG_MATH_EMULATION
7643e9b9 662 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
663 struct math_emu_info info = { };
664
7643e9b9 665 conditional_sti(regs);
d315760f 666
aa78bcfa 667 info.regs = regs;
d315760f 668 math_emulate(&info);
6c1e0256 669 exception_exit(prev_state);
a334fe43 670 return;
7643e9b9 671 }
a334fe43
BG
672#endif
673 math_state_restore(); /* interrupts still off */
674#ifdef CONFIG_X86_32
675 conditional_sti(regs);
081f75bb 676#endif
6c1e0256 677 exception_exit(prev_state);
7643e9b9
AH
678}
679
081f75bb 680#ifdef CONFIG_X86_32
e407d620 681dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
682{
683 siginfo_t info;
6c1e0256 684 enum ctx_state prev_state;
6ba3c97a 685
6c1e0256 686 prev_state = exception_enter();
f8e0870f
AH
687 local_irq_enable();
688
689 info.si_signo = SIGILL;
690 info.si_errno = 0;
691 info.si_code = ILL_BADSTK;
fc6fcdfb 692 info.si_addr = NULL;
c9408265 693 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
694 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
695 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
696 &info);
697 }
6c1e0256 698 exception_exit(prev_state);
f8e0870f 699}
081f75bb 700#endif
f8e0870f 701
29c84391
JK
702/* Set of traps needed for early debugging. */
703void __init early_trap_init(void)
704{
c9408265 705 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
29c84391 706 /* int3 can be called from all */
c9408265 707 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
8170e6be 708#ifdef CONFIG_X86_32
c9408265 709 set_intr_gate(X86_TRAP_PF, &page_fault);
8170e6be 710#endif
29c84391
JK
711 load_idt(&idt_descr);
712}
713
8170e6be
PA
714void __init early_trap_pf_init(void)
715{
716#ifdef CONFIG_X86_64
717 set_intr_gate(X86_TRAP_PF, &page_fault);
718#endif
719}
720
1da177e4
LT
721void __init trap_init(void)
722{
dbeb2be2
RR
723 int i;
724
1da177e4 725#ifdef CONFIG_EISA
927222b1 726 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
727
728 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 729 EISA_bus = 1;
927222b1 730 early_iounmap(p, 4);
1da177e4
LT
731#endif
732
c9408265
KC
733 set_intr_gate(X86_TRAP_DE, &divide_error);
734 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
699d2937 735 /* int4 can be called from all */
c9408265
KC
736 set_system_intr_gate(X86_TRAP_OF, &overflow);
737 set_intr_gate(X86_TRAP_BR, &bounds);
738 set_intr_gate(X86_TRAP_UD, &invalid_op);
739 set_intr_gate(X86_TRAP_NM, &device_not_available);
081f75bb 740#ifdef CONFIG_X86_32
c9408265 741 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb 742#else
c9408265 743 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
081f75bb 744#endif
c9408265
KC
745 set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun);
746 set_intr_gate(X86_TRAP_TS, &invalid_TSS);
747 set_intr_gate(X86_TRAP_NP, &segment_not_present);
748 set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
749 set_intr_gate(X86_TRAP_GP, &general_protection);
750 set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug);
751 set_intr_gate(X86_TRAP_MF, &coprocessor_error);
752 set_intr_gate(X86_TRAP_AC, &alignment_check);
1da177e4 753#ifdef CONFIG_X86_MCE
c9408265 754 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1da177e4 755#endif
c9408265 756 set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error);
1da177e4 757
bb3f0b59
YL
758 /* Reserve all the builtin and the syscall vector: */
759 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
760 set_bit(i, used_vectors);
761
081f75bb
AH
762#ifdef CONFIG_IA32_EMULATION
763 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 764 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
765#endif
766
767#ifdef CONFIG_X86_32
699d2937 768 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 769 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 770#endif
bb3f0b59 771
4eefbe79
KC
772 /*
773 * Set the IDT descriptor to a fixed read-only location, so that the
774 * "sidt" instruction will not leak the location of the kernel, and
775 * to defend the IDT against arbitrary memory write vulnerabilities.
776 * It will be reloaded in cpu_init() */
777 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
778 idt_descr.address = fix_to_virt(FIX_RO_IDT);
779
1da177e4 780 /*
b5964405 781 * Should be a barrier for any external CPU state:
1da177e4
LT
782 */
783 cpu_init();
784
428cf902 785 x86_init.irqs.trap_init();
228bdaa9
SR
786
787#ifdef CONFIG_X86_64
788 memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16);
c9408265
KC
789 set_nmi_gate(X86_TRAP_DB, &debug);
790 set_nmi_gate(X86_TRAP_BP, &int3);
228bdaa9 791#endif
1da177e4 792}