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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
b5964405 IM |
12 | #include <linux/interrupt.h> |
13 | #include <linux/kallsyms.h> | |
14 | #include <linux/spinlock.h> | |
b5964405 IM |
15 | #include <linux/kprobes.h> |
16 | #include <linux/uaccess.h> | |
17 | #include <linux/utsname.h> | |
18 | #include <linux/kdebug.h> | |
1da177e4 | 19 | #include <linux/kernel.h> |
b5964405 IM |
20 | #include <linux/module.h> |
21 | #include <linux/ptrace.h> | |
1da177e4 | 22 | #include <linux/string.h> |
b5964405 | 23 | #include <linux/delay.h> |
1da177e4 | 24 | #include <linux/errno.h> |
b5964405 IM |
25 | #include <linux/kexec.h> |
26 | #include <linux/sched.h> | |
1da177e4 | 27 | #include <linux/timer.h> |
1da177e4 | 28 | #include <linux/init.h> |
91768d6c | 29 | #include <linux/bug.h> |
b5964405 IM |
30 | #include <linux/nmi.h> |
31 | #include <linux/mm.h> | |
c1d518c8 AH |
32 | #include <linux/smp.h> |
33 | #include <linux/io.h> | |
1da177e4 LT |
34 | |
35 | #ifdef CONFIG_EISA | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/eisa.h> | |
38 | #endif | |
39 | ||
40 | #ifdef CONFIG_MCA | |
41 | #include <linux/mca.h> | |
42 | #endif | |
43 | ||
c0d12172 DJ |
44 | #if defined(CONFIG_EDAC) |
45 | #include <linux/edac.h> | |
46 | #endif | |
47 | ||
b5964405 | 48 | #include <asm/stacktrace.h> |
1da177e4 | 49 | #include <asm/processor.h> |
1da177e4 | 50 | #include <asm/debugreg.h> |
b5964405 IM |
51 | #include <asm/atomic.h> |
52 | #include <asm/system.h> | |
c1d518c8 | 53 | #include <asm/traps.h> |
1da177e4 LT |
54 | #include <asm/desc.h> |
55 | #include <asm/i387.h> | |
c1d518c8 AH |
56 | |
57 | #include <mach_traps.h> | |
58 | ||
081f75bb AH |
59 | #ifdef CONFIG_X86_64 |
60 | #include <asm/pgalloc.h> | |
61 | #include <asm/proto.h> | |
081f75bb | 62 | #else |
c1d518c8 AH |
63 | #include <asm/processor-flags.h> |
64 | #include <asm/arch_hooks.h> | |
6ac8d51f | 65 | #include <asm/traps.h> |
1da177e4 | 66 | |
eb642f62 | 67 | #include "cpu/mcheck/mce.h" |
1da177e4 LT |
68 | |
69 | asmlinkage int system_call(void); | |
70 | ||
1da177e4 | 71 | /* Do we ignore FPU interrupts ? */ |
b5964405 | 72 | char ignore_fpu_irq; |
1da177e4 LT |
73 | |
74 | /* | |
75 | * The IDT has to be page-aligned to simplify the Pentium | |
76 | * F0 0F bug workaround.. We have a special link segment | |
77 | * for this. | |
78 | */ | |
010d4f82 | 79 | gate_desc idt_table[256] |
6842ef0e | 80 | __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, }; |
081f75bb | 81 | #endif |
1da177e4 | 82 | |
b77b881f YL |
83 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
84 | EXPORT_SYMBOL_GPL(used_vectors); | |
85 | ||
badc7652 | 86 | static int ignore_nmis; |
e041c683 | 87 | |
762db434 AH |
88 | static inline void conditional_sti(struct pt_regs *regs) |
89 | { | |
90 | if (regs->flags & X86_EFLAGS_IF) | |
91 | local_irq_enable(); | |
92 | } | |
93 | ||
3d2a71a5 AH |
94 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
95 | { | |
96 | inc_preempt_count(); | |
97 | if (regs->flags & X86_EFLAGS_IF) | |
98 | local_irq_enable(); | |
99 | } | |
100 | ||
101 | static inline void preempt_conditional_cli(struct pt_regs *regs) | |
102 | { | |
103 | if (regs->flags & X86_EFLAGS_IF) | |
104 | local_irq_disable(); | |
105 | dec_preempt_count(); | |
106 | } | |
107 | ||
081f75bb | 108 | #ifdef CONFIG_X86_32 |
b5964405 IM |
109 | static inline void |
110 | die_if_kernel(const char *str, struct pt_regs *regs, long err) | |
1da177e4 | 111 | { |
717b594a | 112 | if (!user_mode_vm(regs)) |
1da177e4 LT |
113 | die(str, regs, err); |
114 | } | |
115 | ||
ae82157b AH |
116 | /* |
117 | * Perform the lazy TSS's I/O bitmap copy. If the TSS has an | |
118 | * invalid offset set (the LAZY one) and the faulting thread has | |
119 | * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS, | |
120 | * we set the offset field correctly and return 1. | |
121 | */ | |
122 | static int lazy_iobitmap_copy(void) | |
123 | { | |
124 | struct thread_struct *thread; | |
125 | struct tss_struct *tss; | |
126 | int cpu; | |
127 | ||
128 | cpu = get_cpu(); | |
129 | tss = &per_cpu(init_tss, cpu); | |
130 | thread = ¤t->thread; | |
131 | ||
132 | if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY && | |
133 | thread->io_bitmap_ptr) { | |
134 | memcpy(tss->io_bitmap, thread->io_bitmap_ptr, | |
135 | thread->io_bitmap_max); | |
136 | /* | |
137 | * If the previously set map was extending to higher ports | |
138 | * than the current one, pad extra space with 0xff (no access). | |
139 | */ | |
140 | if (thread->io_bitmap_max < tss->io_bitmap_max) { | |
141 | memset((char *) tss->io_bitmap + | |
142 | thread->io_bitmap_max, 0xff, | |
143 | tss->io_bitmap_max - thread->io_bitmap_max); | |
144 | } | |
145 | tss->io_bitmap_max = thread->io_bitmap_max; | |
146 | tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET; | |
147 | tss->io_bitmap_owner = thread; | |
148 | put_cpu(); | |
149 | ||
150 | return 1; | |
151 | } | |
152 | put_cpu(); | |
153 | ||
154 | return 0; | |
155 | } | |
081f75bb | 156 | #endif |
ae82157b | 157 | |
b5964405 | 158 | static void __kprobes |
3c1326f8 | 159 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
b5964405 | 160 | long error_code, siginfo_t *info) |
1da177e4 | 161 | { |
4f339ecb | 162 | struct task_struct *tsk = current; |
4f339ecb | 163 | |
081f75bb | 164 | #ifdef CONFIG_X86_32 |
6b6891f9 | 165 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 AH |
166 | /* |
167 | * traps 0, 1, 3, 4, and 5 should be forwarded to vm86. | |
168 | * On nmi (interrupt 2), do_trap should not be called. | |
169 | */ | |
170 | if (trapnr < 6) | |
1da177e4 LT |
171 | goto vm86_trap; |
172 | goto trap_signal; | |
173 | } | |
081f75bb | 174 | #endif |
1da177e4 | 175 | |
717b594a | 176 | if (!user_mode(regs)) |
1da177e4 LT |
177 | goto kernel_trap; |
178 | ||
081f75bb | 179 | #ifdef CONFIG_X86_32 |
b5964405 | 180 | trap_signal: |
081f75bb | 181 | #endif |
b5964405 IM |
182 | /* |
183 | * We want error_code and trap_no set for userspace faults and | |
184 | * kernelspace faults which result in die(), but not | |
185 | * kernelspace faults which are fixed up. die() gives the | |
186 | * process no chance to handle the signal and notice the | |
187 | * kernel fault information, so that won't result in polluting | |
188 | * the information about previously queued, but not yet | |
189 | * delivered, faults. See also do_general_protection below. | |
190 | */ | |
191 | tsk->thread.error_code = error_code; | |
192 | tsk->thread.trap_no = trapnr; | |
d1895183 | 193 | |
081f75bb AH |
194 | #ifdef CONFIG_X86_64 |
195 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
196 | printk_ratelimit()) { | |
197 | printk(KERN_INFO | |
198 | "%s[%d] trap %s ip:%lx sp:%lx error:%lx", | |
199 | tsk->comm, tsk->pid, str, | |
200 | regs->ip, regs->sp, error_code); | |
201 | print_vma_addr(" in ", regs->ip); | |
202 | printk("\n"); | |
203 | } | |
204 | #endif | |
205 | ||
b5964405 IM |
206 | if (info) |
207 | force_sig_info(signr, info, tsk); | |
208 | else | |
209 | force_sig(signr, tsk); | |
210 | return; | |
1da177e4 | 211 | |
b5964405 IM |
212 | kernel_trap: |
213 | if (!fixup_exception(regs)) { | |
214 | tsk->thread.error_code = error_code; | |
215 | tsk->thread.trap_no = trapnr; | |
216 | die(str, regs, error_code); | |
1da177e4 | 217 | } |
b5964405 | 218 | return; |
1da177e4 | 219 | |
081f75bb | 220 | #ifdef CONFIG_X86_32 |
b5964405 IM |
221 | vm86_trap: |
222 | if (handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
223 | error_code, trapnr)) | |
224 | goto trap_signal; | |
225 | return; | |
081f75bb | 226 | #endif |
1da177e4 LT |
227 | } |
228 | ||
b5964405 | 229 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 230 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
231 | { \ |
232 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
a8c1be9d | 233 | == NOTIFY_STOP) \ |
b5964405 | 234 | return; \ |
61aef7d2 | 235 | conditional_sti(regs); \ |
3c1326f8 | 236 | do_trap(trapnr, signr, str, regs, error_code, NULL); \ |
1da177e4 LT |
237 | } |
238 | ||
3c1326f8 | 239 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ |
e407d620 | 240 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
241 | { \ |
242 | siginfo_t info; \ | |
243 | info.si_signo = signr; \ | |
244 | info.si_errno = 0; \ | |
245 | info.si_code = sicode; \ | |
246 | info.si_addr = (void __user *)siaddr; \ | |
b5964405 | 247 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ |
a8c1be9d | 248 | == NOTIFY_STOP) \ |
b5964405 | 249 | return; \ |
61aef7d2 | 250 | conditional_sti(regs); \ |
3c1326f8 | 251 | do_trap(trapnr, signr, str, regs, error_code, &info); \ |
1da177e4 LT |
252 | } |
253 | ||
3c1326f8 AH |
254 | DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip) |
255 | DO_ERROR(4, SIGSEGV, "overflow", overflow) | |
256 | DO_ERROR(5, SIGSEGV, "bounds", bounds) | |
257 | DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip) | |
51bc1ed6 | 258 | DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) |
6bf77bf9 | 259 | DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS) |
36d936c7 | 260 | DO_ERROR(11, SIGBUS, "segment not present", segment_not_present) |
081f75bb | 261 | #ifdef CONFIG_X86_32 |
f5ca8187 | 262 | DO_ERROR(12, SIGBUS, "stack segment", stack_segment) |
081f75bb | 263 | #endif |
3c1326f8 | 264 | DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0) |
1da177e4 | 265 | |
081f75bb AH |
266 | #ifdef CONFIG_X86_64 |
267 | /* Runs on IST stack */ | |
268 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
269 | { | |
270 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, | |
271 | 12, SIGBUS) == NOTIFY_STOP) | |
272 | return; | |
273 | preempt_conditional_sti(regs); | |
274 | do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL); | |
275 | preempt_conditional_cli(regs); | |
276 | } | |
277 | ||
278 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
279 | { | |
280 | static const char str[] = "double fault"; | |
281 | struct task_struct *tsk = current; | |
282 | ||
283 | /* Return not checked because double check cannot be ignored */ | |
284 | notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV); | |
285 | ||
286 | tsk->thread.error_code = error_code; | |
287 | tsk->thread.trap_no = 8; | |
288 | ||
bd8b96df IM |
289 | /* |
290 | * This is always a kernel trap and never fixable (and thus must | |
291 | * never return). | |
292 | */ | |
081f75bb AH |
293 | for (;;) |
294 | die(str, regs, error_code); | |
295 | } | |
296 | #endif | |
297 | ||
e407d620 | 298 | dotraplinkage void __kprobes |
13485ab5 | 299 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 300 | { |
13485ab5 | 301 | struct task_struct *tsk; |
b5964405 | 302 | |
c6df0d71 AH |
303 | conditional_sti(regs); |
304 | ||
081f75bb | 305 | #ifdef CONFIG_X86_32 |
ae82157b AH |
306 | if (lazy_iobitmap_copy()) { |
307 | /* restart the faulting instruction */ | |
1da177e4 LT |
308 | return; |
309 | } | |
1da177e4 | 310 | |
6b6891f9 | 311 | if (regs->flags & X86_VM_MASK) |
1da177e4 | 312 | goto gp_in_vm86; |
081f75bb | 313 | #endif |
1da177e4 | 314 | |
13485ab5 | 315 | tsk = current; |
717b594a | 316 | if (!user_mode(regs)) |
1da177e4 LT |
317 | goto gp_in_kernel; |
318 | ||
13485ab5 AH |
319 | tsk->thread.error_code = error_code; |
320 | tsk->thread.trap_no = 13; | |
b5964405 | 321 | |
13485ab5 AH |
322 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
323 | printk_ratelimit()) { | |
abd4f750 | 324 | printk(KERN_INFO |
13485ab5 AH |
325 | "%s[%d] general protection ip:%lx sp:%lx error:%lx", |
326 | tsk->comm, task_pid_nr(tsk), | |
327 | regs->ip, regs->sp, error_code); | |
03252919 AK |
328 | print_vma_addr(" in ", regs->ip); |
329 | printk("\n"); | |
330 | } | |
abd4f750 | 331 | |
13485ab5 | 332 | force_sig(SIGSEGV, tsk); |
1da177e4 LT |
333 | return; |
334 | ||
081f75bb | 335 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
336 | gp_in_vm86: |
337 | local_irq_enable(); | |
338 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
339 | return; | |
081f75bb | 340 | #endif |
1da177e4 LT |
341 | |
342 | gp_in_kernel: | |
13485ab5 AH |
343 | if (fixup_exception(regs)) |
344 | return; | |
345 | ||
346 | tsk->thread.error_code = error_code; | |
347 | tsk->thread.trap_no = 13; | |
348 | if (notify_die(DIE_GPF, "general protection fault", regs, | |
1da177e4 | 349 | error_code, 13, SIGSEGV) == NOTIFY_STOP) |
13485ab5 AH |
350 | return; |
351 | die("general protection fault", regs, error_code); | |
1da177e4 LT |
352 | } |
353 | ||
5deb45e3 | 354 | static notrace __kprobes void |
b5964405 | 355 | mem_parity_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 | 356 | { |
b5964405 IM |
357 | printk(KERN_EMERG |
358 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
359 | reason, smp_processor_id()); | |
360 | ||
361 | printk(KERN_EMERG | |
362 | "You have some hardware problem, likely on the PCI bus.\n"); | |
c0d12172 DJ |
363 | |
364 | #if defined(CONFIG_EDAC) | |
b5964405 | 365 | if (edac_handler_set()) { |
c0d12172 DJ |
366 | edac_atomic_assert_error(); |
367 | return; | |
368 | } | |
369 | #endif | |
370 | ||
8da5adda | 371 | if (panic_on_unrecovered_nmi) |
b5964405 | 372 | panic("NMI: Not continuing"); |
1da177e4 | 373 | |
c41c5cd3 | 374 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); |
1da177e4 LT |
375 | |
376 | /* Clear and disable the memory parity error line. */ | |
7970479c AH |
377 | reason = (reason & 0xf) | 4; |
378 | outb(reason, 0x61); | |
1da177e4 LT |
379 | } |
380 | ||
5deb45e3 | 381 | static notrace __kprobes void |
b5964405 | 382 | io_check_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 LT |
383 | { |
384 | unsigned long i; | |
385 | ||
9c107805 | 386 | printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n"); |
1da177e4 LT |
387 | show_registers(regs); |
388 | ||
389 | /* Re-enable the IOCK line, wait for a few seconds */ | |
390 | reason = (reason & 0xf) | 8; | |
391 | outb(reason, 0x61); | |
b5964405 | 392 | |
1da177e4 | 393 | i = 2000; |
b5964405 IM |
394 | while (--i) |
395 | udelay(1000); | |
396 | ||
1da177e4 LT |
397 | reason &= ~8; |
398 | outb(reason, 0x61); | |
399 | } | |
400 | ||
5deb45e3 | 401 | static notrace __kprobes void |
b5964405 | 402 | unknown_nmi_error(unsigned char reason, struct pt_regs *regs) |
1da177e4 | 403 | { |
c1d518c8 AH |
404 | if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) == |
405 | NOTIFY_STOP) | |
d3597524 | 406 | return; |
1da177e4 | 407 | #ifdef CONFIG_MCA |
b5964405 IM |
408 | /* |
409 | * Might actually be able to figure out what the guilty party | |
410 | * is: | |
411 | */ | |
412 | if (MCA_bus) { | |
1da177e4 LT |
413 | mca_handle_nmi(); |
414 | return; | |
415 | } | |
416 | #endif | |
b5964405 IM |
417 | printk(KERN_EMERG |
418 | "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n", | |
419 | reason, smp_processor_id()); | |
420 | ||
c41c5cd3 | 421 | printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n"); |
8da5adda | 422 | if (panic_on_unrecovered_nmi) |
b5964405 | 423 | panic("NMI: Not continuing"); |
8da5adda | 424 | |
c41c5cd3 | 425 | printk(KERN_EMERG "Dazed and confused, but trying to continue\n"); |
1da177e4 LT |
426 | } |
427 | ||
5deb45e3 | 428 | static notrace __kprobes void default_do_nmi(struct pt_regs *regs) |
1da177e4 LT |
429 | { |
430 | unsigned char reason = 0; | |
abd34807 AH |
431 | int cpu; |
432 | ||
433 | cpu = smp_processor_id(); | |
1da177e4 | 434 | |
abd34807 AH |
435 | /* Only the BSP gets external NMIs from the system. */ |
436 | if (!cpu) | |
1da177e4 | 437 | reason = get_nmi_reason(); |
b5964405 | 438 | |
1da177e4 | 439 | if (!(reason & 0xc0)) { |
20c0d2d4 | 440 | if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT) |
a8c1be9d | 441 | == NOTIFY_STOP) |
1da177e4 LT |
442 | return; |
443 | #ifdef CONFIG_X86_LOCAL_APIC | |
444 | /* | |
445 | * Ok, so this is none of the documented NMI sources, | |
446 | * so it must be the NMI watchdog. | |
447 | */ | |
3adbbcce | 448 | if (nmi_watchdog_tick(regs, reason)) |
1da177e4 | 449 | return; |
abd34807 | 450 | if (!do_nmi_callback(regs, cpu)) |
3adbbcce | 451 | unknown_nmi_error(reason, regs); |
b5964405 IM |
452 | #else |
453 | unknown_nmi_error(reason, regs); | |
454 | #endif | |
2fbe7b25 | 455 | |
1da177e4 LT |
456 | return; |
457 | } | |
20c0d2d4 | 458 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP) |
1da177e4 | 459 | return; |
a8c1be9d AH |
460 | |
461 | /* AK: following checks seem to be broken on modern chipsets. FIXME */ | |
1da177e4 LT |
462 | if (reason & 0x80) |
463 | mem_parity_error(reason, regs); | |
464 | if (reason & 0x40) | |
465 | io_check_error(reason, regs); | |
081f75bb | 466 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
467 | /* |
468 | * Reassert NMI in case it became active meanwhile | |
b5964405 | 469 | * as it's edge-triggered: |
1da177e4 LT |
470 | */ |
471 | reassert_nmi(); | |
081f75bb | 472 | #endif |
1da177e4 LT |
473 | } |
474 | ||
e407d620 AH |
475 | dotraplinkage notrace __kprobes void |
476 | do_nmi(struct pt_regs *regs, long error_code) | |
1da177e4 | 477 | { |
1da177e4 LT |
478 | nmi_enter(); |
479 | ||
915b0d01 | 480 | inc_irq_stat(__nmi_count); |
1da177e4 | 481 | |
8f4e956b AK |
482 | if (!ignore_nmis) |
483 | default_do_nmi(regs); | |
1da177e4 LT |
484 | |
485 | nmi_exit(); | |
486 | } | |
487 | ||
8f4e956b AK |
488 | void stop_nmi(void) |
489 | { | |
490 | acpi_nmi_disable(); | |
491 | ignore_nmis++; | |
492 | } | |
493 | ||
494 | void restart_nmi(void) | |
495 | { | |
496 | ignore_nmis--; | |
497 | acpi_nmi_enable(); | |
498 | } | |
499 | ||
c1d518c8 | 500 | /* May run on IST stack. */ |
e407d620 | 501 | dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 502 | { |
b94da1e4 | 503 | #ifdef CONFIG_KPROBES |
1da177e4 LT |
504 | if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) |
505 | == NOTIFY_STOP) | |
48c88211 | 506 | return; |
b94da1e4 AH |
507 | #else |
508 | if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP) | |
509 | == NOTIFY_STOP) | |
510 | return; | |
511 | #endif | |
b5964405 | 512 | |
4915a35e | 513 | preempt_conditional_sti(regs); |
3c1326f8 | 514 | do_trap(3, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 515 | preempt_conditional_cli(regs); |
1da177e4 | 516 | } |
1da177e4 | 517 | |
081f75bb | 518 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
519 | /* |
520 | * Help handler running on IST stack to switch back to user stack | |
521 | * for scheduling or signal handling. The actual stack switch is done in | |
522 | * entry.S | |
523 | */ | |
081f75bb AH |
524 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
525 | { | |
526 | struct pt_regs *regs = eregs; | |
527 | /* Did already sync */ | |
528 | if (eregs == (struct pt_regs *)eregs->sp) | |
529 | ; | |
530 | /* Exception from user space */ | |
531 | else if (user_mode(eregs)) | |
532 | regs = task_pt_regs(current); | |
bd8b96df IM |
533 | /* |
534 | * Exception from kernel and interrupts are enabled. Move to | |
535 | * kernel process stack. | |
536 | */ | |
081f75bb AH |
537 | else if (eregs->flags & X86_EFLAGS_IF) |
538 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
539 | if (eregs != regs) | |
540 | *regs = *eregs; | |
541 | return regs; | |
542 | } | |
543 | #endif | |
544 | ||
1da177e4 LT |
545 | /* |
546 | * Our handling of the processor debug registers is non-trivial. | |
547 | * We do not clear them on entry and exit from the kernel. Therefore | |
548 | * it is possible to get a watchpoint trap here from inside the kernel. | |
549 | * However, the code in ./ptrace.c has ensured that the user can | |
550 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
551 | * watchpoint trap can only occur in code which is reading/writing | |
552 | * from user space. Such code must not hold kernel locks (since it | |
553 | * can equally take a page fault), therefore it is safe to call | |
554 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 555 | * |
1da177e4 LT |
556 | * Code in ./signal.c ensures that the debug control register |
557 | * is restored before we deliver any signal, and therefore that | |
558 | * user code runs with the correct debug control register even though | |
559 | * we clear it here. | |
560 | * | |
561 | * Being careful here means that we don't have to be as careful in a | |
562 | * lot of more complicated places (task switching can be a bit lazy | |
563 | * about restoring all the debug state, and ptrace doesn't have to | |
564 | * find every occurrence of the TF bit that could be saved away even | |
565 | * by user code) | |
c1d518c8 AH |
566 | * |
567 | * May run on IST stack. | |
1da177e4 | 568 | */ |
e407d620 | 569 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 570 | { |
1da177e4 | 571 | struct task_struct *tsk = current; |
3d2a71a5 | 572 | unsigned long condition; |
da654b74 | 573 | int si_code; |
1da177e4 | 574 | |
1cc6f12e | 575 | get_debugreg(condition, 6); |
1da177e4 | 576 | |
10faa81e RM |
577 | /* |
578 | * The processor cleared BTF, so don't mark that we need it set. | |
579 | */ | |
580 | clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR); | |
581 | tsk->thread.debugctlmsr = 0; | |
582 | ||
1da177e4 | 583 | if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code, |
a8c1be9d | 584 | SIGTRAP) == NOTIFY_STOP) |
1da177e4 | 585 | return; |
3d2a71a5 | 586 | |
1da177e4 | 587 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 588 | preempt_conditional_sti(regs); |
1da177e4 LT |
589 | |
590 | /* Mask out spurious debug traps due to lazy DR7 setting */ | |
591 | if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) { | |
0f534093 | 592 | if (!tsk->thread.debugreg7) |
1da177e4 LT |
593 | goto clear_dr7; |
594 | } | |
595 | ||
081f75bb | 596 | #ifdef CONFIG_X86_32 |
6b6891f9 | 597 | if (regs->flags & X86_VM_MASK) |
1da177e4 | 598 | goto debug_vm86; |
081f75bb | 599 | #endif |
1da177e4 LT |
600 | |
601 | /* Save debug status register where ptrace can see it */ | |
0f534093 | 602 | tsk->thread.debugreg6 = condition; |
1da177e4 LT |
603 | |
604 | /* | |
605 | * Single-stepping through TF: make sure we ignore any events in | |
606 | * kernel space (but re-enable TF when returning to user mode). | |
607 | */ | |
608 | if (condition & DR_STEP) { | |
717b594a | 609 | if (!user_mode(regs)) |
1da177e4 LT |
610 | goto clear_TF_reenable; |
611 | } | |
612 | ||
3d2a71a5 | 613 | si_code = get_si_code(condition); |
1da177e4 | 614 | /* Ok, finally something we can handle */ |
da654b74 | 615 | send_sigtrap(tsk, regs, error_code, si_code); |
1da177e4 | 616 | |
b5964405 IM |
617 | /* |
618 | * Disable additional traps. They'll be re-enabled when | |
1da177e4 LT |
619 | * the signal is delivered. |
620 | */ | |
621 | clear_dr7: | |
1cc6f12e | 622 | set_debugreg(0, 7); |
3d2a71a5 | 623 | preempt_conditional_cli(regs); |
1da177e4 LT |
624 | return; |
625 | ||
081f75bb | 626 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
627 | debug_vm86: |
628 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1); | |
3d2a71a5 | 629 | preempt_conditional_cli(regs); |
1da177e4 | 630 | return; |
081f75bb | 631 | #endif |
1da177e4 LT |
632 | |
633 | clear_TF_reenable: | |
634 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
6093015d | 635 | regs->flags &= ~X86_EFLAGS_TF; |
3d2a71a5 | 636 | preempt_conditional_cli(regs); |
1da177e4 LT |
637 | return; |
638 | } | |
639 | ||
081f75bb AH |
640 | #ifdef CONFIG_X86_64 |
641 | static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr) | |
642 | { | |
643 | if (fixup_exception(regs)) | |
644 | return 1; | |
645 | ||
646 | notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE); | |
647 | /* Illegal floating point operation in the kernel */ | |
648 | current->thread.trap_no = trapnr; | |
649 | die(str, regs, 0); | |
650 | return 0; | |
651 | } | |
652 | #endif | |
653 | ||
1da177e4 LT |
654 | /* |
655 | * Note that we play around with the 'TS' bit in an attempt to get | |
656 | * the correct behaviour even in the presence of the asynchronous | |
657 | * IRQ13 behaviour | |
658 | */ | |
65ea5b03 | 659 | void math_error(void __user *ip) |
1da177e4 | 660 | { |
b5964405 | 661 | struct task_struct *task; |
1da177e4 | 662 | siginfo_t info; |
adf77bac | 663 | unsigned short cwd, swd, err; |
1da177e4 LT |
664 | |
665 | /* | |
666 | * Save the info for the exception handler and clear the error. | |
667 | */ | |
668 | task = current; | |
669 | save_init_fpu(task); | |
670 | task->thread.trap_no = 16; | |
671 | task->thread.error_code = 0; | |
672 | info.si_signo = SIGFPE; | |
673 | info.si_errno = 0; | |
65ea5b03 | 674 | info.si_addr = ip; |
1da177e4 LT |
675 | /* |
676 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
677 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
678 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
679 | * fault bit. We should only be taking one exception at a time, | |
680 | * so if this combination doesn't produce any single exception, | |
a8c1be9d | 681 | * then we have a bad program that isn't synchronizing its FPU usage |
1da177e4 LT |
682 | * and it will suffer the consequences since we won't be able to |
683 | * fully reproduce the context of the exception | |
684 | */ | |
685 | cwd = get_fpu_cwd(task); | |
686 | swd = get_fpu_swd(task); | |
adf77bac | 687 | |
a73ad333 | 688 | err = swd & ~cwd; |
adf77bac PA |
689 | |
690 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
691 | /* |
692 | * swd & 0x240 == 0x040: Stack Underflow | |
693 | * swd & 0x240 == 0x240: Stack Overflow | |
694 | * User must clear the SF bit (0x40) if set | |
695 | */ | |
696 | info.si_code = FPE_FLTINV; | |
adf77bac | 697 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 698 | info.si_code = FPE_FLTDIV; |
adf77bac | 699 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 700 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
701 | } else if (err & 0x012) { /* Denormal, Underflow */ |
702 | info.si_code = FPE_FLTUND; | |
703 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 704 | info.si_code = FPE_FLTRES; |
adf77bac | 705 | } else { |
bd8b96df IM |
706 | /* |
707 | * If we're using IRQ 13, or supposedly even some trap 16 | |
708 | * implementations, it's possible we get a spurious trap... | |
709 | */ | |
a73ad333 | 710 | return; /* Spurious trap, no error */ |
1da177e4 LT |
711 | } |
712 | force_sig_info(SIGFPE, &info, task); | |
713 | } | |
714 | ||
e407d620 | 715 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 716 | { |
252d28fe | 717 | conditional_sti(regs); |
081f75bb AH |
718 | |
719 | #ifdef CONFIG_X86_32 | |
1da177e4 | 720 | ignore_fpu_irq = 1; |
081f75bb AH |
721 | #else |
722 | if (!user_mode(regs) && | |
723 | kernel_math_error(regs, "kernel x87 math error", 16)) | |
724 | return; | |
725 | #endif | |
726 | ||
65ea5b03 | 727 | math_error((void __user *)regs->ip); |
1da177e4 LT |
728 | } |
729 | ||
65ea5b03 | 730 | static void simd_math_error(void __user *ip) |
1da177e4 | 731 | { |
b5964405 | 732 | struct task_struct *task; |
b5964405 | 733 | siginfo_t info; |
7b4fd4bb | 734 | unsigned short mxcsr; |
1da177e4 LT |
735 | |
736 | /* | |
737 | * Save the info for the exception handler and clear the error. | |
738 | */ | |
739 | task = current; | |
740 | save_init_fpu(task); | |
741 | task->thread.trap_no = 19; | |
742 | task->thread.error_code = 0; | |
743 | info.si_signo = SIGFPE; | |
744 | info.si_errno = 0; | |
745 | info.si_code = __SI_FAULT; | |
65ea5b03 | 746 | info.si_addr = ip; |
1da177e4 LT |
747 | /* |
748 | * The SIMD FPU exceptions are handled a little differently, as there | |
749 | * is only a single status/control register. Thus, to determine which | |
750 | * unmasked exception was caught we must mask the exception mask bits | |
751 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
752 | */ | |
753 | mxcsr = get_fpu_mxcsr(task); | |
754 | switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) { | |
b5964405 IM |
755 | case 0x000: |
756 | default: | |
757 | break; | |
758 | case 0x001: /* Invalid Op */ | |
759 | info.si_code = FPE_FLTINV; | |
760 | break; | |
761 | case 0x002: /* Denormalize */ | |
762 | case 0x010: /* Underflow */ | |
763 | info.si_code = FPE_FLTUND; | |
764 | break; | |
765 | case 0x004: /* Zero Divide */ | |
766 | info.si_code = FPE_FLTDIV; | |
767 | break; | |
768 | case 0x008: /* Overflow */ | |
769 | info.si_code = FPE_FLTOVF; | |
770 | break; | |
771 | case 0x020: /* Precision */ | |
772 | info.si_code = FPE_FLTRES; | |
773 | break; | |
1da177e4 LT |
774 | } |
775 | force_sig_info(SIGFPE, &info, task); | |
776 | } | |
777 | ||
e407d620 AH |
778 | dotraplinkage void |
779 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 780 | { |
b939bde2 AH |
781 | conditional_sti(regs); |
782 | ||
081f75bb | 783 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
784 | if (cpu_has_xmm) { |
785 | /* Handle SIMD FPU exceptions on PIII+ processors. */ | |
786 | ignore_fpu_irq = 1; | |
65ea5b03 | 787 | simd_math_error((void __user *)regs->ip); |
b5964405 IM |
788 | return; |
789 | } | |
790 | /* | |
791 | * Handle strange cache flush from user space exception | |
792 | * in all other cases. This is undocumented behaviour. | |
793 | */ | |
6b6891f9 | 794 | if (regs->flags & X86_VM_MASK) { |
b5964405 IM |
795 | handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code); |
796 | return; | |
1da177e4 | 797 | } |
b5964405 IM |
798 | current->thread.trap_no = 19; |
799 | current->thread.error_code = error_code; | |
800 | die_if_kernel("cache flush denied", regs, error_code); | |
801 | force_sig(SIGSEGV, current); | |
081f75bb AH |
802 | #else |
803 | if (!user_mode(regs) && | |
804 | kernel_math_error(regs, "kernel simd math error", 19)) | |
805 | return; | |
806 | simd_math_error((void __user *)regs->ip); | |
807 | #endif | |
1da177e4 LT |
808 | } |
809 | ||
e407d620 AH |
810 | dotraplinkage void |
811 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 812 | { |
cf81978d | 813 | conditional_sti(regs); |
1da177e4 LT |
814 | #if 0 |
815 | /* No need to warn about this any longer. */ | |
b5964405 | 816 | printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
817 | #endif |
818 | } | |
819 | ||
081f75bb | 820 | #ifdef CONFIG_X86_32 |
b5964405 | 821 | unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp) |
1da177e4 | 822 | { |
736f12bf | 823 | struct desc_struct *gdt = get_cpu_gdt_table(smp_processor_id()); |
be44d2aa SS |
824 | unsigned long base = (kesp - uesp) & -THREAD_SIZE; |
825 | unsigned long new_kesp = kesp - base; | |
826 | unsigned long lim_pages = (new_kesp | (THREAD_SIZE - 1)) >> PAGE_SHIFT; | |
827 | __u64 desc = *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS]; | |
b5964405 | 828 | |
be44d2aa | 829 | /* Set up base for espfix segment */ |
b5964405 IM |
830 | desc &= 0x00f0ff0000000000ULL; |
831 | desc |= ((((__u64)base) << 16) & 0x000000ffffff0000ULL) | | |
be44d2aa SS |
832 | ((((__u64)base) << 32) & 0xff00000000000000ULL) | |
833 | ((((__u64)lim_pages) << 32) & 0x000f000000000000ULL) | | |
834 | (lim_pages & 0xffff); | |
835 | *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS] = desc; | |
b5964405 | 836 | |
be44d2aa | 837 | return new_kesp; |
1da177e4 | 838 | } |
081f75bb AH |
839 | #else |
840 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) | |
841 | { | |
842 | } | |
843 | ||
844 | asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void) | |
845 | { | |
846 | } | |
847 | #endif | |
1da177e4 LT |
848 | |
849 | /* | |
b5964405 | 850 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
851 | * old math state array, and gets the new ones from the current task |
852 | * | |
853 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
854 | * Don't touch unless you *really* know how it works. | |
855 | * | |
856 | * Must be called with kernel preemption disabled (in this case, | |
857 | * local interrupts are disabled at the call-site in entry.S). | |
858 | */ | |
acc20761 | 859 | asmlinkage void math_state_restore(void) |
1da177e4 LT |
860 | { |
861 | struct thread_info *thread = current_thread_info(); | |
862 | struct task_struct *tsk = thread->task; | |
863 | ||
aa283f49 SS |
864 | if (!tsk_used_math(tsk)) { |
865 | local_irq_enable(); | |
866 | /* | |
867 | * does a slab alloc which can sleep | |
868 | */ | |
869 | if (init_fpu(tsk)) { | |
870 | /* | |
871 | * ran out of memory! | |
872 | */ | |
873 | do_group_exit(SIGKILL); | |
874 | return; | |
875 | } | |
876 | local_irq_disable(); | |
877 | } | |
878 | ||
b5964405 | 879 | clts(); /* Allow maths ops (or we recurse) */ |
081f75bb | 880 | #ifdef CONFIG_X86_32 |
1da177e4 | 881 | restore_fpu(tsk); |
081f75bb AH |
882 | #else |
883 | /* | |
884 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
885 | */ | |
886 | if (unlikely(restore_fpu_checking(tsk))) { | |
887 | stts(); | |
888 | force_sig(SIGSEGV, tsk); | |
889 | return; | |
890 | } | |
891 | #endif | |
1da177e4 | 892 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ |
acc20761 | 893 | tsk->fpu_counter++; |
1da177e4 | 894 | } |
5992b6da | 895 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 LT |
896 | |
897 | #ifndef CONFIG_MATH_EMULATION | |
1da177e4 LT |
898 | asmlinkage void math_emulate(long arg) |
899 | { | |
b5964405 IM |
900 | printk(KERN_EMERG |
901 | "math-emulation not enabled and no coprocessor found.\n"); | |
902 | printk(KERN_EMERG "killing %s.\n", current->comm); | |
903 | force_sig(SIGFPE, current); | |
1da177e4 LT |
904 | schedule(); |
905 | } | |
1da177e4 LT |
906 | #endif /* CONFIG_MATH_EMULATION */ |
907 | ||
e407d620 AH |
908 | dotraplinkage void __kprobes |
909 | do_device_not_available(struct pt_regs *regs, long error) | |
7643e9b9 | 910 | { |
081f75bb | 911 | #ifdef CONFIG_X86_32 |
7643e9b9 AH |
912 | if (read_cr0() & X86_CR0_EM) { |
913 | conditional_sti(regs); | |
914 | math_emulate(0); | |
915 | } else { | |
916 | math_state_restore(); /* interrupts still off */ | |
917 | conditional_sti(regs); | |
918 | } | |
081f75bb AH |
919 | #else |
920 | math_state_restore(); | |
921 | #endif | |
7643e9b9 AH |
922 | } |
923 | ||
081f75bb | 924 | #ifdef CONFIG_X86_32 |
e407d620 | 925 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
926 | { |
927 | siginfo_t info; | |
928 | local_irq_enable(); | |
929 | ||
930 | info.si_signo = SIGILL; | |
931 | info.si_errno = 0; | |
932 | info.si_code = ILL_BADSTK; | |
933 | info.si_addr = 0; | |
934 | if (notify_die(DIE_TRAP, "iret exception", | |
935 | regs, error_code, 32, SIGILL) == NOTIFY_STOP) | |
936 | return; | |
3c1326f8 | 937 | do_trap(32, SIGILL, "iret exception", regs, error_code, &info); |
f8e0870f | 938 | } |
081f75bb | 939 | #endif |
f8e0870f | 940 | |
1da177e4 LT |
941 | void __init trap_init(void) |
942 | { | |
dbeb2be2 RR |
943 | int i; |
944 | ||
1da177e4 | 945 | #ifdef CONFIG_EISA |
927222b1 | 946 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
947 | |
948 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 949 | EISA_bus = 1; |
927222b1 | 950 | early_iounmap(p, 4); |
1da177e4 LT |
951 | #endif |
952 | ||
976382dc | 953 | set_intr_gate(0, ÷_error); |
699d2937 AH |
954 | set_intr_gate_ist(1, &debug, DEBUG_STACK); |
955 | set_intr_gate_ist(2, &nmi, NMI_STACK); | |
956 | /* int3 can be called from all */ | |
957 | set_system_intr_gate_ist(3, &int3, DEBUG_STACK); | |
958 | /* int4 can be called from all */ | |
959 | set_system_intr_gate(4, &overflow); | |
64f644c0 | 960 | set_intr_gate(5, &bounds); |
12394cf5 | 961 | set_intr_gate(6, &invalid_op); |
7643e9b9 | 962 | set_intr_gate(7, &device_not_available); |
081f75bb | 963 | #ifdef CONFIG_X86_32 |
a8c1be9d | 964 | set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb AH |
965 | #else |
966 | set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK); | |
967 | #endif | |
51bc1ed6 | 968 | set_intr_gate(9, &coprocessor_segment_overrun); |
6bf77bf9 | 969 | set_intr_gate(10, &invalid_TSS); |
36d936c7 | 970 | set_intr_gate(11, &segment_not_present); |
699d2937 | 971 | set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK); |
c6df0d71 | 972 | set_intr_gate(13, &general_protection); |
b5964405 | 973 | set_intr_gate(14, &page_fault); |
cf81978d | 974 | set_intr_gate(15, &spurious_interrupt_bug); |
252d28fe | 975 | set_intr_gate(16, &coprocessor_error); |
5feedfd4 | 976 | set_intr_gate(17, &alignment_check); |
1da177e4 | 977 | #ifdef CONFIG_X86_MCE |
699d2937 | 978 | set_intr_gate_ist(18, &machine_check, MCE_STACK); |
1da177e4 | 979 | #endif |
b939bde2 | 980 | set_intr_gate(19, &simd_coprocessor_error); |
1da177e4 | 981 | |
081f75bb AH |
982 | #ifdef CONFIG_IA32_EMULATION |
983 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
984 | #endif | |
985 | ||
986 | #ifdef CONFIG_X86_32 | |
d43c6e80 | 987 | if (cpu_has_fxsr) { |
d43c6e80 JB |
988 | printk(KERN_INFO "Enabling fast FPU save and restore... "); |
989 | set_in_cr4(X86_CR4_OSFXSR); | |
990 | printk("done.\n"); | |
991 | } | |
992 | if (cpu_has_xmm) { | |
b5964405 IM |
993 | printk(KERN_INFO |
994 | "Enabling unmasked SIMD FPU exception support... "); | |
d43c6e80 JB |
995 | set_in_cr4(X86_CR4_OSXMMEXCPT); |
996 | printk("done.\n"); | |
997 | } | |
998 | ||
699d2937 | 999 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
b77b881f | 1000 | #endif |
1da177e4 | 1001 | |
b5964405 | 1002 | /* Reserve all the builtin and the syscall vector: */ |
dbeb2be2 RR |
1003 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) |
1004 | set_bit(i, used_vectors); | |
b5964405 | 1005 | |
b77b881f YL |
1006 | #ifdef CONFIG_X86_64 |
1007 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); | |
1008 | #else | |
dbeb2be2 | 1009 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 1010 | #endif |
1da177e4 | 1011 | /* |
b5964405 | 1012 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
1013 | */ |
1014 | cpu_init(); | |
1015 | ||
081f75bb | 1016 | #ifdef CONFIG_X86_32 |
1da177e4 | 1017 | trap_init_hook(); |
081f75bb | 1018 | #endif |
1da177e4 | 1019 | } |