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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
b5964405
IM
12#include <linux/interrupt.h>
13#include <linux/kallsyms.h>
14#include <linux/spinlock.h>
b5964405
IM
15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
b5964405 17#include <linux/kdebug.h>
1da177e4 18#include <linux/kernel.h>
b5964405
IM
19#include <linux/module.h>
20#include <linux/ptrace.h>
1da177e4 21#include <linux/string.h>
b5964405 22#include <linux/delay.h>
1da177e4 23#include <linux/errno.h>
b5964405
IM
24#include <linux/kexec.h>
25#include <linux/sched.h>
1da177e4 26#include <linux/timer.h>
1da177e4 27#include <linux/init.h>
91768d6c 28#include <linux/bug.h>
b5964405
IM
29#include <linux/nmi.h>
30#include <linux/mm.h>
c1d518c8
AH
31#include <linux/smp.h>
32#include <linux/io.h>
1da177e4
LT
33
34#ifdef CONFIG_EISA
35#include <linux/ioport.h>
36#include <linux/eisa.h>
37#endif
38
39#ifdef CONFIG_MCA
40#include <linux/mca.h>
41#endif
42
c0d12172
DJ
43#if defined(CONFIG_EDAC)
44#include <linux/edac.h>
45#endif
46
f8561296 47#include <asm/kmemcheck.h>
b5964405 48#include <asm/stacktrace.h>
1da177e4 49#include <asm/processor.h>
1da177e4 50#include <asm/debugreg.h>
b5964405
IM
51#include <asm/atomic.h>
52#include <asm/system.h>
c1d518c8 53#include <asm/traps.h>
1da177e4
LT
54#include <asm/desc.h>
55#include <asm/i387.h>
9e55e44e 56#include <asm/mce.h>
c1d518c8 57
1164dd00 58#include <asm/mach_traps.h>
c1d518c8 59
081f75bb 60#ifdef CONFIG_X86_64
428cf902 61#include <asm/x86_init.h>
081f75bb
AH
62#include <asm/pgalloc.h>
63#include <asm/proto.h>
081f75bb 64#else
c1d518c8 65#include <asm/processor-flags.h>
8e6dafd6 66#include <asm/setup.h>
1da177e4 67
1da177e4
LT
68asmlinkage int system_call(void);
69
1da177e4 70/* Do we ignore FPU interrupts ? */
b5964405 71char ignore_fpu_irq;
1da177e4
LT
72
73/*
74 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 75 * F0 0F bug workaround.
1da177e4 76 */
07e81d61 77gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 78#endif
1da177e4 79
b77b881f
YL
80DECLARE_BITMAP(used_vectors, NR_VECTORS);
81EXPORT_SYMBOL_GPL(used_vectors);
82
badc7652 83static int ignore_nmis;
e041c683 84
762db434
AH
85static inline void conditional_sti(struct pt_regs *regs)
86{
87 if (regs->flags & X86_EFLAGS_IF)
88 local_irq_enable();
89}
90
3d2a71a5
AH
91static inline void preempt_conditional_sti(struct pt_regs *regs)
92{
93 inc_preempt_count();
94 if (regs->flags & X86_EFLAGS_IF)
95 local_irq_enable();
96}
97
be716615
TG
98static inline void conditional_cli(struct pt_regs *regs)
99{
100 if (regs->flags & X86_EFLAGS_IF)
101 local_irq_disable();
102}
103
3d2a71a5
AH
104static inline void preempt_conditional_cli(struct pt_regs *regs)
105{
106 if (regs->flags & X86_EFLAGS_IF)
107 local_irq_disable();
108 dec_preempt_count();
109}
110
b5964405 111static void __kprobes
3c1326f8 112do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
b5964405 113 long error_code, siginfo_t *info)
1da177e4 114{
4f339ecb 115 struct task_struct *tsk = current;
4f339ecb 116
081f75bb 117#ifdef CONFIG_X86_32
6b6891f9 118 if (regs->flags & X86_VM_MASK) {
3c1326f8
AH
119 /*
120 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
121 * On nmi (interrupt 2), do_trap should not be called.
122 */
123 if (trapnr < 6)
1da177e4
LT
124 goto vm86_trap;
125 goto trap_signal;
126 }
081f75bb 127#endif
1da177e4 128
717b594a 129 if (!user_mode(regs))
1da177e4
LT
130 goto kernel_trap;
131
081f75bb 132#ifdef CONFIG_X86_32
b5964405 133trap_signal:
081f75bb 134#endif
b5964405
IM
135 /*
136 * We want error_code and trap_no set for userspace faults and
137 * kernelspace faults which result in die(), but not
138 * kernelspace faults which are fixed up. die() gives the
139 * process no chance to handle the signal and notice the
140 * kernel fault information, so that won't result in polluting
141 * the information about previously queued, but not yet
142 * delivered, faults. See also do_general_protection below.
143 */
144 tsk->thread.error_code = error_code;
145 tsk->thread.trap_no = trapnr;
d1895183 146
081f75bb
AH
147#ifdef CONFIG_X86_64
148 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
149 printk_ratelimit()) {
150 printk(KERN_INFO
151 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
152 tsk->comm, tsk->pid, str,
153 regs->ip, regs->sp, error_code);
154 print_vma_addr(" in ", regs->ip);
155 printk("\n");
156 }
157#endif
158
b5964405
IM
159 if (info)
160 force_sig_info(signr, info, tsk);
161 else
162 force_sig(signr, tsk);
163 return;
1da177e4 164
b5964405
IM
165kernel_trap:
166 if (!fixup_exception(regs)) {
167 tsk->thread.error_code = error_code;
168 tsk->thread.trap_no = trapnr;
169 die(str, regs, error_code);
1da177e4 170 }
b5964405 171 return;
1da177e4 172
081f75bb 173#ifdef CONFIG_X86_32
b5964405
IM
174vm86_trap:
175 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
176 error_code, trapnr))
177 goto trap_signal;
178 return;
081f75bb 179#endif
1da177e4
LT
180}
181
b5964405 182#define DO_ERROR(trapnr, signr, str, name) \
e407d620 183dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
184{ \
185 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 186 == NOTIFY_STOP) \
b5964405 187 return; \
61aef7d2 188 conditional_sti(regs); \
3c1326f8 189 do_trap(trapnr, signr, str, regs, error_code, NULL); \
1da177e4
LT
190}
191
3c1326f8 192#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 193dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
194{ \
195 siginfo_t info; \
196 info.si_signo = signr; \
197 info.si_errno = 0; \
198 info.si_code = sicode; \
199 info.si_addr = (void __user *)siaddr; \
b5964405 200 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 201 == NOTIFY_STOP) \
b5964405 202 return; \
61aef7d2 203 conditional_sti(regs); \
3c1326f8 204 do_trap(trapnr, signr, str, regs, error_code, &info); \
1da177e4
LT
205}
206
3c1326f8
AH
207DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
208DO_ERROR(4, SIGSEGV, "overflow", overflow)
209DO_ERROR(5, SIGSEGV, "bounds", bounds)
210DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
51bc1ed6 211DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
6bf77bf9 212DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
36d936c7 213DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
081f75bb 214#ifdef CONFIG_X86_32
f5ca8187 215DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
081f75bb 216#endif
3c1326f8 217DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
1da177e4 218
081f75bb
AH
219#ifdef CONFIG_X86_64
220/* Runs on IST stack */
221dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
222{
223 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
224 12, SIGBUS) == NOTIFY_STOP)
225 return;
226 preempt_conditional_sti(regs);
227 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
228 preempt_conditional_cli(regs);
229}
230
231dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
232{
233 static const char str[] = "double fault";
234 struct task_struct *tsk = current;
235
236 /* Return not checked because double check cannot be ignored */
237 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
238
239 tsk->thread.error_code = error_code;
240 tsk->thread.trap_no = 8;
241
bd8b96df
IM
242 /*
243 * This is always a kernel trap and never fixable (and thus must
244 * never return).
245 */
081f75bb
AH
246 for (;;)
247 die(str, regs, error_code);
248}
249#endif
250
e407d620 251dotraplinkage void __kprobes
13485ab5 252do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 253{
13485ab5 254 struct task_struct *tsk;
b5964405 255
c6df0d71
AH
256 conditional_sti(regs);
257
081f75bb 258#ifdef CONFIG_X86_32
6b6891f9 259 if (regs->flags & X86_VM_MASK)
1da177e4 260 goto gp_in_vm86;
081f75bb 261#endif
1da177e4 262
13485ab5 263 tsk = current;
717b594a 264 if (!user_mode(regs))
1da177e4
LT
265 goto gp_in_kernel;
266
13485ab5
AH
267 tsk->thread.error_code = error_code;
268 tsk->thread.trap_no = 13;
b5964405 269
13485ab5
AH
270 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
271 printk_ratelimit()) {
abd4f750 272 printk(KERN_INFO
13485ab5
AH
273 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
274 tsk->comm, task_pid_nr(tsk),
275 regs->ip, regs->sp, error_code);
03252919
AK
276 print_vma_addr(" in ", regs->ip);
277 printk("\n");
278 }
abd4f750 279
13485ab5 280 force_sig(SIGSEGV, tsk);
1da177e4
LT
281 return;
282
081f75bb 283#ifdef CONFIG_X86_32
1da177e4
LT
284gp_in_vm86:
285 local_irq_enable();
286 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
287 return;
081f75bb 288#endif
1da177e4
LT
289
290gp_in_kernel:
13485ab5
AH
291 if (fixup_exception(regs))
292 return;
293
294 tsk->thread.error_code = error_code;
295 tsk->thread.trap_no = 13;
296 if (notify_die(DIE_GPF, "general protection fault", regs,
1da177e4 297 error_code, 13, SIGSEGV) == NOTIFY_STOP)
13485ab5
AH
298 return;
299 die("general protection fault", regs, error_code);
1da177e4
LT
300}
301
5deb45e3 302static notrace __kprobes void
b5964405 303mem_parity_error(unsigned char reason, struct pt_regs *regs)
1da177e4 304{
b5964405
IM
305 printk(KERN_EMERG
306 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
307 reason, smp_processor_id());
308
309 printk(KERN_EMERG
310 "You have some hardware problem, likely on the PCI bus.\n");
c0d12172
DJ
311
312#if defined(CONFIG_EDAC)
b5964405 313 if (edac_handler_set()) {
c0d12172
DJ
314 edac_atomic_assert_error();
315 return;
316 }
317#endif
318
8da5adda 319 if (panic_on_unrecovered_nmi)
b5964405 320 panic("NMI: Not continuing");
1da177e4 321
c41c5cd3 322 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
323
324 /* Clear and disable the memory parity error line. */
7970479c
AH
325 reason = (reason & 0xf) | 4;
326 outb(reason, 0x61);
1da177e4
LT
327}
328
5deb45e3 329static notrace __kprobes void
b5964405 330io_check_error(unsigned char reason, struct pt_regs *regs)
1da177e4
LT
331{
332 unsigned long i;
333
9c107805 334 printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
1da177e4
LT
335 show_registers(regs);
336
5211a242
KG
337 if (panic_on_io_nmi)
338 panic("NMI IOCK error: Not continuing");
339
1da177e4
LT
340 /* Re-enable the IOCK line, wait for a few seconds */
341 reason = (reason & 0xf) | 8;
342 outb(reason, 0x61);
b5964405 343
1da177e4 344 i = 2000;
b5964405
IM
345 while (--i)
346 udelay(1000);
347
1da177e4
LT
348 reason &= ~8;
349 outb(reason, 0x61);
350}
351
5deb45e3 352static notrace __kprobes void
b5964405 353unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
1da177e4 354{
c1d518c8
AH
355 if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
356 NOTIFY_STOP)
d3597524 357 return;
1da177e4 358#ifdef CONFIG_MCA
b5964405
IM
359 /*
360 * Might actually be able to figure out what the guilty party
361 * is:
362 */
363 if (MCA_bus) {
1da177e4
LT
364 mca_handle_nmi();
365 return;
366 }
367#endif
b5964405
IM
368 printk(KERN_EMERG
369 "Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
370 reason, smp_processor_id());
371
c41c5cd3 372 printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
8da5adda 373 if (panic_on_unrecovered_nmi)
b5964405 374 panic("NMI: Not continuing");
8da5adda 375
c41c5cd3 376 printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
1da177e4
LT
377}
378
5deb45e3 379static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
1da177e4
LT
380{
381 unsigned char reason = 0;
abd34807
AH
382 int cpu;
383
384 cpu = smp_processor_id();
1da177e4 385
abd34807
AH
386 /* Only the BSP gets external NMIs from the system. */
387 if (!cpu)
1da177e4 388 reason = get_nmi_reason();
b5964405 389
1da177e4 390 if (!(reason & 0xc0)) {
20c0d2d4 391 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
a8c1be9d 392 == NOTIFY_STOP)
1da177e4
LT
393 return;
394#ifdef CONFIG_X86_LOCAL_APIC
395 /*
396 * Ok, so this is none of the documented NMI sources,
397 * so it must be the NMI watchdog.
398 */
3adbbcce 399 if (nmi_watchdog_tick(regs, reason))
1da177e4 400 return;
abd34807 401 if (!do_nmi_callback(regs, cpu))
3adbbcce 402 unknown_nmi_error(reason, regs);
b5964405
IM
403#else
404 unknown_nmi_error(reason, regs);
405#endif
2fbe7b25 406
1da177e4
LT
407 return;
408 }
20c0d2d4 409 if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
1da177e4 410 return;
a8c1be9d
AH
411
412 /* AK: following checks seem to be broken on modern chipsets. FIXME */
1da177e4
LT
413 if (reason & 0x80)
414 mem_parity_error(reason, regs);
415 if (reason & 0x40)
416 io_check_error(reason, regs);
081f75bb 417#ifdef CONFIG_X86_32
1da177e4
LT
418 /*
419 * Reassert NMI in case it became active meanwhile
b5964405 420 * as it's edge-triggered:
1da177e4
LT
421 */
422 reassert_nmi();
081f75bb 423#endif
1da177e4
LT
424}
425
e407d620
AH
426dotraplinkage notrace __kprobes void
427do_nmi(struct pt_regs *regs, long error_code)
1da177e4 428{
1da177e4
LT
429 nmi_enter();
430
915b0d01 431 inc_irq_stat(__nmi_count);
1da177e4 432
8f4e956b
AK
433 if (!ignore_nmis)
434 default_do_nmi(regs);
1da177e4
LT
435
436 nmi_exit();
437}
438
8f4e956b
AK
439void stop_nmi(void)
440{
441 acpi_nmi_disable();
442 ignore_nmis++;
443}
444
445void restart_nmi(void)
446{
447 ignore_nmis--;
448 acpi_nmi_enable();
449}
450
c1d518c8 451/* May run on IST stack. */
e407d620 452dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
1da177e4 453{
b94da1e4 454#ifdef CONFIG_KPROBES
1da177e4
LT
455 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
456 == NOTIFY_STOP)
48c88211 457 return;
b94da1e4
AH
458#else
459 if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
460 == NOTIFY_STOP)
461 return;
462#endif
b5964405 463
4915a35e 464 preempt_conditional_sti(regs);
3c1326f8 465 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 466 preempt_conditional_cli(regs);
1da177e4 467}
1da177e4 468
081f75bb 469#ifdef CONFIG_X86_64
bd8b96df
IM
470/*
471 * Help handler running on IST stack to switch back to user stack
472 * for scheduling or signal handling. The actual stack switch is done in
473 * entry.S
474 */
081f75bb
AH
475asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
476{
477 struct pt_regs *regs = eregs;
478 /* Did already sync */
479 if (eregs == (struct pt_regs *)eregs->sp)
480 ;
481 /* Exception from user space */
482 else if (user_mode(eregs))
483 regs = task_pt_regs(current);
bd8b96df
IM
484 /*
485 * Exception from kernel and interrupts are enabled. Move to
486 * kernel process stack.
487 */
081f75bb
AH
488 else if (eregs->flags & X86_EFLAGS_IF)
489 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
490 if (eregs != regs)
491 *regs = *eregs;
492 return regs;
493}
494#endif
495
1da177e4
LT
496/*
497 * Our handling of the processor debug registers is non-trivial.
498 * We do not clear them on entry and exit from the kernel. Therefore
499 * it is possible to get a watchpoint trap here from inside the kernel.
500 * However, the code in ./ptrace.c has ensured that the user can
501 * only set watchpoints on userspace addresses. Therefore the in-kernel
502 * watchpoint trap can only occur in code which is reading/writing
503 * from user space. Such code must not hold kernel locks (since it
504 * can equally take a page fault), therefore it is safe to call
505 * force_sig_info even though that claims and releases locks.
b5964405 506 *
1da177e4
LT
507 * Code in ./signal.c ensures that the debug control register
508 * is restored before we deliver any signal, and therefore that
509 * user code runs with the correct debug control register even though
510 * we clear it here.
511 *
512 * Being careful here means that we don't have to be as careful in a
513 * lot of more complicated places (task switching can be a bit lazy
514 * about restoring all the debug state, and ptrace doesn't have to
515 * find every occurrence of the TF bit that could be saved away even
516 * by user code)
c1d518c8
AH
517 *
518 * May run on IST stack.
1da177e4 519 */
e407d620 520dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 521{
1da177e4 522 struct task_struct *tsk = current;
08d68323 523 unsigned long dr6;
da654b74 524 int si_code;
1da177e4 525
08d68323 526 get_debugreg(dr6, 6);
1da177e4 527
40f9249a
P
528 /* Filter out all the reserved bits which are preset to 1 */
529 dr6 &= ~DR6_RESERVED;
530
f8561296 531 /* Catch kmemcheck conditions first of all! */
eadb8a09 532 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
f8561296
VN
533 return;
534
08d68323
P
535 /* DR6 may or may not be cleared by the CPU */
536 set_debugreg(0, 6);
10faa81e
RM
537 /*
538 * The processor cleared BTF, so don't mark that we need it set.
539 */
540 clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR);
541 tsk->thread.debugctlmsr = 0;
542
08d68323
P
543 /* Store the virtualized DR6 value */
544 tsk->thread.debugreg6 = dr6;
545
62edab90
P
546 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
547 SIGTRAP) == NOTIFY_STOP)
1da177e4 548 return;
3d2a71a5 549
1da177e4 550 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 551 preempt_conditional_sti(regs);
1da177e4 552
08d68323
P
553 if (regs->flags & X86_VM_MASK) {
554 handle_vm86_trap((struct kernel_vm86_regs *) regs,
555 error_code, 1);
556 return;
1da177e4
LT
557 }
558
1da177e4 559 /*
08d68323
P
560 * Single-stepping through system calls: ignore any exceptions in
561 * kernel space, but re-enable TF when returning to user mode.
562 *
563 * We already checked v86 mode above, so we can check for kernel mode
564 * by just checking the CPL of CS.
1da177e4 565 */
08d68323
P
566 if ((dr6 & DR_STEP) && !user_mode(regs)) {
567 tsk->thread.debugreg6 &= ~DR_STEP;
568 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
569 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 570 }
08d68323
P
571 si_code = get_si_code(tsk->thread.debugreg6);
572 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS))
573 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 574 preempt_conditional_cli(regs);
1da177e4 575
1da177e4
LT
576 return;
577}
578
081f75bb
AH
579#ifdef CONFIG_X86_64
580static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
581{
582 if (fixup_exception(regs))
583 return 1;
584
585 notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE);
586 /* Illegal floating point operation in the kernel */
587 current->thread.trap_no = trapnr;
588 die(str, regs, 0);
589 return 0;
590}
591#endif
592
1da177e4
LT
593/*
594 * Note that we play around with the 'TS' bit in an attempt to get
595 * the correct behaviour even in the presence of the asynchronous
596 * IRQ13 behaviour
597 */
65ea5b03 598void math_error(void __user *ip)
1da177e4 599{
b5964405 600 struct task_struct *task;
1da177e4 601 siginfo_t info;
adf77bac 602 unsigned short cwd, swd, err;
1da177e4
LT
603
604 /*
605 * Save the info for the exception handler and clear the error.
606 */
607 task = current;
608 save_init_fpu(task);
609 task->thread.trap_no = 16;
610 task->thread.error_code = 0;
611 info.si_signo = SIGFPE;
612 info.si_errno = 0;
65ea5b03 613 info.si_addr = ip;
1da177e4
LT
614 /*
615 * (~cwd & swd) will mask out exceptions that are not set to unmasked
616 * status. 0x3f is the exception bits in these regs, 0x200 is the
617 * C1 reg you need in case of a stack fault, 0x040 is the stack
618 * fault bit. We should only be taking one exception at a time,
619 * so if this combination doesn't produce any single exception,
a8c1be9d 620 * then we have a bad program that isn't synchronizing its FPU usage
1da177e4
LT
621 * and it will suffer the consequences since we won't be able to
622 * fully reproduce the context of the exception
623 */
624 cwd = get_fpu_cwd(task);
625 swd = get_fpu_swd(task);
adf77bac 626
a73ad333 627 err = swd & ~cwd;
adf77bac
PA
628
629 if (err & 0x001) { /* Invalid op */
b5964405
IM
630 /*
631 * swd & 0x240 == 0x040: Stack Underflow
632 * swd & 0x240 == 0x240: Stack Overflow
633 * User must clear the SF bit (0x40) if set
634 */
635 info.si_code = FPE_FLTINV;
adf77bac 636 } else if (err & 0x004) { /* Divide by Zero */
b5964405 637 info.si_code = FPE_FLTDIV;
adf77bac 638 } else if (err & 0x008) { /* Overflow */
b5964405 639 info.si_code = FPE_FLTOVF;
adf77bac
PA
640 } else if (err & 0x012) { /* Denormal, Underflow */
641 info.si_code = FPE_FLTUND;
642 } else if (err & 0x020) { /* Precision */
b5964405 643 info.si_code = FPE_FLTRES;
adf77bac 644 } else {
bd8b96df
IM
645 /*
646 * If we're using IRQ 13, or supposedly even some trap 16
647 * implementations, it's possible we get a spurious trap...
648 */
a73ad333 649 return; /* Spurious trap, no error */
1da177e4
LT
650 }
651 force_sig_info(SIGFPE, &info, task);
652}
653
e407d620 654dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 655{
252d28fe 656 conditional_sti(regs);
081f75bb
AH
657
658#ifdef CONFIG_X86_32
1da177e4 659 ignore_fpu_irq = 1;
081f75bb
AH
660#else
661 if (!user_mode(regs) &&
662 kernel_math_error(regs, "kernel x87 math error", 16))
663 return;
664#endif
665
65ea5b03 666 math_error((void __user *)regs->ip);
1da177e4
LT
667}
668
65ea5b03 669static void simd_math_error(void __user *ip)
1da177e4 670{
b5964405 671 struct task_struct *task;
b5964405 672 siginfo_t info;
7b4fd4bb 673 unsigned short mxcsr;
1da177e4
LT
674
675 /*
676 * Save the info for the exception handler and clear the error.
677 */
678 task = current;
679 save_init_fpu(task);
680 task->thread.trap_no = 19;
681 task->thread.error_code = 0;
682 info.si_signo = SIGFPE;
683 info.si_errno = 0;
684 info.si_code = __SI_FAULT;
65ea5b03 685 info.si_addr = ip;
1da177e4
LT
686 /*
687 * The SIMD FPU exceptions are handled a little differently, as there
688 * is only a single status/control register. Thus, to determine which
689 * unmasked exception was caught we must mask the exception mask bits
690 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
691 */
692 mxcsr = get_fpu_mxcsr(task);
693 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
b5964405
IM
694 case 0x000:
695 default:
696 break;
697 case 0x001: /* Invalid Op */
698 info.si_code = FPE_FLTINV;
699 break;
700 case 0x002: /* Denormalize */
701 case 0x010: /* Underflow */
702 info.si_code = FPE_FLTUND;
703 break;
704 case 0x004: /* Zero Divide */
705 info.si_code = FPE_FLTDIV;
706 break;
707 case 0x008: /* Overflow */
708 info.si_code = FPE_FLTOVF;
709 break;
710 case 0x020: /* Precision */
711 info.si_code = FPE_FLTRES;
712 break;
1da177e4
LT
713 }
714 force_sig_info(SIGFPE, &info, task);
715}
716
e407d620
AH
717dotraplinkage void
718do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 719{
b939bde2
AH
720 conditional_sti(regs);
721
081f75bb 722#ifdef CONFIG_X86_32
40d2e763 723 ignore_fpu_irq = 1;
081f75bb
AH
724#else
725 if (!user_mode(regs) &&
726 kernel_math_error(regs, "kernel simd math error", 19))
727 return;
081f75bb 728#endif
40d2e763
BG
729
730 simd_math_error((void __user *)regs->ip);
1da177e4
LT
731}
732
e407d620
AH
733dotraplinkage void
734do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 735{
cf81978d 736 conditional_sti(regs);
1da177e4
LT
737#if 0
738 /* No need to warn about this any longer. */
b5964405 739 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
740#endif
741}
742
081f75bb 743asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 744{
1da177e4 745}
4efc0670 746
7856f6cc 747asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
748{
749}
750
e6e9cac8
JF
751/*
752 * __math_state_restore assumes that cr0.TS is already clear and the
753 * fpu state is all ready for use. Used during context switch.
754 */
755void __math_state_restore(void)
081f75bb 756{
e6e9cac8
JF
757 struct thread_info *thread = current_thread_info();
758 struct task_struct *tsk = thread->task;
759
760 /*
761 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
762 */
763 if (unlikely(restore_fpu_checking(tsk))) {
764 stts();
765 force_sig(SIGSEGV, tsk);
766 return;
767 }
768
769 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
770 tsk->fpu_counter++;
081f75bb 771}
1da177e4
LT
772
773/*
b5964405 774 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
775 * old math state array, and gets the new ones from the current task
776 *
777 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
778 * Don't touch unless you *really* know how it works.
779 *
780 * Must be called with kernel preemption disabled (in this case,
781 * local interrupts are disabled at the call-site in entry.S).
782 */
acc20761 783asmlinkage void math_state_restore(void)
1da177e4
LT
784{
785 struct thread_info *thread = current_thread_info();
786 struct task_struct *tsk = thread->task;
787
aa283f49
SS
788 if (!tsk_used_math(tsk)) {
789 local_irq_enable();
790 /*
791 * does a slab alloc which can sleep
792 */
793 if (init_fpu(tsk)) {
794 /*
795 * ran out of memory!
796 */
797 do_group_exit(SIGKILL);
798 return;
799 }
800 local_irq_disable();
801 }
802
b5964405 803 clts(); /* Allow maths ops (or we recurse) */
fcb2ac5b 804
e6e9cac8 805 __math_state_restore();
1da177e4 806}
5992b6da 807EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4
LT
808
809#ifndef CONFIG_MATH_EMULATION
d315760f 810void math_emulate(struct math_emu_info *info)
1da177e4 811{
b5964405
IM
812 printk(KERN_EMERG
813 "math-emulation not enabled and no coprocessor found.\n");
814 printk(KERN_EMERG "killing %s.\n", current->comm);
815 force_sig(SIGFPE, current);
1da177e4
LT
816 schedule();
817}
1da177e4
LT
818#endif /* CONFIG_MATH_EMULATION */
819
e407d620 820dotraplinkage void __kprobes
aa78bcfa 821do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 822{
081f75bb 823#ifdef CONFIG_X86_32
7643e9b9 824 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
825 struct math_emu_info info = { };
826
7643e9b9 827 conditional_sti(regs);
d315760f 828
aa78bcfa 829 info.regs = regs;
d315760f 830 math_emulate(&info);
7643e9b9
AH
831 } else {
832 math_state_restore(); /* interrupts still off */
833 conditional_sti(regs);
834 }
081f75bb
AH
835#else
836 math_state_restore();
837#endif
7643e9b9
AH
838}
839
081f75bb 840#ifdef CONFIG_X86_32
e407d620 841dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
842{
843 siginfo_t info;
844 local_irq_enable();
845
846 info.si_signo = SIGILL;
847 info.si_errno = 0;
848 info.si_code = ILL_BADSTK;
fc6fcdfb 849 info.si_addr = NULL;
f8e0870f
AH
850 if (notify_die(DIE_TRAP, "iret exception",
851 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
852 return;
3c1326f8 853 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
f8e0870f 854}
081f75bb 855#endif
f8e0870f 856
1da177e4
LT
857void __init trap_init(void)
858{
dbeb2be2
RR
859 int i;
860
1da177e4 861#ifdef CONFIG_EISA
927222b1 862 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
863
864 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 865 EISA_bus = 1;
927222b1 866 early_iounmap(p, 4);
1da177e4
LT
867#endif
868
976382dc 869 set_intr_gate(0, &divide_error);
699d2937
AH
870 set_intr_gate_ist(1, &debug, DEBUG_STACK);
871 set_intr_gate_ist(2, &nmi, NMI_STACK);
872 /* int3 can be called from all */
873 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
874 /* int4 can be called from all */
875 set_system_intr_gate(4, &overflow);
64f644c0 876 set_intr_gate(5, &bounds);
12394cf5 877 set_intr_gate(6, &invalid_op);
7643e9b9 878 set_intr_gate(7, &device_not_available);
081f75bb 879#ifdef CONFIG_X86_32
a8c1be9d 880 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb
AH
881#else
882 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
883#endif
51bc1ed6 884 set_intr_gate(9, &coprocessor_segment_overrun);
6bf77bf9 885 set_intr_gate(10, &invalid_TSS);
36d936c7 886 set_intr_gate(11, &segment_not_present);
699d2937 887 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
c6df0d71 888 set_intr_gate(13, &general_protection);
b5964405 889 set_intr_gate(14, &page_fault);
cf81978d 890 set_intr_gate(15, &spurious_interrupt_bug);
252d28fe 891 set_intr_gate(16, &coprocessor_error);
5feedfd4 892 set_intr_gate(17, &alignment_check);
1da177e4 893#ifdef CONFIG_X86_MCE
699d2937 894 set_intr_gate_ist(18, &machine_check, MCE_STACK);
1da177e4 895#endif
b939bde2 896 set_intr_gate(19, &simd_coprocessor_error);
1da177e4 897
bb3f0b59
YL
898 /* Reserve all the builtin and the syscall vector: */
899 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
900 set_bit(i, used_vectors);
901
081f75bb
AH
902#ifdef CONFIG_IA32_EMULATION
903 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 904 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
905#endif
906
907#ifdef CONFIG_X86_32
d43c6e80 908 if (cpu_has_fxsr) {
d43c6e80
JB
909 printk(KERN_INFO "Enabling fast FPU save and restore... ");
910 set_in_cr4(X86_CR4_OSFXSR);
911 printk("done.\n");
912 }
913 if (cpu_has_xmm) {
b5964405
IM
914 printk(KERN_INFO
915 "Enabling unmasked SIMD FPU exception support... ");
d43c6e80
JB
916 set_in_cr4(X86_CR4_OSXMMEXCPT);
917 printk("done.\n");
918 }
919
699d2937 920 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 921 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 922#endif
bb3f0b59 923
1da177e4 924 /*
b5964405 925 * Should be a barrier for any external CPU state:
1da177e4
LT
926 */
927 cpu_init();
928
428cf902 929 x86_init.irqs.trap_init();
1da177e4 930}