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1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
b5964405
IM
12#include <linux/interrupt.h>
13#include <linux/kallsyms.h>
14#include <linux/spinlock.h>
b5964405
IM
15#include <linux/kprobes.h>
16#include <linux/uaccess.h>
b5964405 17#include <linux/kdebug.h>
f503b5ae 18#include <linux/kgdb.h>
1da177e4 19#include <linux/kernel.h>
b5964405
IM
20#include <linux/module.h>
21#include <linux/ptrace.h>
1da177e4 22#include <linux/string.h>
b5964405 23#include <linux/delay.h>
1da177e4 24#include <linux/errno.h>
b5964405
IM
25#include <linux/kexec.h>
26#include <linux/sched.h>
1da177e4 27#include <linux/timer.h>
1da177e4 28#include <linux/init.h>
91768d6c 29#include <linux/bug.h>
b5964405
IM
30#include <linux/nmi.h>
31#include <linux/mm.h>
c1d518c8
AH
32#include <linux/smp.h>
33#include <linux/io.h>
1da177e4
LT
34
35#ifdef CONFIG_EISA
36#include <linux/ioport.h>
37#include <linux/eisa.h>
38#endif
39
40#ifdef CONFIG_MCA
41#include <linux/mca.h>
42#endif
43
c0d12172
DJ
44#if defined(CONFIG_EDAC)
45#include <linux/edac.h>
46#endif
47
f8561296 48#include <asm/kmemcheck.h>
b5964405 49#include <asm/stacktrace.h>
1da177e4 50#include <asm/processor.h>
1da177e4 51#include <asm/debugreg.h>
60063497 52#include <linux/atomic.h>
b5964405 53#include <asm/system.h>
c1d518c8 54#include <asm/traps.h>
1da177e4
LT
55#include <asm/desc.h>
56#include <asm/i387.h>
9e55e44e 57#include <asm/mce.h>
c1d518c8 58
1164dd00 59#include <asm/mach_traps.h>
c1d518c8 60
081f75bb 61#ifdef CONFIG_X86_64
428cf902 62#include <asm/x86_init.h>
081f75bb
AH
63#include <asm/pgalloc.h>
64#include <asm/proto.h>
081f75bb 65#else
c1d518c8 66#include <asm/processor-flags.h>
8e6dafd6 67#include <asm/setup.h>
1da177e4 68
1da177e4
LT
69asmlinkage int system_call(void);
70
1da177e4 71/* Do we ignore FPU interrupts ? */
b5964405 72char ignore_fpu_irq;
1da177e4
LT
73
74/*
75 * The IDT has to be page-aligned to simplify the Pentium
07e81d61 76 * F0 0F bug workaround.
1da177e4 77 */
07e81d61 78gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
081f75bb 79#endif
1da177e4 80
b77b881f
YL
81DECLARE_BITMAP(used_vectors, NR_VECTORS);
82EXPORT_SYMBOL_GPL(used_vectors);
83
762db434
AH
84static inline void conditional_sti(struct pt_regs *regs)
85{
86 if (regs->flags & X86_EFLAGS_IF)
87 local_irq_enable();
88}
89
3d2a71a5
AH
90static inline void preempt_conditional_sti(struct pt_regs *regs)
91{
92 inc_preempt_count();
93 if (regs->flags & X86_EFLAGS_IF)
94 local_irq_enable();
95}
96
be716615
TG
97static inline void conditional_cli(struct pt_regs *regs)
98{
99 if (regs->flags & X86_EFLAGS_IF)
100 local_irq_disable();
101}
102
3d2a71a5
AH
103static inline void preempt_conditional_cli(struct pt_regs *regs)
104{
105 if (regs->flags & X86_EFLAGS_IF)
106 local_irq_disable();
107 dec_preempt_count();
108}
109
b5964405 110static void __kprobes
3c1326f8 111do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
b5964405 112 long error_code, siginfo_t *info)
1da177e4 113{
4f339ecb 114 struct task_struct *tsk = current;
4f339ecb 115
081f75bb 116#ifdef CONFIG_X86_32
6b6891f9 117 if (regs->flags & X86_VM_MASK) {
3c1326f8
AH
118 /*
119 * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
120 * On nmi (interrupt 2), do_trap should not be called.
121 */
122 if (trapnr < 6)
1da177e4
LT
123 goto vm86_trap;
124 goto trap_signal;
125 }
081f75bb 126#endif
1da177e4 127
717b594a 128 if (!user_mode(regs))
1da177e4
LT
129 goto kernel_trap;
130
081f75bb 131#ifdef CONFIG_X86_32
b5964405 132trap_signal:
081f75bb 133#endif
b5964405
IM
134 /*
135 * We want error_code and trap_no set for userspace faults and
136 * kernelspace faults which result in die(), but not
137 * kernelspace faults which are fixed up. die() gives the
138 * process no chance to handle the signal and notice the
139 * kernel fault information, so that won't result in polluting
140 * the information about previously queued, but not yet
141 * delivered, faults. See also do_general_protection below.
142 */
143 tsk->thread.error_code = error_code;
144 tsk->thread.trap_no = trapnr;
d1895183 145
081f75bb
AH
146#ifdef CONFIG_X86_64
147 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
148 printk_ratelimit()) {
149 printk(KERN_INFO
150 "%s[%d] trap %s ip:%lx sp:%lx error:%lx",
151 tsk->comm, tsk->pid, str,
152 regs->ip, regs->sp, error_code);
153 print_vma_addr(" in ", regs->ip);
154 printk("\n");
155 }
156#endif
157
b5964405
IM
158 if (info)
159 force_sig_info(signr, info, tsk);
160 else
161 force_sig(signr, tsk);
162 return;
1da177e4 163
b5964405
IM
164kernel_trap:
165 if (!fixup_exception(regs)) {
166 tsk->thread.error_code = error_code;
167 tsk->thread.trap_no = trapnr;
168 die(str, regs, error_code);
1da177e4 169 }
b5964405 170 return;
1da177e4 171
081f75bb 172#ifdef CONFIG_X86_32
b5964405
IM
173vm86_trap:
174 if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
175 error_code, trapnr))
176 goto trap_signal;
177 return;
081f75bb 178#endif
1da177e4
LT
179}
180
b5964405 181#define DO_ERROR(trapnr, signr, str, name) \
e407d620 182dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
183{ \
184 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 185 == NOTIFY_STOP) \
b5964405 186 return; \
61aef7d2 187 conditional_sti(regs); \
3c1326f8 188 do_trap(trapnr, signr, str, regs, error_code, NULL); \
1da177e4
LT
189}
190
3c1326f8 191#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
e407d620 192dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405
IM
193{ \
194 siginfo_t info; \
195 info.si_signo = signr; \
196 info.si_errno = 0; \
197 info.si_code = sicode; \
198 info.si_addr = (void __user *)siaddr; \
b5964405 199 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
a8c1be9d 200 == NOTIFY_STOP) \
b5964405 201 return; \
61aef7d2 202 conditional_sti(regs); \
3c1326f8 203 do_trap(trapnr, signr, str, regs, error_code, &info); \
1da177e4
LT
204}
205
3c1326f8
AH
206DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
207DO_ERROR(4, SIGSEGV, "overflow", overflow)
208DO_ERROR(5, SIGSEGV, "bounds", bounds)
209DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
51bc1ed6 210DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
6bf77bf9 211DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
36d936c7 212DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
081f75bb 213#ifdef CONFIG_X86_32
f5ca8187 214DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
081f75bb 215#endif
3c1326f8 216DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
1da177e4 217
081f75bb
AH
218#ifdef CONFIG_X86_64
219/* Runs on IST stack */
220dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
221{
222 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
223 12, SIGBUS) == NOTIFY_STOP)
224 return;
225 preempt_conditional_sti(regs);
226 do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
227 preempt_conditional_cli(regs);
228}
229
230dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
231{
232 static const char str[] = "double fault";
233 struct task_struct *tsk = current;
234
235 /* Return not checked because double check cannot be ignored */
236 notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
237
238 tsk->thread.error_code = error_code;
239 tsk->thread.trap_no = 8;
240
bd8b96df
IM
241 /*
242 * This is always a kernel trap and never fixable (and thus must
243 * never return).
244 */
081f75bb
AH
245 for (;;)
246 die(str, regs, error_code);
247}
248#endif
249
e407d620 250dotraplinkage void __kprobes
13485ab5 251do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 252{
13485ab5 253 struct task_struct *tsk;
b5964405 254
c6df0d71
AH
255 conditional_sti(regs);
256
081f75bb 257#ifdef CONFIG_X86_32
6b6891f9 258 if (regs->flags & X86_VM_MASK)
1da177e4 259 goto gp_in_vm86;
081f75bb 260#endif
1da177e4 261
13485ab5 262 tsk = current;
717b594a 263 if (!user_mode(regs))
1da177e4
LT
264 goto gp_in_kernel;
265
13485ab5
AH
266 tsk->thread.error_code = error_code;
267 tsk->thread.trap_no = 13;
b5964405 268
13485ab5
AH
269 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
270 printk_ratelimit()) {
abd4f750 271 printk(KERN_INFO
13485ab5
AH
272 "%s[%d] general protection ip:%lx sp:%lx error:%lx",
273 tsk->comm, task_pid_nr(tsk),
274 regs->ip, regs->sp, error_code);
03252919
AK
275 print_vma_addr(" in ", regs->ip);
276 printk("\n");
277 }
abd4f750 278
13485ab5 279 force_sig(SIGSEGV, tsk);
1da177e4
LT
280 return;
281
081f75bb 282#ifdef CONFIG_X86_32
1da177e4
LT
283gp_in_vm86:
284 local_irq_enable();
285 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
286 return;
081f75bb 287#endif
1da177e4
LT
288
289gp_in_kernel:
13485ab5
AH
290 if (fixup_exception(regs))
291 return;
292
293 tsk->thread.error_code = error_code;
294 tsk->thread.trap_no = 13;
295 if (notify_die(DIE_GPF, "general protection fault", regs,
1da177e4 296 error_code, 13, SIGSEGV) == NOTIFY_STOP)
13485ab5
AH
297 return;
298 die("general protection fault", regs, error_code);
1da177e4
LT
299}
300
c1d518c8 301/* May run on IST stack. */
e407d620 302dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
1da177e4 303{
f503b5ae
JW
304#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
305 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
306 == NOTIFY_STOP)
307 return;
308#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 309
1da177e4
LT
310 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
311 == NOTIFY_STOP)
48c88211 312 return;
b5964405 313
42181186
SR
314 /*
315 * Let others (NMI) know that the debug stack is in use
316 * as we may switch to the interrupt stack.
317 */
318 debug_stack_usage_inc();
4915a35e 319 preempt_conditional_sti(regs);
3c1326f8 320 do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 321 preempt_conditional_cli(regs);
42181186 322 debug_stack_usage_dec();
1da177e4 323}
1da177e4 324
081f75bb 325#ifdef CONFIG_X86_64
bd8b96df
IM
326/*
327 * Help handler running on IST stack to switch back to user stack
328 * for scheduling or signal handling. The actual stack switch is done in
329 * entry.S
330 */
081f75bb
AH
331asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
332{
333 struct pt_regs *regs = eregs;
334 /* Did already sync */
335 if (eregs == (struct pt_regs *)eregs->sp)
336 ;
337 /* Exception from user space */
338 else if (user_mode(eregs))
339 regs = task_pt_regs(current);
bd8b96df
IM
340 /*
341 * Exception from kernel and interrupts are enabled. Move to
342 * kernel process stack.
343 */
081f75bb
AH
344 else if (eregs->flags & X86_EFLAGS_IF)
345 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
346 if (eregs != regs)
347 *regs = *eregs;
348 return regs;
349}
350#endif
351
1da177e4
LT
352/*
353 * Our handling of the processor debug registers is non-trivial.
354 * We do not clear them on entry and exit from the kernel. Therefore
355 * it is possible to get a watchpoint trap here from inside the kernel.
356 * However, the code in ./ptrace.c has ensured that the user can
357 * only set watchpoints on userspace addresses. Therefore the in-kernel
358 * watchpoint trap can only occur in code which is reading/writing
359 * from user space. Such code must not hold kernel locks (since it
360 * can equally take a page fault), therefore it is safe to call
361 * force_sig_info even though that claims and releases locks.
b5964405 362 *
1da177e4
LT
363 * Code in ./signal.c ensures that the debug control register
364 * is restored before we deliver any signal, and therefore that
365 * user code runs with the correct debug control register even though
366 * we clear it here.
367 *
368 * Being careful here means that we don't have to be as careful in a
369 * lot of more complicated places (task switching can be a bit lazy
370 * about restoring all the debug state, and ptrace doesn't have to
371 * find every occurrence of the TF bit that could be saved away even
372 * by user code)
c1d518c8
AH
373 *
374 * May run on IST stack.
1da177e4 375 */
e407d620 376dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
1da177e4 377{
1da177e4 378 struct task_struct *tsk = current;
a1e80faf 379 int user_icebp = 0;
08d68323 380 unsigned long dr6;
da654b74 381 int si_code;
1da177e4 382
08d68323 383 get_debugreg(dr6, 6);
1da177e4 384
40f9249a
P
385 /* Filter out all the reserved bits which are preset to 1 */
386 dr6 &= ~DR6_RESERVED;
387
a1e80faf
FW
388 /*
389 * If dr6 has no reason to give us about the origin of this trap,
390 * then it's very likely the result of an icebp/int01 trap.
391 * User wants a sigtrap for that.
392 */
393 if (!dr6 && user_mode(regs))
394 user_icebp = 1;
395
f8561296 396 /* Catch kmemcheck conditions first of all! */
eadb8a09 397 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
f8561296
VN
398 return;
399
08d68323
P
400 /* DR6 may or may not be cleared by the CPU */
401 set_debugreg(0, 6);
10faa81e 402
ea8e61b7
PZ
403 /*
404 * The processor cleared BTF, so don't mark that we need it set.
405 */
406 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
407
08d68323
P
408 /* Store the virtualized DR6 value */
409 tsk->thread.debugreg6 = dr6;
410
62edab90
P
411 if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code,
412 SIGTRAP) == NOTIFY_STOP)
1da177e4 413 return;
3d2a71a5 414
42181186
SR
415 /*
416 * Let others (NMI) know that the debug stack is in use
417 * as we may switch to the interrupt stack.
418 */
419 debug_stack_usage_inc();
420
1da177e4 421 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 422 preempt_conditional_sti(regs);
1da177e4 423
08d68323
P
424 if (regs->flags & X86_VM_MASK) {
425 handle_vm86_trap((struct kernel_vm86_regs *) regs,
426 error_code, 1);
6554287b 427 preempt_conditional_cli(regs);
42181186 428 debug_stack_usage_dec();
08d68323 429 return;
1da177e4
LT
430 }
431
1da177e4 432 /*
08d68323
P
433 * Single-stepping through system calls: ignore any exceptions in
434 * kernel space, but re-enable TF when returning to user mode.
435 *
436 * We already checked v86 mode above, so we can check for kernel mode
437 * by just checking the CPL of CS.
1da177e4 438 */
08d68323
P
439 if ((dr6 & DR_STEP) && !user_mode(regs)) {
440 tsk->thread.debugreg6 &= ~DR_STEP;
441 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
442 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 443 }
08d68323 444 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 445 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 446 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 447 preempt_conditional_cli(regs);
42181186 448 debug_stack_usage_dec();
1da177e4 449
1da177e4
LT
450 return;
451}
452
453/*
454 * Note that we play around with the 'TS' bit in an attempt to get
455 * the correct behaviour even in the presence of the asynchronous
456 * IRQ13 behaviour
457 */
9b6dba9e 458void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 459{
e2e75c91 460 struct task_struct *task = current;
1da177e4 461 siginfo_t info;
9b6dba9e 462 unsigned short err;
e2e75c91
BG
463 char *str = (trapnr == 16) ? "fpu exception" : "simd exception";
464
465 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
466 return;
467 conditional_sti(regs);
468
469 if (!user_mode_vm(regs))
470 {
471 if (!fixup_exception(regs)) {
472 task->thread.error_code = error_code;
473 task->thread.trap_no = trapnr;
474 die(str, regs, error_code);
475 }
476 return;
477 }
1da177e4
LT
478
479 /*
480 * Save the info for the exception handler and clear the error.
481 */
1da177e4 482 save_init_fpu(task);
9b6dba9e
BG
483 task->thread.trap_no = trapnr;
484 task->thread.error_code = error_code;
1da177e4
LT
485 info.si_signo = SIGFPE;
486 info.si_errno = 0;
9b6dba9e
BG
487 info.si_addr = (void __user *)regs->ip;
488 if (trapnr == 16) {
489 unsigned short cwd, swd;
490 /*
491 * (~cwd & swd) will mask out exceptions that are not set to unmasked
492 * status. 0x3f is the exception bits in these regs, 0x200 is the
493 * C1 reg you need in case of a stack fault, 0x040 is the stack
494 * fault bit. We should only be taking one exception at a time,
495 * so if this combination doesn't produce any single exception,
496 * then we have a bad program that isn't synchronizing its FPU usage
497 * and it will suffer the consequences since we won't be able to
498 * fully reproduce the context of the exception
499 */
500 cwd = get_fpu_cwd(task);
501 swd = get_fpu_swd(task);
adf77bac 502
9b6dba9e
BG
503 err = swd & ~cwd;
504 } else {
505 /*
506 * The SIMD FPU exceptions are handled a little differently, as there
507 * is only a single status/control register. Thus, to determine which
508 * unmasked exception was caught we must mask the exception mask bits
509 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
510 */
511 unsigned short mxcsr = get_fpu_mxcsr(task);
512 err = ~(mxcsr >> 7) & mxcsr;
513 }
adf77bac
PA
514
515 if (err & 0x001) { /* Invalid op */
b5964405
IM
516 /*
517 * swd & 0x240 == 0x040: Stack Underflow
518 * swd & 0x240 == 0x240: Stack Overflow
519 * User must clear the SF bit (0x40) if set
520 */
521 info.si_code = FPE_FLTINV;
adf77bac 522 } else if (err & 0x004) { /* Divide by Zero */
b5964405 523 info.si_code = FPE_FLTDIV;
adf77bac 524 } else if (err & 0x008) { /* Overflow */
b5964405 525 info.si_code = FPE_FLTOVF;
adf77bac
PA
526 } else if (err & 0x012) { /* Denormal, Underflow */
527 info.si_code = FPE_FLTUND;
528 } else if (err & 0x020) { /* Precision */
b5964405 529 info.si_code = FPE_FLTRES;
adf77bac 530 } else {
bd8b96df
IM
531 /*
532 * If we're using IRQ 13, or supposedly even some trap 16
533 * implementations, it's possible we get a spurious trap...
534 */
a73ad333 535 return; /* Spurious trap, no error */
1da177e4
LT
536 }
537 force_sig_info(SIGFPE, &info, task);
538}
539
e407d620 540dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 541{
081f75bb 542#ifdef CONFIG_X86_32
1da177e4 543 ignore_fpu_irq = 1;
081f75bb
AH
544#endif
545
9b6dba9e 546 math_error(regs, error_code, 16);
1da177e4
LT
547}
548
e407d620
AH
549dotraplinkage void
550do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 551{
9b6dba9e 552 math_error(regs, error_code, 19);
1da177e4
LT
553}
554
e407d620
AH
555dotraplinkage void
556do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 557{
cf81978d 558 conditional_sti(regs);
1da177e4
LT
559#if 0
560 /* No need to warn about this any longer. */
b5964405 561 printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
562#endif
563}
564
081f75bb 565asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 566{
1da177e4 567}
4efc0670 568
7856f6cc 569asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
570{
571}
572
1da177e4 573/*
b5964405 574 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
575 * old math state array, and gets the new ones from the current task
576 *
577 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
578 * Don't touch unless you *really* know how it works.
579 *
be98c2cd
LT
580 * Must be called with kernel preemption disabled (eg with local
581 * local interrupts as in the case of do_device_not_available).
1da177e4 582 */
be98c2cd 583void math_state_restore(void)
1da177e4
LT
584{
585 struct thread_info *thread = current_thread_info();
586 struct task_struct *tsk = thread->task;
587
4903062b
LT
588 /* We need a safe address that is cheap to find and that is already
589 in L1. We just brought in "thread->task", so use that */
590#define safe_address (thread->task)
591
aa283f49
SS
592 if (!tsk_used_math(tsk)) {
593 local_irq_enable();
594 /*
595 * does a slab alloc which can sleep
596 */
597 if (init_fpu(tsk)) {
598 /*
599 * ran out of memory!
600 */
601 do_group_exit(SIGKILL);
602 return;
603 }
604 local_irq_disable();
605 }
606
b3b0870e 607 __thread_fpu_begin(thread);
fcb2ac5b 608
4903062b
LT
609 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
610 is pending. Clear the x87 state here by setting it to fixed
611 values. safe_address is a random variable that should be in L1 */
612 alternative_input(
613 ASM_NOP8 ASM_NOP2,
614 "emms\n\t" /* clear stack tags */
615 "fildl %P[addr]", /* set F?P to defined value */
616 X86_FEATURE_FXSAVE_LEAK,
617 [addr] "m" (safe_address));
618
b3b0870e
LT
619 /*
620 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
621 */
622 if (unlikely(restore_fpu_checking(tsk))) {
623 __thread_fpu_end(thread);
624 force_sig(SIGSEGV, tsk);
625 return;
626 }
627
628 tsk->fpu_counter++;
1da177e4 629}
5992b6da 630EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 631
e407d620 632dotraplinkage void __kprobes
aa78bcfa 633do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 634{
a334fe43 635#ifdef CONFIG_MATH_EMULATION
7643e9b9 636 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
637 struct math_emu_info info = { };
638
7643e9b9 639 conditional_sti(regs);
d315760f 640
aa78bcfa 641 info.regs = regs;
d315760f 642 math_emulate(&info);
a334fe43 643 return;
7643e9b9 644 }
a334fe43
BG
645#endif
646 math_state_restore(); /* interrupts still off */
647#ifdef CONFIG_X86_32
648 conditional_sti(regs);
081f75bb 649#endif
7643e9b9
AH
650}
651
081f75bb 652#ifdef CONFIG_X86_32
e407d620 653dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
654{
655 siginfo_t info;
656 local_irq_enable();
657
658 info.si_signo = SIGILL;
659 info.si_errno = 0;
660 info.si_code = ILL_BADSTK;
fc6fcdfb 661 info.si_addr = NULL;
f8e0870f
AH
662 if (notify_die(DIE_TRAP, "iret exception",
663 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
664 return;
3c1326f8 665 do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
f8e0870f 666}
081f75bb 667#endif
f8e0870f 668
29c84391
JK
669/* Set of traps needed for early debugging. */
670void __init early_trap_init(void)
671{
672 set_intr_gate_ist(1, &debug, DEBUG_STACK);
673 /* int3 can be called from all */
674 set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
675 set_intr_gate(14, &page_fault);
676 load_idt(&idt_descr);
677}
678
1da177e4
LT
679void __init trap_init(void)
680{
dbeb2be2
RR
681 int i;
682
1da177e4 683#ifdef CONFIG_EISA
927222b1 684 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
685
686 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 687 EISA_bus = 1;
927222b1 688 early_iounmap(p, 4);
1da177e4
LT
689#endif
690
976382dc 691 set_intr_gate(0, &divide_error);
699d2937 692 set_intr_gate_ist(2, &nmi, NMI_STACK);
699d2937
AH
693 /* int4 can be called from all */
694 set_system_intr_gate(4, &overflow);
64f644c0 695 set_intr_gate(5, &bounds);
12394cf5 696 set_intr_gate(6, &invalid_op);
7643e9b9 697 set_intr_gate(7, &device_not_available);
081f75bb 698#ifdef CONFIG_X86_32
a8c1be9d 699 set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb
AH
700#else
701 set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
702#endif
51bc1ed6 703 set_intr_gate(9, &coprocessor_segment_overrun);
6bf77bf9 704 set_intr_gate(10, &invalid_TSS);
36d936c7 705 set_intr_gate(11, &segment_not_present);
699d2937 706 set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
c6df0d71 707 set_intr_gate(13, &general_protection);
cf81978d 708 set_intr_gate(15, &spurious_interrupt_bug);
252d28fe 709 set_intr_gate(16, &coprocessor_error);
5feedfd4 710 set_intr_gate(17, &alignment_check);
1da177e4 711#ifdef CONFIG_X86_MCE
699d2937 712 set_intr_gate_ist(18, &machine_check, MCE_STACK);
1da177e4 713#endif
b939bde2 714 set_intr_gate(19, &simd_coprocessor_error);
1da177e4 715
bb3f0b59
YL
716 /* Reserve all the builtin and the syscall vector: */
717 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
718 set_bit(i, used_vectors);
719
081f75bb
AH
720#ifdef CONFIG_IA32_EMULATION
721 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 722 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
723#endif
724
725#ifdef CONFIG_X86_32
699d2937 726 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 727 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 728#endif
bb3f0b59 729
1da177e4 730 /*
b5964405 731 * Should be a barrier for any external CPU state:
1da177e4
LT
732 */
733 cpu_init();
734
428cf902 735 x86_init.irqs.trap_init();
228bdaa9
SR
736
737#ifdef CONFIG_X86_64
738 memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16);
739 set_nmi_gate(1, &debug);
740 set_nmi_gate(3, &int3);
741#endif
1da177e4 742}