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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
b5964405 IM |
12 | #include <linux/interrupt.h> |
13 | #include <linux/kallsyms.h> | |
14 | #include <linux/spinlock.h> | |
b5964405 IM |
15 | #include <linux/kprobes.h> |
16 | #include <linux/uaccess.h> | |
b5964405 | 17 | #include <linux/kdebug.h> |
f503b5ae | 18 | #include <linux/kgdb.h> |
1da177e4 | 19 | #include <linux/kernel.h> |
b5964405 IM |
20 | #include <linux/module.h> |
21 | #include <linux/ptrace.h> | |
1da177e4 | 22 | #include <linux/string.h> |
b5964405 | 23 | #include <linux/delay.h> |
1da177e4 | 24 | #include <linux/errno.h> |
b5964405 IM |
25 | #include <linux/kexec.h> |
26 | #include <linux/sched.h> | |
1da177e4 | 27 | #include <linux/timer.h> |
1da177e4 | 28 | #include <linux/init.h> |
91768d6c | 29 | #include <linux/bug.h> |
b5964405 IM |
30 | #include <linux/nmi.h> |
31 | #include <linux/mm.h> | |
c1d518c8 AH |
32 | #include <linux/smp.h> |
33 | #include <linux/io.h> | |
1da177e4 LT |
34 | |
35 | #ifdef CONFIG_EISA | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/eisa.h> | |
38 | #endif | |
39 | ||
c0d12172 DJ |
40 | #if defined(CONFIG_EDAC) |
41 | #include <linux/edac.h> | |
42 | #endif | |
43 | ||
f8561296 | 44 | #include <asm/kmemcheck.h> |
b5964405 | 45 | #include <asm/stacktrace.h> |
1da177e4 | 46 | #include <asm/processor.h> |
1da177e4 | 47 | #include <asm/debugreg.h> |
60063497 | 48 | #include <linux/atomic.h> |
c1d518c8 | 49 | #include <asm/traps.h> |
1da177e4 LT |
50 | #include <asm/desc.h> |
51 | #include <asm/i387.h> | |
1361b83a | 52 | #include <asm/fpu-internal.h> |
9e55e44e | 53 | #include <asm/mce.h> |
c1d518c8 | 54 | |
1164dd00 | 55 | #include <asm/mach_traps.h> |
c1d518c8 | 56 | |
081f75bb | 57 | #ifdef CONFIG_X86_64 |
428cf902 | 58 | #include <asm/x86_init.h> |
081f75bb AH |
59 | #include <asm/pgalloc.h> |
60 | #include <asm/proto.h> | |
081f75bb | 61 | #else |
c1d518c8 | 62 | #include <asm/processor-flags.h> |
8e6dafd6 | 63 | #include <asm/setup.h> |
1da177e4 | 64 | |
1da177e4 LT |
65 | asmlinkage int system_call(void); |
66 | ||
1da177e4 | 67 | /* Do we ignore FPU interrupts ? */ |
b5964405 | 68 | char ignore_fpu_irq; |
1da177e4 LT |
69 | |
70 | /* | |
71 | * The IDT has to be page-aligned to simplify the Pentium | |
07e81d61 | 72 | * F0 0F bug workaround. |
1da177e4 | 73 | */ |
07e81d61 | 74 | gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, }; |
081f75bb | 75 | #endif |
1da177e4 | 76 | |
b77b881f YL |
77 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
78 | EXPORT_SYMBOL_GPL(used_vectors); | |
79 | ||
762db434 AH |
80 | static inline void conditional_sti(struct pt_regs *regs) |
81 | { | |
82 | if (regs->flags & X86_EFLAGS_IF) | |
83 | local_irq_enable(); | |
84 | } | |
85 | ||
3d2a71a5 AH |
86 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
87 | { | |
88 | inc_preempt_count(); | |
89 | if (regs->flags & X86_EFLAGS_IF) | |
90 | local_irq_enable(); | |
91 | } | |
92 | ||
be716615 TG |
93 | static inline void conditional_cli(struct pt_regs *regs) |
94 | { | |
95 | if (regs->flags & X86_EFLAGS_IF) | |
96 | local_irq_disable(); | |
97 | } | |
98 | ||
3d2a71a5 AH |
99 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
100 | { | |
101 | if (regs->flags & X86_EFLAGS_IF) | |
102 | local_irq_disable(); | |
103 | dec_preempt_count(); | |
104 | } | |
105 | ||
b5964405 | 106 | static void __kprobes |
3c1326f8 | 107 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
b5964405 | 108 | long error_code, siginfo_t *info) |
1da177e4 | 109 | { |
4f339ecb | 110 | struct task_struct *tsk = current; |
4f339ecb | 111 | |
081f75bb | 112 | #ifdef CONFIG_X86_32 |
6b6891f9 | 113 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 AH |
114 | /* |
115 | * traps 0, 1, 3, 4, and 5 should be forwarded to vm86. | |
116 | * On nmi (interrupt 2), do_trap should not be called. | |
117 | */ | |
c9408265 | 118 | if (trapnr < X86_TRAP_UD) |
1da177e4 LT |
119 | goto vm86_trap; |
120 | goto trap_signal; | |
121 | } | |
081f75bb | 122 | #endif |
1da177e4 | 123 | |
717b594a | 124 | if (!user_mode(regs)) |
1da177e4 LT |
125 | goto kernel_trap; |
126 | ||
081f75bb | 127 | #ifdef CONFIG_X86_32 |
b5964405 | 128 | trap_signal: |
081f75bb | 129 | #endif |
b5964405 | 130 | /* |
51e7dc70 | 131 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
132 | * kernelspace faults which result in die(), but not |
133 | * kernelspace faults which are fixed up. die() gives the | |
134 | * process no chance to handle the signal and notice the | |
135 | * kernel fault information, so that won't result in polluting | |
136 | * the information about previously queued, but not yet | |
137 | * delivered, faults. See also do_general_protection below. | |
138 | */ | |
139 | tsk->thread.error_code = error_code; | |
51e7dc70 | 140 | tsk->thread.trap_nr = trapnr; |
d1895183 | 141 | |
081f75bb AH |
142 | #ifdef CONFIG_X86_64 |
143 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
144 | printk_ratelimit()) { | |
145 | printk(KERN_INFO | |
146 | "%s[%d] trap %s ip:%lx sp:%lx error:%lx", | |
147 | tsk->comm, tsk->pid, str, | |
148 | regs->ip, regs->sp, error_code); | |
149 | print_vma_addr(" in ", regs->ip); | |
150 | printk("\n"); | |
151 | } | |
152 | #endif | |
153 | ||
b5964405 IM |
154 | if (info) |
155 | force_sig_info(signr, info, tsk); | |
156 | else | |
157 | force_sig(signr, tsk); | |
158 | return; | |
1da177e4 | 159 | |
b5964405 IM |
160 | kernel_trap: |
161 | if (!fixup_exception(regs)) { | |
162 | tsk->thread.error_code = error_code; | |
51e7dc70 | 163 | tsk->thread.trap_nr = trapnr; |
b5964405 | 164 | die(str, regs, error_code); |
1da177e4 | 165 | } |
b5964405 | 166 | return; |
1da177e4 | 167 | |
081f75bb | 168 | #ifdef CONFIG_X86_32 |
b5964405 IM |
169 | vm86_trap: |
170 | if (handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
171 | error_code, trapnr)) | |
172 | goto trap_signal; | |
173 | return; | |
081f75bb | 174 | #endif |
1da177e4 LT |
175 | } |
176 | ||
b5964405 | 177 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 178 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
179 | { \ |
180 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ | |
a8c1be9d | 181 | == NOTIFY_STOP) \ |
b5964405 | 182 | return; \ |
61aef7d2 | 183 | conditional_sti(regs); \ |
3c1326f8 | 184 | do_trap(trapnr, signr, str, regs, error_code, NULL); \ |
1da177e4 LT |
185 | } |
186 | ||
3c1326f8 | 187 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ |
e407d620 | 188 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
189 | { \ |
190 | siginfo_t info; \ | |
191 | info.si_signo = signr; \ | |
192 | info.si_errno = 0; \ | |
193 | info.si_code = sicode; \ | |
194 | info.si_addr = (void __user *)siaddr; \ | |
b5964405 | 195 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \ |
a8c1be9d | 196 | == NOTIFY_STOP) \ |
b5964405 | 197 | return; \ |
61aef7d2 | 198 | conditional_sti(regs); \ |
3c1326f8 | 199 | do_trap(trapnr, signr, str, regs, error_code, &info); \ |
1da177e4 LT |
200 | } |
201 | ||
c9408265 KC |
202 | DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV, |
203 | regs->ip) | |
204 | DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
205 | DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds) | |
206 | DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, | |
207 | regs->ip) | |
208 | DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun", | |
209 | coprocessor_segment_overrun) | |
210 | DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
211 | DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
081f75bb | 212 | #ifdef CONFIG_X86_32 |
c9408265 | 213 | DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
081f75bb | 214 | #endif |
c9408265 KC |
215 | DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check, |
216 | BUS_ADRALN, 0) | |
1da177e4 | 217 | |
081f75bb AH |
218 | #ifdef CONFIG_X86_64 |
219 | /* Runs on IST stack */ | |
220 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
221 | { | |
222 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, | |
c9408265 | 223 | X86_TRAP_SS, SIGBUS) == NOTIFY_STOP) |
081f75bb AH |
224 | return; |
225 | preempt_conditional_sti(regs); | |
c9408265 | 226 | do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL); |
081f75bb AH |
227 | preempt_conditional_cli(regs); |
228 | } | |
229 | ||
230 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
231 | { | |
232 | static const char str[] = "double fault"; | |
233 | struct task_struct *tsk = current; | |
234 | ||
235 | /* Return not checked because double check cannot be ignored */ | |
c9408265 | 236 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
237 | |
238 | tsk->thread.error_code = error_code; | |
51e7dc70 | 239 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 240 | |
bd8b96df IM |
241 | /* |
242 | * This is always a kernel trap and never fixable (and thus must | |
243 | * never return). | |
244 | */ | |
081f75bb AH |
245 | for (;;) |
246 | die(str, regs, error_code); | |
247 | } | |
248 | #endif | |
249 | ||
e407d620 | 250 | dotraplinkage void __kprobes |
13485ab5 | 251 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 252 | { |
13485ab5 | 253 | struct task_struct *tsk; |
b5964405 | 254 | |
c6df0d71 AH |
255 | conditional_sti(regs); |
256 | ||
081f75bb | 257 | #ifdef CONFIG_X86_32 |
6b6891f9 | 258 | if (regs->flags & X86_VM_MASK) |
1da177e4 | 259 | goto gp_in_vm86; |
081f75bb | 260 | #endif |
1da177e4 | 261 | |
13485ab5 | 262 | tsk = current; |
717b594a | 263 | if (!user_mode(regs)) |
1da177e4 LT |
264 | goto gp_in_kernel; |
265 | ||
13485ab5 | 266 | tsk->thread.error_code = error_code; |
51e7dc70 | 267 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 268 | |
13485ab5 AH |
269 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
270 | printk_ratelimit()) { | |
abd4f750 | 271 | printk(KERN_INFO |
13485ab5 AH |
272 | "%s[%d] general protection ip:%lx sp:%lx error:%lx", |
273 | tsk->comm, task_pid_nr(tsk), | |
274 | regs->ip, regs->sp, error_code); | |
03252919 AK |
275 | print_vma_addr(" in ", regs->ip); |
276 | printk("\n"); | |
277 | } | |
abd4f750 | 278 | |
13485ab5 | 279 | force_sig(SIGSEGV, tsk); |
1da177e4 LT |
280 | return; |
281 | ||
081f75bb | 282 | #ifdef CONFIG_X86_32 |
1da177e4 LT |
283 | gp_in_vm86: |
284 | local_irq_enable(); | |
285 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
286 | return; | |
081f75bb | 287 | #endif |
1da177e4 LT |
288 | |
289 | gp_in_kernel: | |
13485ab5 AH |
290 | if (fixup_exception(regs)) |
291 | return; | |
292 | ||
293 | tsk->thread.error_code = error_code; | |
51e7dc70 | 294 | tsk->thread.trap_nr = X86_TRAP_GP; |
c9408265 KC |
295 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
296 | X86_TRAP_GP, SIGSEGV) == NOTIFY_STOP) | |
13485ab5 AH |
297 | return; |
298 | die("general protection fault", regs, error_code); | |
1da177e4 LT |
299 | } |
300 | ||
c1d518c8 | 301 | /* May run on IST stack. */ |
e407d620 | 302 | dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 303 | { |
f503b5ae | 304 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
305 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
306 | SIGTRAP) == NOTIFY_STOP) | |
f503b5ae JW |
307 | return; |
308 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ | |
cc3a1bf5 | 309 | |
c9408265 KC |
310 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
311 | SIGTRAP) == NOTIFY_STOP) | |
48c88211 | 312 | return; |
b5964405 | 313 | |
42181186 SR |
314 | /* |
315 | * Let others (NMI) know that the debug stack is in use | |
316 | * as we may switch to the interrupt stack. | |
317 | */ | |
318 | debug_stack_usage_inc(); | |
4915a35e | 319 | preempt_conditional_sti(regs); |
c9408265 | 320 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 321 | preempt_conditional_cli(regs); |
42181186 | 322 | debug_stack_usage_dec(); |
1da177e4 | 323 | } |
1da177e4 | 324 | |
081f75bb | 325 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
326 | /* |
327 | * Help handler running on IST stack to switch back to user stack | |
328 | * for scheduling or signal handling. The actual stack switch is done in | |
329 | * entry.S | |
330 | */ | |
081f75bb AH |
331 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
332 | { | |
333 | struct pt_regs *regs = eregs; | |
334 | /* Did already sync */ | |
335 | if (eregs == (struct pt_regs *)eregs->sp) | |
336 | ; | |
337 | /* Exception from user space */ | |
338 | else if (user_mode(eregs)) | |
339 | regs = task_pt_regs(current); | |
bd8b96df IM |
340 | /* |
341 | * Exception from kernel and interrupts are enabled. Move to | |
342 | * kernel process stack. | |
343 | */ | |
081f75bb AH |
344 | else if (eregs->flags & X86_EFLAGS_IF) |
345 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
346 | if (eregs != regs) | |
347 | *regs = *eregs; | |
348 | return regs; | |
349 | } | |
350 | #endif | |
351 | ||
1da177e4 LT |
352 | /* |
353 | * Our handling of the processor debug registers is non-trivial. | |
354 | * We do not clear them on entry and exit from the kernel. Therefore | |
355 | * it is possible to get a watchpoint trap here from inside the kernel. | |
356 | * However, the code in ./ptrace.c has ensured that the user can | |
357 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
358 | * watchpoint trap can only occur in code which is reading/writing | |
359 | * from user space. Such code must not hold kernel locks (since it | |
360 | * can equally take a page fault), therefore it is safe to call | |
361 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 362 | * |
1da177e4 LT |
363 | * Code in ./signal.c ensures that the debug control register |
364 | * is restored before we deliver any signal, and therefore that | |
365 | * user code runs with the correct debug control register even though | |
366 | * we clear it here. | |
367 | * | |
368 | * Being careful here means that we don't have to be as careful in a | |
369 | * lot of more complicated places (task switching can be a bit lazy | |
370 | * about restoring all the debug state, and ptrace doesn't have to | |
371 | * find every occurrence of the TF bit that could be saved away even | |
372 | * by user code) | |
c1d518c8 AH |
373 | * |
374 | * May run on IST stack. | |
1da177e4 | 375 | */ |
e407d620 | 376 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 377 | { |
1da177e4 | 378 | struct task_struct *tsk = current; |
a1e80faf | 379 | int user_icebp = 0; |
08d68323 | 380 | unsigned long dr6; |
da654b74 | 381 | int si_code; |
1da177e4 | 382 | |
08d68323 | 383 | get_debugreg(dr6, 6); |
1da177e4 | 384 | |
40f9249a P |
385 | /* Filter out all the reserved bits which are preset to 1 */ |
386 | dr6 &= ~DR6_RESERVED; | |
387 | ||
a1e80faf FW |
388 | /* |
389 | * If dr6 has no reason to give us about the origin of this trap, | |
390 | * then it's very likely the result of an icebp/int01 trap. | |
391 | * User wants a sigtrap for that. | |
392 | */ | |
393 | if (!dr6 && user_mode(regs)) | |
394 | user_icebp = 1; | |
395 | ||
f8561296 | 396 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 397 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
f8561296 VN |
398 | return; |
399 | ||
08d68323 P |
400 | /* DR6 may or may not be cleared by the CPU */ |
401 | set_debugreg(0, 6); | |
10faa81e | 402 | |
ea8e61b7 PZ |
403 | /* |
404 | * The processor cleared BTF, so don't mark that we need it set. | |
405 | */ | |
406 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
407 | ||
08d68323 P |
408 | /* Store the virtualized DR6 value */ |
409 | tsk->thread.debugreg6 = dr6; | |
410 | ||
62edab90 P |
411 | if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code, |
412 | SIGTRAP) == NOTIFY_STOP) | |
1da177e4 | 413 | return; |
3d2a71a5 | 414 | |
42181186 SR |
415 | /* |
416 | * Let others (NMI) know that the debug stack is in use | |
417 | * as we may switch to the interrupt stack. | |
418 | */ | |
419 | debug_stack_usage_inc(); | |
420 | ||
1da177e4 | 421 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 422 | preempt_conditional_sti(regs); |
1da177e4 | 423 | |
08d68323 | 424 | if (regs->flags & X86_VM_MASK) { |
c9408265 KC |
425 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
426 | X86_TRAP_DB); | |
6554287b | 427 | preempt_conditional_cli(regs); |
42181186 | 428 | debug_stack_usage_dec(); |
08d68323 | 429 | return; |
1da177e4 LT |
430 | } |
431 | ||
1da177e4 | 432 | /* |
08d68323 P |
433 | * Single-stepping through system calls: ignore any exceptions in |
434 | * kernel space, but re-enable TF when returning to user mode. | |
435 | * | |
436 | * We already checked v86 mode above, so we can check for kernel mode | |
437 | * by just checking the CPL of CS. | |
1da177e4 | 438 | */ |
08d68323 P |
439 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
440 | tsk->thread.debugreg6 &= ~DR_STEP; | |
441 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
442 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 443 | } |
08d68323 | 444 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 445 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 446 | send_sigtrap(tsk, regs, error_code, si_code); |
3d2a71a5 | 447 | preempt_conditional_cli(regs); |
42181186 | 448 | debug_stack_usage_dec(); |
1da177e4 | 449 | |
1da177e4 LT |
450 | return; |
451 | } | |
452 | ||
453 | /* | |
454 | * Note that we play around with the 'TS' bit in an attempt to get | |
455 | * the correct behaviour even in the presence of the asynchronous | |
456 | * IRQ13 behaviour | |
457 | */ | |
9b6dba9e | 458 | void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 459 | { |
e2e75c91 | 460 | struct task_struct *task = current; |
1da177e4 | 461 | siginfo_t info; |
9b6dba9e | 462 | unsigned short err; |
c9408265 KC |
463 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
464 | "simd exception"; | |
e2e75c91 BG |
465 | |
466 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
467 | return; | |
468 | conditional_sti(regs); | |
469 | ||
470 | if (!user_mode_vm(regs)) | |
471 | { | |
472 | if (!fixup_exception(regs)) { | |
473 | task->thread.error_code = error_code; | |
51e7dc70 | 474 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
475 | die(str, regs, error_code); |
476 | } | |
477 | return; | |
478 | } | |
1da177e4 LT |
479 | |
480 | /* | |
481 | * Save the info for the exception handler and clear the error. | |
482 | */ | |
1da177e4 | 483 | save_init_fpu(task); |
51e7dc70 | 484 | task->thread.trap_nr = trapnr; |
9b6dba9e | 485 | task->thread.error_code = error_code; |
1da177e4 LT |
486 | info.si_signo = SIGFPE; |
487 | info.si_errno = 0; | |
9b6dba9e | 488 | info.si_addr = (void __user *)regs->ip; |
c9408265 | 489 | if (trapnr == X86_TRAP_MF) { |
9b6dba9e BG |
490 | unsigned short cwd, swd; |
491 | /* | |
492 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
493 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
494 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
495 | * fault bit. We should only be taking one exception at a time, | |
496 | * so if this combination doesn't produce any single exception, | |
497 | * then we have a bad program that isn't synchronizing its FPU usage | |
498 | * and it will suffer the consequences since we won't be able to | |
499 | * fully reproduce the context of the exception | |
500 | */ | |
501 | cwd = get_fpu_cwd(task); | |
502 | swd = get_fpu_swd(task); | |
adf77bac | 503 | |
9b6dba9e BG |
504 | err = swd & ~cwd; |
505 | } else { | |
506 | /* | |
507 | * The SIMD FPU exceptions are handled a little differently, as there | |
508 | * is only a single status/control register. Thus, to determine which | |
509 | * unmasked exception was caught we must mask the exception mask bits | |
510 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
511 | */ | |
512 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
513 | err = ~(mxcsr >> 7) & mxcsr; | |
514 | } | |
adf77bac PA |
515 | |
516 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
517 | /* |
518 | * swd & 0x240 == 0x040: Stack Underflow | |
519 | * swd & 0x240 == 0x240: Stack Overflow | |
520 | * User must clear the SF bit (0x40) if set | |
521 | */ | |
522 | info.si_code = FPE_FLTINV; | |
adf77bac | 523 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 524 | info.si_code = FPE_FLTDIV; |
adf77bac | 525 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 526 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
527 | } else if (err & 0x012) { /* Denormal, Underflow */ |
528 | info.si_code = FPE_FLTUND; | |
529 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 530 | info.si_code = FPE_FLTRES; |
adf77bac | 531 | } else { |
bd8b96df | 532 | /* |
c9408265 KC |
533 | * If we're using IRQ 13, or supposedly even some trap |
534 | * X86_TRAP_MF implementations, it's possible | |
535 | * we get a spurious trap, which is not an error. | |
bd8b96df | 536 | */ |
c9408265 | 537 | return; |
1da177e4 LT |
538 | } |
539 | force_sig_info(SIGFPE, &info, task); | |
540 | } | |
541 | ||
e407d620 | 542 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 543 | { |
081f75bb | 544 | #ifdef CONFIG_X86_32 |
1da177e4 | 545 | ignore_fpu_irq = 1; |
081f75bb AH |
546 | #endif |
547 | ||
c9408265 | 548 | math_error(regs, error_code, X86_TRAP_MF); |
1da177e4 LT |
549 | } |
550 | ||
e407d620 AH |
551 | dotraplinkage void |
552 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 553 | { |
c9408265 | 554 | math_error(regs, error_code, X86_TRAP_XF); |
1da177e4 LT |
555 | } |
556 | ||
e407d620 AH |
557 | dotraplinkage void |
558 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 559 | { |
cf81978d | 560 | conditional_sti(regs); |
1da177e4 LT |
561 | #if 0 |
562 | /* No need to warn about this any longer. */ | |
b5964405 | 563 | printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
564 | #endif |
565 | } | |
566 | ||
081f75bb | 567 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 568 | { |
1da177e4 | 569 | } |
4efc0670 | 570 | |
7856f6cc | 571 | asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
572 | { |
573 | } | |
574 | ||
1da177e4 | 575 | /* |
b5964405 | 576 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
577 | * old math state array, and gets the new ones from the current task |
578 | * | |
579 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
580 | * Don't touch unless you *really* know how it works. | |
581 | * | |
be98c2cd LT |
582 | * Must be called with kernel preemption disabled (eg with local |
583 | * local interrupts as in the case of do_device_not_available). | |
1da177e4 | 584 | */ |
be98c2cd | 585 | void math_state_restore(void) |
1da177e4 | 586 | { |
f94edacf | 587 | struct task_struct *tsk = current; |
1da177e4 | 588 | |
aa283f49 SS |
589 | if (!tsk_used_math(tsk)) { |
590 | local_irq_enable(); | |
591 | /* | |
592 | * does a slab alloc which can sleep | |
593 | */ | |
594 | if (init_fpu(tsk)) { | |
595 | /* | |
596 | * ran out of memory! | |
597 | */ | |
598 | do_group_exit(SIGKILL); | |
599 | return; | |
600 | } | |
601 | local_irq_disable(); | |
602 | } | |
603 | ||
f94edacf | 604 | __thread_fpu_begin(tsk); |
80ab6f1e LT |
605 | /* |
606 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
607 | */ | |
608 | if (unlikely(restore_fpu_checking(tsk))) { | |
609 | __thread_fpu_end(tsk); | |
610 | force_sig(SIGSEGV, tsk); | |
611 | return; | |
612 | } | |
b3b0870e LT |
613 | |
614 | tsk->fpu_counter++; | |
1da177e4 | 615 | } |
5992b6da | 616 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 | 617 | |
e407d620 | 618 | dotraplinkage void __kprobes |
aa78bcfa | 619 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 620 | { |
a334fe43 | 621 | #ifdef CONFIG_MATH_EMULATION |
7643e9b9 | 622 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
623 | struct math_emu_info info = { }; |
624 | ||
7643e9b9 | 625 | conditional_sti(regs); |
d315760f | 626 | |
aa78bcfa | 627 | info.regs = regs; |
d315760f | 628 | math_emulate(&info); |
a334fe43 | 629 | return; |
7643e9b9 | 630 | } |
a334fe43 BG |
631 | #endif |
632 | math_state_restore(); /* interrupts still off */ | |
633 | #ifdef CONFIG_X86_32 | |
634 | conditional_sti(regs); | |
081f75bb | 635 | #endif |
7643e9b9 AH |
636 | } |
637 | ||
081f75bb | 638 | #ifdef CONFIG_X86_32 |
e407d620 | 639 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
640 | { |
641 | siginfo_t info; | |
642 | local_irq_enable(); | |
643 | ||
644 | info.si_signo = SIGILL; | |
645 | info.si_errno = 0; | |
646 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 647 | info.si_addr = NULL; |
c9408265 KC |
648 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
649 | X86_TRAP_IRET, SIGILL) == NOTIFY_STOP) | |
f8e0870f | 650 | return; |
c9408265 KC |
651 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, |
652 | &info); | |
f8e0870f | 653 | } |
081f75bb | 654 | #endif |
f8e0870f | 655 | |
29c84391 JK |
656 | /* Set of traps needed for early debugging. */ |
657 | void __init early_trap_init(void) | |
658 | { | |
c9408265 | 659 | set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); |
29c84391 | 660 | /* int3 can be called from all */ |
c9408265 KC |
661 | set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); |
662 | set_intr_gate(X86_TRAP_PF, &page_fault); | |
29c84391 JK |
663 | load_idt(&idt_descr); |
664 | } | |
665 | ||
1da177e4 LT |
666 | void __init trap_init(void) |
667 | { | |
dbeb2be2 RR |
668 | int i; |
669 | ||
1da177e4 | 670 | #ifdef CONFIG_EISA |
927222b1 | 671 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
672 | |
673 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 674 | EISA_bus = 1; |
927222b1 | 675 | early_iounmap(p, 4); |
1da177e4 LT |
676 | #endif |
677 | ||
c9408265 KC |
678 | set_intr_gate(X86_TRAP_DE, ÷_error); |
679 | set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); | |
699d2937 | 680 | /* int4 can be called from all */ |
c9408265 KC |
681 | set_system_intr_gate(X86_TRAP_OF, &overflow); |
682 | set_intr_gate(X86_TRAP_BR, &bounds); | |
683 | set_intr_gate(X86_TRAP_UD, &invalid_op); | |
684 | set_intr_gate(X86_TRAP_NM, &device_not_available); | |
081f75bb | 685 | #ifdef CONFIG_X86_32 |
c9408265 | 686 | set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb | 687 | #else |
c9408265 | 688 | set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); |
081f75bb | 689 | #endif |
c9408265 KC |
690 | set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun); |
691 | set_intr_gate(X86_TRAP_TS, &invalid_TSS); | |
692 | set_intr_gate(X86_TRAP_NP, &segment_not_present); | |
693 | set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK); | |
694 | set_intr_gate(X86_TRAP_GP, &general_protection); | |
695 | set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug); | |
696 | set_intr_gate(X86_TRAP_MF, &coprocessor_error); | |
697 | set_intr_gate(X86_TRAP_AC, &alignment_check); | |
1da177e4 | 698 | #ifdef CONFIG_X86_MCE |
c9408265 | 699 | set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); |
1da177e4 | 700 | #endif |
c9408265 | 701 | set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error); |
1da177e4 | 702 | |
bb3f0b59 YL |
703 | /* Reserve all the builtin and the syscall vector: */ |
704 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
705 | set_bit(i, used_vectors); | |
706 | ||
081f75bb AH |
707 | #ifdef CONFIG_IA32_EMULATION |
708 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 709 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
710 | #endif |
711 | ||
712 | #ifdef CONFIG_X86_32 | |
699d2937 | 713 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 714 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 715 | #endif |
bb3f0b59 | 716 | |
1da177e4 | 717 | /* |
b5964405 | 718 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
719 | */ |
720 | cpu_init(); | |
721 | ||
428cf902 | 722 | x86_init.irqs.trap_init(); |
228bdaa9 SR |
723 | |
724 | #ifdef CONFIG_X86_64 | |
725 | memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16); | |
c9408265 KC |
726 | set_nmi_gate(X86_TRAP_DB, &debug); |
727 | set_nmi_gate(X86_TRAP_BP, &int3); | |
228bdaa9 | 728 | #endif |
1da177e4 | 729 | } |