]>
Commit | Line | Data |
---|---|---|
13a9cd42 TG |
1 | /* ld script to make x86-64 Linux kernel |
2 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>; | |
3 | */ | |
4 | ||
5 | #define LOAD_OFFSET __START_KERNEL_map | |
6 | ||
7 | #include <asm-generic/vmlinux.lds.h> | |
1a51e3a0 | 8 | #include <asm/asm-offsets.h> |
13a9cd42 TG |
9 | #include <asm/page.h> |
10 | ||
11 | #undef i386 /* in case the preprocessor is a 32bit one */ | |
12 | ||
13 | OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") | |
14 | OUTPUT_ARCH(i386:x86-64) | |
15 | ENTRY(phys_startup_64) | |
16 | jiffies_64 = jiffies; | |
17 | _proxy_pda = 1; | |
18 | PHDRS { | |
19 | text PT_LOAD FLAGS(5); /* R_E */ | |
20 | data PT_LOAD FLAGS(7); /* RWE */ | |
21 | user PT_LOAD FLAGS(7); /* RWE */ | |
22 | data.init PT_LOAD FLAGS(7); /* RWE */ | |
3e5d8f97 TH |
23 | #ifdef CONFIG_SMP |
24 | percpu PT_LOAD FLAGS(7); /* RWE */ | |
25 | #endif | |
6360b1fb | 26 | note PT_NOTE FLAGS(0); /* ___ */ |
13a9cd42 TG |
27 | } |
28 | SECTIONS | |
29 | { | |
30 | . = __START_KERNEL; | |
31 | phys_startup_64 = startup_64 - LOAD_OFFSET; | |
32 | _text = .; /* Text and read-only data */ | |
33 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | |
34 | /* First the code that has to be first for bootstrapping */ | |
35 | *(.text.head) | |
36 | _stext = .; | |
37 | /* Then the rest */ | |
38 | TEXT_TEXT | |
39 | SCHED_TEXT | |
40 | LOCK_TEXT | |
41 | KPROBES_TEXT | |
a0343e82 | 42 | IRQENTRY_TEXT |
13a9cd42 TG |
43 | *(.fixup) |
44 | *(.gnu.warning) | |
3cdac41f | 45 | _etext = .; /* End of text section */ |
c0400030 | 46 | } :text = 0x9090 |
13a9cd42 | 47 | |
6360b1fb JB |
48 | NOTES :text :note |
49 | ||
13a9cd42 | 50 | . = ALIGN(16); /* Exception table */ |
c0400030 JB |
51 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { |
52 | __start___ex_table = .; | |
53 | *(__ex_table) | |
54 | __stop___ex_table = .; | |
6360b1fb | 55 | } :text = 0x9090 |
13a9cd42 TG |
56 | |
57 | RODATA | |
58 | ||
3cdac41f | 59 | . = ALIGN(PAGE_SIZE); /* Align data segment to page size boundary */ |
13a9cd42 TG |
60 | /* Data */ |
61 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | |
62 | DATA_DATA | |
63 | CONSTRUCTORS | |
64 | } :data | |
65 | ||
66 | _edata = .; /* End of data section */ | |
67 | ||
68 | . = ALIGN(PAGE_SIZE); | |
69 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
70 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | |
71 | *(.data.cacheline_aligned) | |
72 | } | |
73 | . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES); | |
74 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | |
75 | *(.data.read_mostly) | |
76 | } | |
77 | ||
78 | #define VSYSCALL_ADDR (-10*1024*1024) | |
79 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | |
80 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | |
81 | ||
82 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) | |
83 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) | |
84 | ||
85 | #define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR) | |
86 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) | |
87 | ||
88 | . = VSYSCALL_ADDR; | |
89 | .vsyscall_0 : AT(VSYSCALL_PHYS_ADDR) { *(.vsyscall_0) } :user | |
90 | __vsyscall_0 = VSYSCALL_VIRT_ADDR; | |
91 | ||
92 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
93 | .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { *(.vsyscall_fn) } | |
94 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
95 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) | |
96 | { *(.vsyscall_gtod_data) } | |
97 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | |
98 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) | |
99 | { *(.vsyscall_clock) } | |
100 | vsyscall_clock = VVIRT(.vsyscall_clock); | |
101 | ||
102 | ||
103 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) | |
104 | { *(.vsyscall_1) } | |
105 | .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) | |
106 | { *(.vsyscall_2) } | |
107 | ||
108 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { *(.vgetcpu_mode) } | |
109 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | |
110 | ||
111 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
112 | .jiffies : AT(VLOAD(.jiffies)) { *(.jiffies) } | |
113 | jiffies = VVIRT(.jiffies); | |
114 | ||
115 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) | |
116 | { *(.vsyscall_3) } | |
117 | ||
3cdac41f | 118 | . = VSYSCALL_VIRT_ADDR + PAGE_SIZE; |
13a9cd42 TG |
119 | |
120 | #undef VSYSCALL_ADDR | |
121 | #undef VSYSCALL_PHYS_ADDR | |
122 | #undef VSYSCALL_VIRT_ADDR | |
123 | #undef VLOAD_OFFSET | |
124 | #undef VLOAD | |
125 | #undef VVIRT_OFFSET | |
126 | #undef VVIRT | |
127 | ||
85c42d0d | 128 | . = ALIGN(THREAD_SIZE); /* init_task */ |
13a9cd42 TG |
129 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { |
130 | *(.data.init_task) | |
131 | }:data.init | |
132 | ||
3cdac41f | 133 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
134 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { |
135 | *(.data.page_aligned) | |
136 | } | |
137 | ||
138 | /* might get freed after init */ | |
3cdac41f | 139 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
140 | __smp_alt_begin = .; |
141 | __smp_locks = .; | |
142 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | |
143 | *(.smp_locks) | |
144 | } | |
145 | __smp_locks_end = .; | |
3cdac41f | 146 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
147 | __smp_alt_end = .; |
148 | ||
3cdac41f | 149 | . = ALIGN(PAGE_SIZE); /* Init code and data */ |
13a9cd42 TG |
150 | __init_begin = .; |
151 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | |
152 | _sinittext = .; | |
01ba2bdc | 153 | INIT_TEXT |
13a9cd42 TG |
154 | _einittext = .; |
155 | } | |
01ba2bdc SR |
156 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { |
157 | __initdata_begin = .; | |
158 | INIT_DATA | |
159 | __initdata_end = .; | |
160 | } | |
161 | ||
13a9cd42 TG |
162 | . = ALIGN(16); |
163 | __setup_start = .; | |
164 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { *(.init.setup) } | |
165 | __setup_end = .; | |
166 | __initcall_start = .; | |
167 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { | |
168 | INITCALLS | |
169 | } | |
170 | __initcall_end = .; | |
171 | __con_initcall_start = .; | |
172 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { | |
173 | *(.con_initcall.init) | |
174 | } | |
175 | __con_initcall_end = .; | |
10a434fc YL |
176 | __x86_cpu_dev_start = .; |
177 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | |
178 | *(.x86_cpu_dev.init) | |
03ae5768 | 179 | } |
10a434fc | 180 | __x86_cpu_dev_end = .; |
cb58ffc3 | 181 | SECURITY_INIT |
fbf51924 GOC |
182 | |
183 | . = ALIGN(8); | |
184 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | |
185 | __parainstructions = .; | |
186 | *(.parainstructions) | |
187 | __parainstructions_end = .; | |
188 | } | |
189 | ||
13a9cd42 TG |
190 | . = ALIGN(8); |
191 | __alt_instructions = .; | |
192 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | |
193 | *(.altinstructions) | |
194 | } | |
3cdac41f | 195 | __alt_instructions_end = .; |
13a9cd42 TG |
196 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { |
197 | *(.altinstr_replacement) | |
198 | } | |
199 | /* .exit.text is discard at runtime, not link time, to deal with references | |
200 | from .altinstructions and .eh_frame */ | |
01ba2bdc SR |
201 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { |
202 | EXIT_TEXT | |
203 | } | |
204 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | |
205 | EXIT_DATA | |
206 | } | |
13a9cd42 | 207 | |
13a9cd42 | 208 | #ifdef CONFIG_BLK_DEV_INITRD |
3cdac41f | 209 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
210 | __initramfs_start = .; |
211 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) } | |
212 | __initramfs_end = .; | |
213 | #endif | |
214 | ||
3e5d8f97 TH |
215 | #ifdef CONFIG_SMP |
216 | /* | |
217 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | |
218 | * output PHDR, so the next output section - __data_nosave - should | |
1a51e3a0 TH |
219 | * switch it back to data.init. Also, pda should be at the head of |
220 | * percpu area. Preallocate it. | |
3e5d8f97 TH |
221 | */ |
222 | . = ALIGN(PAGE_SIZE); | |
1a51e3a0 | 223 | PERCPU_VADDR_PREALLOC(0, :percpu, pda_size) |
3e5d8f97 | 224 | #else |
3cdac41f | 225 | PERCPU(PAGE_SIZE) |
3e5d8f97 | 226 | #endif |
13a9cd42 | 227 | |
3cdac41f | 228 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
229 | __init_end = .; |
230 | ||
3cdac41f | 231 | . = ALIGN(PAGE_SIZE); |
13a9cd42 | 232 | __nosave_begin = .; |
3e5d8f97 TH |
233 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
234 | *(.data.nosave) | |
235 | } :data.init /* switch back to data.init, see PERCPU_VADDR() above */ | |
3cdac41f | 236 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
237 | __nosave_end = .; |
238 | ||
239 | __bss_start = .; /* BSS */ | |
240 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | |
241 | *(.bss.page_aligned) | |
242 | *(.bss) | |
243 | } | |
244 | __bss_stop = .; | |
245 | ||
246 | _end = . ; | |
247 | ||
248 | /* Sections to be discarded */ | |
249 | /DISCARD/ : { | |
250 | *(.exitcall.exit) | |
251 | *(.eh_frame) | |
252 | } | |
253 | ||
254 | STABS_DEBUG | |
255 | ||
256 | DWARF_DEBUG | |
257 | } | |
b4e0409a IM |
258 | |
259 | /* | |
260 | * Build-time check on the image size: | |
261 | */ | |
262 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), | |
263 | "kernel image bigger than KERNEL_IMAGE_SIZE") |