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Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kernel / x86_init.c
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1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
9325a28c 7#include <linux/ioport.h>
186f4360 8#include <linux/export.h>
294ee6f8 9#include <linux/pci.h>
57844a8f 10
816c25e7 11#include <asm/bios_ebda.h>
6f30c1ac 12#include <asm/paravirt.h>
b72d0db9 13#include <asm/pci_x86.h>
fd6c6661 14#include <asm/mpspec.h>
8fee697d 15#include <asm/setup.h>
736decac 16#include <asm/apic.h>
66441bd3 17#include <asm/e820/api.h>
845b3944 18#include <asm/time.h>
d9112f43 19#include <asm/irq.h>
4a8e2a31 20#include <asm/io_apic.h>
71054d88 21#include <asm/hpet.h>
fd12a0d6 22#include <asm/pat.h>
2d826404 23#include <asm/tsc.h>
338bac52 24#include <asm/iommu.h>
064a59b6 25#include <asm/mach_traps.h>
57844a8f 26
148f9bb8 27void x86_init_noop(void) { }
f4848472 28void __init x86_init_uint_noop(unsigned int unused) { }
d07c1be0 29int __init iommu_init_noop(void) { return 0; }
62ad33f6 30void iommu_shutdown_noop(void) { }
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31bool __init bool_x86_init_noop(void) { return false; }
32void x86_op_int_noop(int cpu) { }
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33
34/*
35 * The platform setup functions are preset with the default functions
36 * for standard PC hardware.
37 */
54e2603f 38struct x86_init_ops x86_init __initdata = {
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39
40 .resources = {
5d94e81f 41 .probe_roms = probe_roms,
8fee697d 42 .reserve_resources = reserve_standard_io_resources,
103e2063 43 .memory_setup = e820__memory_setup_default,
f7cf5a5b 44 },
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45
46 .mpparse = {
47 .mpc_record = x86_init_uint_noop,
de934103 48 .setup_ioapic_ids = x86_init_noop,
fd6c6661 49 .mpc_apic_id = default_mpc_apic_id,
72302142 50 .smp_read_mpc_oem = default_smp_read_mpc_oem,
90e1c696 51 .mpc_oem_bus_info = default_mpc_oem_bus_info,
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52 .find_smp_config = default_find_smp_config,
53 .get_smp_config = default_get_smp_config,
f4848472 54 },
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55
56 .irqs = {
57 .pre_vector_init = init_ISA_irqs,
66bcaf0b 58 .intr_init = native_init_IRQ,
428cf902 59 .trap_init = x86_init_noop,
34fba3e6 60 .intr_mode_init = apic_intr_mode_init
d9112f43 61 },
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62
63 .oem = {
64 .arch_setup = x86_init_noop,
6f30c1ac 65 .banner = default_banner,
42bbdb43 66 },
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67
68 .paging = {
7737b215 69 .pagetable_init = native_pagetable_init,
030cb6c0 70 },
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71
72 .timers = {
73 .setup_percpu_clockev = setup_boot_APIC_clock,
845b3944 74 .timer_init = hpet_time_init,
6b617e22 75 .wallclock_init = x86_init_noop,
736decac 76 },
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77
78 .iommu = {
79 .iommu_init = iommu_init_noop,
80 },
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81
82 .pci = {
83 .init = x86_default_pci_init,
ab3b3793 84 .init_irq = x86_default_pci_init_irq,
9325a28c 85 .fixup_irqs = x86_default_pci_fixup_irqs,
b72d0db9 86 },
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87
88 .hyper = {
89 .init_platform = x86_init_noop,
f3614646 90 .guest_late_init = x86_init_noop,
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91 .x2apic_available = bool_x86_init_noop,
92 .init_mem_mapping = x86_init_noop,
93 },
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94};
95
148f9bb8 96struct x86_cpuinit_ops x86_cpuinit = {
df156f90 97 .early_percpu_clock_init = x86_init_noop,
736decac 98 .setup_percpu_clockev = setup_secondary_APIC_clock,
57844a8f 99};
2d826404 100
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101static void default_nmi_init(void) { };
102
404f6aac 103struct x86_platform_ops x86_platform __ro_after_init = {
aa297292 104 .calibrate_cpu = native_calibrate_cpu,
2d826404 105 .calibrate_tsc = native_calibrate_tsc,
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106 .get_wallclock = mach_get_cmos_time,
107 .set_wallclock = mach_set_rtc_mmss,
338bac52 108 .iommu_shutdown = iommu_shutdown_noop,
eb41c8be 109 .is_untracked_pat_range = is_ISA_range,
c516ac58 110 .nmi_init = default_nmi_init,
064a59b6 111 .get_nmi_reason = default_get_nmi_reason,
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112 .save_sched_clock_state = tsc_save_sched_clock_state,
113 .restore_sched_clock_state = tsc_restore_sched_clock_state,
f72e38e8 114 .hyper.pin_vcpu = x86_op_int_noop,
2d826404 115};
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116
117EXPORT_SYMBOL_GPL(x86_platform);
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118
119#if defined(CONFIG_PCI_MSI)
404f6aac 120struct x86_msi_ops x86_msi __ro_after_init = {
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121 .setup_msi_irqs = native_setup_msi_irqs,
122 .teardown_msi_irq = native_teardown_msi_irq,
123 .teardown_msi_irqs = default_teardown_msi_irqs,
124 .restore_msi_irqs = default_restore_msi_irqs,
294ee6f8 125};
4a8e2a31 126
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127/* MSI arch specific hooks */
128int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
129{
130 return x86_msi.setup_msi_irqs(dev, nvec, type);
131}
132
133void arch_teardown_msi_irqs(struct pci_dev *dev)
134{
135 x86_msi.teardown_msi_irqs(dev);
136}
137
138void arch_teardown_msi_irq(unsigned int irq)
139{
140 x86_msi.teardown_msi_irq(irq);
141}
142
ac8344c4 143void arch_restore_msi_irqs(struct pci_dev *dev)
4287d824 144{
ac8344c4 145 x86_msi.restore_msi_irqs(dev);
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146}
147#endif
148
404f6aac 149struct x86_io_apic_ops x86_io_apic_ops __ro_after_init = {
1c4248ca 150 .read = native_io_apic_read,
1c4248ca 151 .disable = native_disable_io_apic,
4a8e2a31 152};